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5.0 ... 5.4

Author SHA1 Message Date
Pascal Vizeli
c152fdeba0 Merge pull request #924 from home-assistant/dev
Release 5.4
2020-10-22 17:07:07 +02:00
Pascal Vizeli
dcfb296dcf Update buildroot to 2020.02.7 (#923)
Signed-off-by: Pascal Vizeli <pvizeli@syshack.ch>
2020-10-22 17:05:36 +02:00
Stefan Agner
fdcb94f0d8 Actually fix CDC ACM error recovery path (#712) (#921)
Instead of reverting the CDC ACM cool-down patch fix the intention of
that change. This should fix the error recovery paths in the CDC ACM
driver and allow CDC ACM devices to continue working even in the event
of USB issues.
2020-10-21 20:34:26 +02:00
Stefan Agner
5f0a8fe627 Bump firmware to RPi bluez-firmware 1.2-4+rpt6 release (#918)
This addresses recent Bluetooth secruity vulnerabilities.
2020-10-20 22:39:59 +02:00
Pascal Vizeli
0495ba25ad RaspberryPI: Fix issue with correct SYMLINK with ttyAMA (#915) 2020-10-20 19:08:19 +02:00
Pascal Vizeli
fa242e32d7 Remove not needed partition magic (#901)
* Update Documentation/partition.md

Co-authored-by: Stefan Agner <stefan@agner.ch>
2020-10-18 15:08:11 +02:00
Stefan Agner
fc3b098170 Fix CDC ACM error recovery path (#712) (#905)
Revert CDC ACM cool-down patch. This should fix the error recovery paths
in the CDC ACM driver and allow CDC ACM devices to continue working even
in the event of USB issues.
2020-10-17 13:16:08 +02:00
Stefan Agner
2b0fff31a3 Bump ODROID boards to Linux 5.9 (#898)
* Bump ODROID boards to Linux 5.9.1

This makes quite some patches obsolete which since have been upstreamed.

* Drop Linux 5.7 header symbols

Since we do not introduce new packages which actually require a newer
kernel headers, there is no value in having config symbols for the new
kernel version. Buildroot is still using the headers from our kernel,
and hence gets the latest version of the headers.
2020-10-17 13:14:47 +02:00
Aman Gupta Karmani
dade3adf80 bump rpi-firmware to latest stable release (sep 2020) (#899) 2020-10-16 15:12:35 +02:00
Souradip Mookerjee
b4fad03613 Make clear this should be with UNIX line endings (#884) 2020-10-15 11:49:08 +02:00
Aman Gupta Karmani
59b8636bc8 Fix systemd-time-wait-sync getting stuck with upstream patches (#897) 2020-10-13 00:38:04 +02:00
Aman Gupta Karmani
3337cd0f79 Fix var-lib-NetworkManager.mount dependencies (#895) 2020-10-12 21:41:12 +02:00
Pascal Vizeli
0c7cd8023e Bump version 5.4 2020-10-11 19:38:10 +02:00
Pascal Vizeli
5583a16219 Merge pull request #893 from home-assistant/dev
Release 5.3
2020-10-11 19:37:28 +02:00
Stefan Agner
502ef82b80 Bump U-Boot to 2020.10 for all boards using U-Boot (#889) 2020-10-10 12:27:47 +02:00
Stefan Agner
1708ed11b4 Fix Docker socket path (#885)
The Docker socket path is /run/docker.sock. Also only one path can be
used per property. This fixes the supervisor service, which currently
refuses to start due to missing Docker socket.
2020-10-06 12:17:39 +02:00
cogneato
59b9d82a55 Clean up initial description (#886) 2020-10-05 22:11:19 +02:00
Stefan Agner
39babd5368 Extend RPi default config.txt (#875)
Add commented out commands to enable serial console (useful for
debugging) and to disable SD card poll (useful for USB SSD boot).
2020-09-25 08:46:27 +02:00
Stefan Agner
2595dd815b Enable drivers for Intel Network devices with Virtual Function (#754) (#878) 2020-09-25 08:45:22 +02:00
Stefan Agner
d1577a6a65 Enable Hyper-V PCI support (#872) (#877) 2020-09-25 08:43:39 +02:00
Pascal Vizeli
f219f239d8 Improve handling with services on supervisor (#867)
* Improve handling with services on supervisor

* add condition

* move dbus to required, since we can't start the supervisor
2020-09-24 13:40:39 +02:00
Stefan Agner
ebc93692f5 Drop UART write retry patch from U-Boot (#873)
The patch causes U-Boot freezes in some configurations. The root cause
is that U-Boot does not allow to use the bss section in pre-relocation
code (which is where the UART is used). Drop the patch as it is not
required currently.

See also:
http://u-boot.10912.n7.nabble.com/RPi4-U-Boot-freeze-td424432.html#a427198
2020-09-24 13:37:44 +02:00
Pascal Vizeli
3af31c2265 Add observer plugin (#864) 2020-09-14 10:21:03 +02:00
Stefan Agner
639cd41ccf Make sure U-Boot built idbloader.img gets copied (#854)
The U-Boot build system creates a ready to use idbloader.img. A earlier
commit dropped the HAOS code to create the same. However, the commit
missed copying the one built by U-Boot. Make sure idbloader.img gets
copied to the image output directory.
2020-09-12 15:30:34 +00:00
Stefan Agner
f4f6908c80 Make sure udev rule only applies to first PL011 UART (#778) (#862)
The to symlink serial0/1 currently might apply to the first or second
ttyAMAX instance. In downstream, a patch makes sure that the first
PL011 is always ttyAMA0. However, upstream the numbering depends on the
UART alias, which leads to the first PL011 being ttyAMA1.

Check the actual iobase too to make sure we are dealing with the first
PL011 instance.

See also:
05cfe136f7 (diff-2678c183f503319c8d8c09c818af789a)
2020-09-12 09:08:27 +02:00
Stefan Agner
31fc13cf03 Resize serial terminal on login (#860) (#863)
The new readline utilty used by the CLI add-on requires the size of the
terminal to be set. Use the resize command to initialize terminal size
on login if we are running on a serial terminal.
2020-09-12 09:07:03 +02:00
Stefan Agner
ec1561661b Make sure U-Boot built idbloader.img gets copied (#854)
The U-Boot build system creates a ready to use idbloader.img. A earlier
commit dropped the HAOS code to create the same. However, the commit
missed copying the one built by U-Boot. Make sure idbloader.img gets
copied to the image output directory.
2020-09-10 10:55:41 +02:00
Pascal Vizeli
9b3e5357c5 Revert "Use Microsoft Basic Data instead of Microsoft Reserved Partition (#847)" (#852)
This reverts commit 31bb38ffd4.
2020-09-07 09:22:23 +00:00
Pascal Vizeli
272430a58c Revert "Use Microsoft Basic Data instead of Microsoft Reserved Partition (#847)" (#852)
This reverts commit 31bb38ffd4.
2020-09-07 11:19:03 +02:00
Pascal Vizeli
1537e14dfc Bump version 5.3 2020-09-06 22:29:39 +02:00
Pascal Vizeli
d204cbda7f Merge pull request #851 from home-assistant/dev
Release 5.2
2020-09-06 22:28:36 +02:00
Pascal Vizeli
22f7777099 Make getty for serial/tty same (#850)
* Make getty for serial/tty same

* adjust log output
2020-09-06 22:18:19 +02:00
Pascal Vizeli
813030bb4c Linux: Update kernel 5.4.63 / 5.7.13 (#849)
* Odroid: Update kernel 5.7.19

* Linux: Update kernel 5.4.63
2020-09-06 22:17:13 +02:00
Stefan Agner
31bb38ffd4 Use Microsoft Basic Data instead of Microsoft Reserved Partition (#847)
Currently the Microsoft Reserved Partition GUID is used for this FAT32
formatted partition. This GUID is a rather Microsoft Windows specific
GUID and not commonly used on Linux.

On Linux systems partitions of this type do not get automatically
mounted (see /usr/lib/udev/rules.d/80-udisks2.rules). However, since
this partition contains some files user commonly need to adjust
(config.txt, cmdline.txt) it would be good if the partition does get
mounted.

Use Microsoft Basic Data instead, which is used by default for FAT32
partition (even by Linux partitioning tools such as gparted). Tested
on ASUS Tinker Board and RPi4.
2020-09-06 11:57:17 +02:00
Stefan Agner
b6cfe04422 Do not attempt to resize on every boot (#843) (#848)
The hassos-expand script calls sfdisk to find free disk space. It seems
that today it considers the space before the first partition as free:
$ sudo sfdisk -Fq /dev/sdi
Start   End Sectors Size
 2048 16383   14336   7M

This causes the script to always resize. It seems not to cause harm to
the partition table (it does not resize really). However, the call to
partx seems to confuse systemd and kill the mnt-data.mount process
(presumably because udev causes remove/add events for the by-label
device units).

Consider everything below 8MiB to not be worthy of a size change. This
avoids missdetection and resize attempts where there is no need.
2020-09-06 11:22:43 +02:00
Stefan Agner
0ae67991d1 Cleanup Tinker Board patches (#846)
* Remove rk3288-xt-q8l-v10.dts related patches

We only support ASUS Tinker Board, so no need for those patches.

* Remove unnecessary patches and rebase some for Tinker Board S

Some patches only apply to the Tinker Board device tree. Rebase them to
apply to the dtsi file so they apply for both boards, the Tinker Board
and the Tinker Board S board.
2020-09-05 11:11:18 +02:00
Stefan Agner
f892334077 Support custom output directory (#842)
Support custom output directories akin to how buildroot supports O=.
This allows to use separate output directory per board, e.g. using
make O=output_odroid-n2.
2020-09-04 21:07:32 +02:00
Stefan Agner
2e2f6e893b Fix Tinker Board S (eMMC) boot (#650) (#845)
* Fix Tinker Board S (eMMC) boot (#650)

Use Tinker Board S U-Boot configuration which is capable to boot from
eMMC as well as from SD card.

Note that this makes U-Boot always claiming to run on Tinker Board S:
..
Model: Rockchip RK3288 Asus Tinker Board S
..

It seems that there is no generic Tinker Board configuration. However,
Tinker Board S configuration really seems to work well with Tinker Board
as well, so just use it.

Also today the U-Boot Makefile seems to generate a working idbloader.img
already. Drop our special handling.

* Use Tinker Board S device tree if booting from eMMC for Linux

Instead of patching the Tinker Board device tree, select the device tree
based on what device we are booting from.

Note: This boots the non-S device tree when booting a Tinker Board S
from SD card! But there is no reliable detection otherwise, so let's
just live with that fact.

* Document how to use our U-Boot to flash eMMC
2020-09-04 21:05:49 +02:00
Stefan Agner
a2a4cf8668 Align all partitions to 1MiB boundary (#808)
Aligning partitions (and hence file system structures) to higher level
then 512 byte sectors is common practise and highly recommended for flash
backed block devices. It makes sure that the underlaying flash translation
layer (FTL) does not amplify writes due to missalignment of its erase
block size. Use a 1MiB boundary which is what a modern fdisk is doing.

Before this change:

 # fdisk /dev/mmcblk0

Welcome to fdisk (util-linux 2.35.1).
Changes will remain in memory only, until you decide to write them.
Be careful before using the write command.

Command (m for help): p
Disk /dev/mmcblk0: 14.57 GiB, 15634268160 bytes, 30535680 sectors
Units: sectors of 1 * 512 = 512 bytes
Sector size (logical/physical): 512 bytes / 512 bytes
I/O size (minimum/optimal): 512 bytes / 512 bytes
Disklabel type: dos
Disk identifier: 0x48617373

Device         Boot   Start      End  Sectors  Size Id Type
/dev/mmcblk0p1 *      16384    65537    49154   24M  c W95 FAT32 (LBA)
/dev/mmcblk0p2        65539  1228814  1163276  568M  5 Extended
/dev/mmcblk0p3      1228816  1425425   196610   96M 83 Linux
/dev/mmcblk0p4      1425427 30535679 29110253 13.9G 83 Linux
/dev/mmcblk0p5        65540   114693    49154   24M 83 Linux
/dev/mmcblk0p6       114695   638984   524290  256M 83 Linux
/dev/mmcblk0p7       638986   688139    49154   24M 83 Linux
/dev/mmcblk0p8       688141  1212430   524290  256M 83 Linux
/dev/mmcblk0p9      1212432  1228814    16383    8M 83 Linux

After this change:

 # fdisk /dev/mmcblk0

Welcome to fdisk (util-linux 2.35.1).
Changes will remain in memory only, until you decide to write them.
Be careful before using the write command.

Command (m for help): p
Disk /dev/mmcblk0: 14.57 GiB, 15634268160 bytes, 30535680 sectors
Units: sectors of 1 * 512 = 512 bytes
Sector size (logical/physical): 512 bytes / 512 bytes
I/O size (minimum/optimal): 512 bytes / 512 bytes
Disklabel type: dos
Disk identifier: 0x48617373

Device         Boot   Start      End  Sectors  Size Id Type
/dev/mmcblk0p1 *      16384    65535    49152   24M  c W95 FAT32 (LBA)
/dev/mmcblk0p2        65536  1239039  1173504  573M  5 Extended
/dev/mmcblk0p3      1241088  1437695   196608   96M 83 Linux
/dev/mmcblk0p4      1439744 30535679 29095936 13.9G 83 Linux
/dev/mmcblk0p5        67584   116735    49152   24M 83 Linux
/dev/mmcblk0p6       118784   643071   524288  256M 83 Linux
/dev/mmcblk0p7       645120   694271    49152   24M 83 Linux
/dev/mmcblk0p8       696320  1220607   524288  256M 83 Linux
/dev/mmcblk0p9      1222656  1239039    16384    8M 83 Linux

See also:
https://unix.stackexchange.com/questions/248939/how-to-achieve-optimal-alignment-for-emmc-partition
http://3gfp.com/wp/2014/07/formatting-sd-cards-for-speed-and-lifetime/
2020-09-01 22:54:19 +02:00
Stefan Agner
b8cf3face0 Load socinfo only once (#838)
Remove code duplication and make sure to load socinfo only once. Also
set board_rev before MAC address to make sure board_rev is set even if
loading MAC address from efuses fails.
2020-09-01 19:07:07 +02:00
mikebaz
1c991c229d Update network.md (#833)
small change to reflect the renaming of the OS as shown in the top-level README
2020-08-28 10:37:01 +02:00
Stefan Agner
a3c5e670ef Fix ODROID-N2(+) SD card boot (#835) (#836) 2020-08-28 10:18:50 +02:00
Pascal Vizeli
ffc75a5053 Optimize overlay driver (#831)
* Optimize overlay driver

https://www.youtube.com/watch?v=fSyr_IXM21Y&feature=youtu.be

Not sure about the INDEX, but the other should be safe.

* Update buildroot-external/kernel/docker.config

Co-authored-by: Stefan Agner <stefan@agner.ch>

Co-authored-by: Stefan Agner <stefan@agner.ch>
2020-08-27 11:50:16 +02:00
Stefan Agner
4d6246be4d RPi4 fix WiFi with 802.11r fast roaming enabled (#733) (#830)
Add brcmfmac patch which adds 802.11r fast roaming support.
2020-08-22 15:08:14 +02:00
Stefan Agner
c6a1e668f4 Load loop module before starting the container (#824)
This makes sure that the kernel module loop is loaded, the loop devices
under /dev have been created before the container starts. Docker uses
the current /dev as template for the container /dev. If the loop entries
are missing, loop devices can't be used inside the container. Use
losetup which does not make assumption weather loop support is built-in.

This fixes issues seen on my machine when entering the build environment
the first time after build:
  mount: /mnt/data: failed to setup loop device for /export/data.ext4.
  make[2]: *** [package/pkg-generic.mk:364: /build/buildroot/output_rpi4/build/hassio-1.0.0/.stamp_target_installed] Error 32
2020-08-18 10:46:28 +02:00
Pascal Vizeli
b19f83d74d N2: fix possible issue with end up in not working device (#818) 2020-08-10 09:59:49 +02:00
Pascal Vizeli
7b14ed775b Fix RPi4 with buildroot v2020.02.4 (#815) 2020-08-08 08:25:55 +00:00
Pascal Vizeli
a877e0c3dd Fix RPi4 with buildroot v2020.02.4 (#815) 2020-08-07 12:49:52 +02:00
Pascal Vizeli
265cb08e79 Bump version 5.2 2020-08-06 21:23:03 +02:00
Pascal Vizeli
1be8e44cde Merge pull request #814 from home-assistant/dev
Release 5.1
2020-08-06 21:22:21 +02:00
Pascal Vizeli
c473aca701 Add support for USB wifi (#813)
Signed-off-by: Pascal Vizeli <pvizeli@syshack.ch>
2020-08-06 21:20:29 +02:00
Pascal Vizeli
f93f8e34b3 Kernel 5.4.56 / Odroid 5.7.13 (#812)
* Linux: Update kernel 5.4.56

* Odroid: Update kernel 5.7.13
2020-08-06 21:12:41 +02:00
Pascal Vizeli
fa53c7bc99 Update buildroot v2020.02.4 (#811)
* Update buildroot to 2020.02.4

Signed-off-by: Pascal Vizeli <pvizeli@syshack.ch>

* fix patches

Signed-off-by: Pascal Vizeli <pvizeli@syshack.ch>
2020-08-06 20:54:14 +02:00
Pascal Vizeli
1f4bd67f7e Improve the compatibility (#810)
* Improve the compatibility

* small style fix
2020-08-06 20:49:42 +02:00
Pascal Vizeli
0c427d0dee Update rauc 1.4 to fix mounted boot partition issue (#809)
* Update rauc 1.4 to fix mounted boot partition issue

* applay update

* fix characters

* fix CI

* Support old format

* fix mcopy prefix

* fix lint

* fix lint

* clean style

* Fix script

* fix syntax

* Support all system

* fix shell

* Fix script
2020-08-06 19:37:52 +02:00
Konpon96
701e4f78aa Enable systemd-logind (#797)
Signed-off-by: Konrad Ponichtera <konpon96@gmail.com>
2020-08-06 08:38:14 +02:00
Stefan Agner
cd5cb880ea Do not break device tree changes made by audio patches (#807) 2020-08-06 08:32:25 +02:00
Stefan Agner
cf033ec49d hardkernel: Fix build warning when building U-Boot (#806)
Drop const since we actually modify the buffer in meson_get_soc_rev
2020-08-05 12:07:53 +02:00
Pascal Vizeli
0ec506470a Fix amlogic patch for soc rev (#804) 2020-08-04 16:46:26 +02:00
cogneato
606da02461 Fix duplicate link and typo in documentation (#805) 2020-08-04 16:44:37 +02:00
Pascal Vizeli
e49f8fe630 Update kernel mainline 5.4.55 / Odroid 5.7.12 (#803)
* Odroid: Update kernel 5.7.12

* Linux: Update kernel 5.4.55

* Fix patch
2020-08-03 22:58:40 +02:00
Adam Griffiths
02836524ce Documentation (#769)
* spelling correction

* Restuctured, added "features", "supported hardware", intro for developers and links to the developer documentation.

* Spelling correction

* URL correction

* Documentation restructure

* Moving developer documentation index from top level README to Documentation directory README

* fixing URLS

* Restructuring and adding to board config

* Improving navigation of docs oon github

* New line after first heading

(https://github.com/home-assistant/operating-system/pull/768#discussion_r453336692)

Co-authored-by: Franck Nijhof <frenck@frenck.nl>

* Update README.md

https://github.com/home-assistant/operating-system/pull/768#discussion_r453336871

Co-authored-by: Franck Nijhof <frenck@frenck.nl>

* Update README.md

(https://github.com/home-assistant/operating-system/pull/768#discussion_r453336999)
- Surround headings with newlines
- ODROID
- Use dashes for unordered lists

Co-authored-by: Franck Nijhof <frenck@frenck.nl>

* Update README.md

- new line after heading
(https://github.com/home-assistant/operating-system/pull/768#discussion_r453337043)

Co-authored-by: Franck Nijhof <frenck@frenck.nl>

* Update README.md

- \- for unordered lists
- new line after heading
(https://github.com/home-assistant/operating-system/pull/768#discussion_r453337101)

Co-authored-by: Franck Nijhof <frenck@frenck.nl>

* Update README.md

- new line after heading
- \- for unordered lists
(https://github.com/home-assistant/operating-system/pull/768#discussion_r453337183)

Co-authored-by: Franck Nijhof <frenck@frenck.nl>

* Spelling correction, to ensure /Dpcumentation/kernel.mdhas the correct spelling

* capitalisation

* using - for unordered lists

* Adding links to config files

* fixing links to _defconfig files

* fixing link for rpi0_w

* fixing link for rpi3_64 and rpi4_64

* making the ova README consistent with the others

* formmating

* fixing numbered list

* fixing indent for sub-bullets

* questions regarding Tinker S and OVA support

* resolving PR comment from fabaff

* resolving PR comment from fabaff

* https://github.com/home-assistant/operating-system/pull/769\#discussion_r456774209

* Changing uBoot to U-Boot (https://github.com/home-assistant/operating-system/pull/769#discussion_r456774290)

* s/boot sector/eMMC boot partition/ (See https://github.com/home-assistant/operating-system/pull/769#discussion_r456774329)

* As per comments here:
https://github.com/home-assistant/operating-system/pull/769#discussion_r456791491
https://github.com/home-assistant/operating-system/pull/769#discussion_r456791580

* HassOS is no longer the official name (https://github.com/home-assistant/operating-system/pull/769#discussion_r456791863)

* Should be Home Assistant Operating System (or OS) (see https://community.home-assistant.io/t/changing-the-home-assistant-brand/167500/16). See also commennts here https://github.com/home-assistant/operating-system/pull/769#discussion_r456793030, taken in to account along with previous comments about this paragraph.

* s/HassOS/Home Assistant Operating System/

* 8Gb Pi 4 will be supported soon (see comment https://github.com/home-assistant/operating-system/pull/769#discussion_r459768349)

* resolving conflict with main dev branch.

Co-authored-by: Franck Nijhof <frenck@frenck.nl>
Co-authored-by: Pascal Vizeli <pvizeli@syshack.ch>
2020-08-03 16:31:36 +02:00
Pascal Vizeli
50176a0e3b Add support for snapshots/restore on OS level (#801) 2020-08-03 16:28:08 +02:00
Pascal Vizeli
06e7ee7efb Change VM naming handling (#794) 2020-07-29 11:19:00 +02:00
Stefan Agner
e08bbd7047 Add ODROID-N2+ support (#793)
* Add ODROID-N2+ support

Add ODROID-N2+ support with the new SoC revision c. Extend the U-Boot
script: Assume ODROID-N2 if the SoC revision is "a" (there are only "a"
revision SoCs on ODROID N2) and assume N2+ otherwise.

Currently using overclock mode as proposed in the upstream kernel patches.

* Update hassos-hook.sh

Co-authored-by: Pascal Vizeli <pascal.vizeli@syshack.ch>
2020-07-29 11:06:01 +02:00
Pascal Vizeli
653bcbe3ae Add functionts for RPi to handle kernel options (#792) 2020-07-27 12:09:43 +02:00
Pascal Vizeli
3700516097 Show board info on startup & Cleanup unused functionality (#784)
* Show board info on startup & Cleanup unused functionality

* Add patch for get env

* move patch
2020-07-27 11:54:25 +02:00
Pascal Vizeli
3fe09a4e6a Bump version to 5.1 2020-07-24 12:27:02 +02:00
647 changed files with 16079 additions and 8864 deletions

13
Documentation/README.md Normal file
View File

@@ -0,0 +1,13 @@
# Developer Documentation
## Contents
- [Getting started](./getting_started_development.md) - the place for developers to begin
- [Development](./development.md) - more details for developers
- [Deployment](./deployment.md) - approach to git branching and releases
- [Configuration](./configuration.md) - how users can configure HassOS
- [Partition](./partition.md) - partition layout
- [Network](./network.md) - approach to networking
- [Bluetooth](./bluetooth.md) - approach to bluetooth
- [Kernel](./kernel.md) - kernel versions
- [Boards](./boards/README.md) - board specific documentation

View File

@@ -0,0 +1,53 @@
# Boards
## Overview
The following boards/devices are supported:
- Raspberry Pi
- Pi 4 Model B (1 GB, 2 GB and 4 GB model) 32-bit (recommended)
- Pi 4 Model B (1 GB, 2 GB and 4 GB model) 64-bit
- Pi 3 Model B and B+ 32-bit (recommended)
- Pi 3 Model B and B+ 64-bit
- Pi 2 (not recommended)
- Pi Zero-W (not recommended)
- Pi (not recommended)
- Hardkernel
- Odroid-C2
- Odroid-N2
- Odroid-XU4
- Intel NUC
- Intel NUC5CPYH
- Intel NUC6CAYH
- Intel NUC10I3FNK2
- Gigabyte GB-BPCE-3455
- Others recent Intel NUC computers are likely to work too, only those listed above have been tested.
- Asus
- Tinker Board
- Virtual appliance (x86_64/UEFI):
- VMDK
- OVA ?
- VHDX ?
- VDI ?
- QCOW2 ?
Notes:
- see ? above: are these currently supported? see ova documentation which explains issues with previous OVA distribution)
## Board specifics
|Board|Build|Config|Docs|
|-----|----|------|----|
|Pi4B 32-bit |`make rpi4` |[rpi4](../../buildroot-external/configs/rpi4_defconfig)|[raspberrypi](./raspberrypi/)|
|Pi4B 64-bit |`make rpi4_64` |[rpi4_64](../../buildroot-external/configs/rpi4_64_defconfig)|[raspberrypi](./raspberrypi/)|
|Pi3B 32-bit |`make rpi3` |[rpi3](../../buildroot-external/configs/rpi3_defconfig)|[raspberrypi](./raspberrypi/)|
|Pi3B 64-bit |`make rpi3_64` |[rpi3_64](../../buildroot-external/configs/rpi3_64_defconfig)|[raspberrypi](./raspberrypi/)|
|Pi2 |`make rpi2` |[rpi2](../../buildroot-external/configs/rpi2_defconfig)|[raspberrypi](./raspberrypi/)|
|Pi Zero |`make rpi0_w` |[rpi0_w](../../buildroot-external/configs/rpi0_w_defconfig)|[raspberrypi](./raspberrypi/)|
|Pi |`make rpi` |[rpi](../../buildroot-external/configs/rpi_defconfig)|[raspberrypi](./raspberrypi/)|
|Odroid-C2 |`make odroid_c2` |[odroid_c2](../../buildroot-external/configs/odroid_c2_defconfig)|[hardkernel](./hardkernel/)|
|Odroid-N2 |`make odroid_n2` |[odroid_n2](../../buildroot-external/configs/odroid_n2_defconfig)|[hardkernel](./hardkernel/)|
|Odroid-XU4 |`make odroid_xu4`|[odroid_xu4](../../buildroot-external/configs/odroid_xu4_defconfig)|[hardkernel](./hardkernel/)|
|NUC |`make intel_nuc` |[intel_nuc](../../buildroot-external/configs/intel_nuc_defconfig)|[intel](./intel/)|
|Tinker Board|`make tinker` |[tinker](../../buildroot-external/configs/tinker_defconfig)|[asus](./asus/)|
|OVA |`make ova` |[ova](../../buildroot-external/configs/ova_defconfig)|[ova](./ova/)|

View File

@@ -0,0 +1,31 @@
# Tinker Board
## Supported Hardware
| Device | Release Date | Support | Config |
|----------------|---------------|---------|----------|
| Tinker RK3288 | April 2017 | yes | [tinker](../../../buildroot-external/configs/tinker_defconfig) |
| Tinker S RK3288| January 2018 | yes | [tinker](../../../buildroot-external/configs/tinker_defconfig) |
| Tinker Edge T | November 2019 | no? | |
| Tinker Edge R | November 2019 | no? | |
## eMMC
eMMC support is provided with the same image. Just flash the image to the eMMC by connecting your Tinker Board S to your PC via Micro-USB. Refer to the Tinkerboard documentation how-to flash using Micro-USB and UMS.
The Home Assistant OS provided U-Boot does support UMS as well,
however manual intervention is necessary:
1. Set the jumper between Micro-USB and HDMI the maskrom mode
2. Insert SD card and connect the board via Micro-USB to your PC
3. Continusly press Ctrl+C to interrupt boot
4. Set the jumper back to the park position
5. Start UMS using:
```
ums 0 mmc 0
```
6. A mass storage device should appear. Flash Home Assistant OS to it.
## Serial console
To access the terminal over serial console, add `console=ttyS2,115200` to `cmdline.txt`. GPIO pins are: 34 = GND / 32 = UART TXD / 33 = UART RXD.

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@@ -0,0 +1,11 @@
# ODROID
## Supported Hardware
| Device | Release Date | Support | Config |
|----------------|---------------|---------|-----------|
| ODROID-XU4 | 2015 | yes | [odroid_xu4](../../../buildroot-external/configs/odroid_xu4_defconfig)|
| ODROID-C2 | 2016 | yes | [odroid_c2](../../../buildroot-external/configs/odroid_c2_defconfig) |
| ODROID-N2 | 2019 | yes | [odroid_n2](../../../buildroot-external/configs/odroid_n2_defconfig) |
See separate documentation for each board.

View File

@@ -1,22 +1,24 @@
# Odroid-XU4
# ODROID-XU4
## eMMC
The Odroid XU4 has a hidden boot sector that is only visible on the Odroid itself (can't be written by a card reader). There are a couple possibilities:
1) If the eMMC already had a working image before flashing HassOS:
* It will be booting to uBoot (but no further).
* If you have the serial adapter, you should be able to enter `distro_bootcmd` at the uboot prompt to continue booting.
* If not, flash the HassOS image to an SD card and boot off that temporarily (while the eMMC is also plugged in).
* Once booted, login at the prompts and then enter `dd if=/dev/mmcblk0 of=/dev/mmcblk0boot0 bs=512 skip=63 seek=62 count=1440` at the linux prompt.
* Reboot with eMMC (don't forget to flip the boot switch to eMMC)
2) Clean/wiped/corruped boot sector:
* You'll need to follow [Hardkernel's instructions](https://forum.odroid.com/viewtopic.php?f=53&t=6173) to get a working boot sector. Then flash HassOS and follow instructions above.
* Alternatively, you can try flash HassOS to both an SD and eMMC, then boot off the SD with the eMMC also plugged in, then run `dd if=/dev/mmcblk1 of=/dev/mmcblk0boot0 bs=512 skip=1 seek=0 count=16381` at the Linux prompt. Note that this is untested, but in theory should work..
The ODROID XU4 uses the eMMC boot partition to boot from. Typically eMMC readers can't write to this eMMC boot partition. There are a couple of possibilities:
1. **Working** e.g. the eMMC already had a working image before flashing HassOS:
- It will be booting to U-Boot (but no further).
- If you have the serial adapter, you should be able to enter `distro_bootcmd` at the uboot prompt to continue booting.
- If not, flash the HassOS image to an SD card and boot off that temporarily (while the eMMC is also plugged in).
- Once booted, login at the prompts and then enter `dd if=/dev/mmcblk0 of=/dev/mmcblk0boot0 bs=512 skip=63 seek=62 count=1440` at the linux prompt.
- Reboot with eMMC (don't forget to flip the boot switch to eMMC)
2. **Not Working** e.g. a clean/wiped/corruped eMMC boot partition:
- You'll need to follow [Hardkernel's instructions](https://forum.odroid.com/viewtopic.php?f=53&t=6173) to get a working boot sector. Then flash HassOS and follow instructions above.
- Alternatively, you can try flash HassOS to both an SD and eMMC, then boot off the SD with the eMMC also plugged in, then run `dd if=/dev/mmcblk1 of=/dev/mmcblk0boot0 bs=512 skip=1 seek=0 count=16381` at the Linux prompt. Note that this is untested, but in theory should work..
If you are getting permissions issues when using the dd command, try disabling RO:
`echo 0 > /sys/block/mmcblk0boot0/force_ro`
to re-enable after running dd:
`echo 1 > /sys/block/mmcblk0boot0/force_ro`
## Console
By default, console access is granted over the serial header and over HDMI. Certain startup messages will only appear on the serial console by default. To show the messages on the HDMI console instead, swap the order of the two consoles in the `cmdline.txt` file on the boot partition. You can also delete the SAC2 console if you don't plan on using the serial adapter.

View File

@@ -1,9 +1,23 @@
# Intel NUC
This board configuration supports the Intel NUC mini PCs and compatibles.
Probably most recent computers will work.
## Supported Hardware
This board configuration supports the Intel NUC mini PCs and compatibles. It should work for most recent NUC computers and, because this is a UEFI based image, it should in fact work with for any x86-64 based computer with UEFI. Hardware it has been tested with is listed below.
## Tested Hardware
| Device | Release Date | Support | Config |
|-----------------------|--------------|---------|-------------|
| Intel NUC5CPYH | Q3 2015 | yes | [intel_nuc](../../../buildroot-external/configs/intel_nuc_defconfig) |
| Intel NUC6CAYH | Q4 2016 | yes | [intel_nuc](../../../buildroot-external/configs/intel_nuc_defconfig) |
| Intel NUC10i3FNK2 | Q4 2019 | yes | [intel_nuc](../../../buildroot-external/configs/intel_nuc_defconfig) |
| Gigabyte GB-BPCE-3455 | 2017 | yes* | [intel_nuc](../../../buildroot-external/configs/intel_nuc_defconfig) |
\* needs 'nomodeset' in cmdline.txt if you want a console
## Requirements
Requirements:
- x86-64 support
- UEFI boot
- SATA/AHCI storage
@@ -13,16 +27,6 @@ Requirements:
- Realtek Gigabit NIC (r8169)
- Intel Wireless Wifi 802.11ac (iwlwifi, see below)
## Tested Hardware
| Device | Quirks |
|--------|-----------|
| Intel NUC5CPYH | |
| Intel NUC6CAYH | |
| Intel NUC10I3FNK2 | |
| Gigabyte GB-BPCE-3455 | needs 'nomodeset' in cmdline.txt if you want a console |
## Wifi
The following cards are supported:
@@ -50,4 +54,3 @@ Currently there is no shiny installation method. Checklist:
- Copy or download the hassos image into your live environment
- zcat the image to local harddisk
- Reboot

View File

@@ -1,18 +0,0 @@
# Virtual Machine
Using this VMDK in a virtual machine requires the following:
- Operating system: Other 4.x or later Linux (64-bit)
- Enabled support for UEFI boot
- SATA disk controller
- Minimal of 1GB RAM
- At least 2x vCPU
- An assigned network
# OVA (Open Virtual Appliance)
Currently, we only publish a VMDK virtual disk, due to issues with our previous OVA distribution. We are currently investigating our options to bring back the OVA distribution. However, the VMDK works on the following hypervisors:
- HyperV
- VirtualBox
- VMware

View File

@@ -0,0 +1,22 @@
# Virtual Machine
## Supported Hypervisors
| Hypervisor | Vendor | Support | Config |
|---------------------|-----------|-----------------|--------------------|
| HyperV | Microsoft | yes, via VMDK | [ova](../../../buildroot-external/configs/ova_defconfig) |
| VirtualBox | Oracle | yes, via VMDK | [ova](../../../buildroot-external/configs/ova_defconfig) |
| VMware | VMware | yes, via VMDK | [ova](../../../buildroot-external/configs/ova_defconfig) |
Currently we only publish a VMDK virtual disk due to issues with our previous OVA distribution. We are investigating our options to bring back the OVA distribution, however, the VMDK works for the hypervisors listed above.
## Requirements
Using this VMDK in a virtual machine requires the following:
- Operating system: Other 4.x or later Linux (64-bit)
- Enabled support for UEFI boot
- SATA disk controller
- Minimal of 1GB RAM
- At least 2x vCPU
- An assigned network

View File

@@ -1,15 +1,17 @@
# Raspberry PI
Supported Hardware:
## Supported Hardware
| Device | Board |
|--------|-----------|
| Raspberry Pi A+/B/B+| rpi |
| Raspberry Pi Zero | rpi |
| Raspberry Pi Zero W | rpi0-w |
| Raspberry Pi 2 B | rpi2 |
| Raspberry Pi 3 B/B+ | rpi3 / rpi3-64 |
| Raspberry Pi 4 B | rpi4 / rpi4-64 |
| Device | Release Date | Support | Config |
|---------------------|---------------|-----------------|--------------------|
| Raspberry Pi B/B+/A+|2012/2014/2014 | not recommended | [rpi](../../../buildroot-external/configs/rpi_defconfig) |
| Raspberry Pi 2 B |2015 | not recommended | [rpi2](../../../buildroot-external/configs/rpi2_defconfig) |
| Raspberry Pi Zero |2015 | not recommended | [rpi](../../../buildroot-external/configs/rpi_defconfig) |
| Raspberry Pi Zero W |2017 | not recommended | [rpi0_w](../../../buildroot-external/configs/rpi0_w_defconfig) |
| Raspberry Pi 3 B/B+ |2016/2018 | yes | [rpi3](../../../buildroot-external/configs/rpi3_defconfig) / [rpi3_64](../../../buildroot-external/configs/rpi3_64_defconfig) |
| Raspberry Pi 4 B |2019 | yes* | [rpi4](../../../buildroot-external/configs/rpi4_defconfig) / [rpi4_64](../../../buildroot-external/configs/rpi4_64_defconfig) |
\*1,2 and 4 GiB versions of the Raspberry Pi 4 B are supported. Support for the 8 GiB version is coming soon is part of #740.
## Limitation 64bit

View File

@@ -1,19 +0,0 @@
# Tinker Board
Supported Hardware:
| Device | Board |
|--------|-----------|
| Tinker RK3288 | tinker |
| Tinker S RK3288 | |
<!--
## eMMC
eMMC support is provided transparently. Just flash the image to the eMMC by connecting your Tinker Board S to your PC via Micro-USB.
-->
## Serial console
To access the terminal over serial console, add `console=ttyS2,115200` to `cmdline.txt`. GPIO pins are: 34 = GND / 32 = UART TXD / 33 = UART RXD.

View File

@@ -5,14 +5,14 @@ Default Kernel tree: 5.4
| Board | Version |
|-------|---------|
| Open Virtual Applicance | 5.4.53 |
| Open Virtual Appliance | 5.4.63 |
| Raspberry Pi | 4.19.127 |
| Raspberry Pi 0-W | 4.19.127 |
| Raspberry Pi 2 | 4.19.127 |
| Raspberry Pi 3 | 4.19.127 |
| Raspberry Pi 4 | 4.19.127 |
| Tinker Board | 5.4.53 |
| Odroid-C2 | 5.7.10 |
| Odroid-N2 | 5.7.10 |
| Odroid-XU4 | 5.7.10 |
| Intel NUC | 5.4.53 |
| Tinker Board | 5.4.63 |
| Odroid-C2 | 5.7.19 |
| Odroid-N2 | 5.7.19 |
| Odroid-XU4 | 5.7.19 |
| Intel NUC | 5.4.63 |

View File

@@ -1,6 +1,6 @@
# Network
HassOS uses NetworkManager to control the host network.
Home Assistant Operating System uses NetworkManager to control the host network.
## Configure network
@@ -10,6 +10,8 @@ Only a manual configuration using NetworkManager connection files is supported.
You can read the [NetworkManager manual][nm-manual] or find many configuration examples across the internet. Keep in mind that the system is read-only. If you don't want the IP address to change on every boot, you should modify the UUID property to a generic [UUID4][uuid]. Inside the `\CONFIG\network\` directory on the USB drive or SD card, create a file called `my-network` and add the appropriate contents below:
**NOTE: Please make sure to save this file with UNIX line endings (LF, and not Windows' default CRLF endings). You can do this using Notepad these days!**
### Default
A preinstalled connection profile is provided by default:

View File

@@ -1,8 +1,8 @@
# Partition
The partition layout is a bit different than for regular setups. We prefer GPT, if possible. With SoCs which don't support GPT, we use the hybrid GPT. For more details about this topic, please refer to the [development](development.md) documentation.
The partition layout is a bit different than the typical setup. We prefer GPT, if possible. With SoCs which don't support GPT, we use a hybrid GPT. For more details about this topic, please refer to the [development](development.md) documentation.
The system is designed to have as less as possible write operations on the storage media. Which means that we have basically only write during the OTA update and 5-6 times per week on the overlay part. The data partition is having I/O. This is the reason which is should be run on a different drive.
The system is designed to have as few write operations to the storage media as possible. This means that we only write during the OTA updates and 5-6 times per week on the overlay partition. The data partition receives the main I/O operations and for this reason is ideal for placing on a different drive.
A visual representation looks like this:
@@ -51,15 +51,7 @@ Log in as `root` to get to the Home Assistant CLI and then enter `login` to cont
Confirm your USB SSD/HD is connected and recognized using `fdisk -l`.
It is recommended to use fdisk to remove the existing partition(s) before proceeding.
- Type `fdisk /dev/XXX` (replacing XXX with your drive)
- Type `d` to delete a partition.
- Continue if needed, then write the changes.
Creating a new partition is not necessary.
With the drive now prepared, use the below command (again, replacing XXX with your drive)
Make sure the drive has no partition named `hassos-data` (or no partition at all). With the drive, use the below command (again, replacing XXX with your drive)
```sh
$ datactl move /dev/xxx

View File

@@ -7,6 +7,13 @@ DEFCONFIG_DIR = $(BUILDROOT_EXTERNAL)/configs
TARGETS := $(notdir $(patsubst %_defconfig,%,$(wildcard $(DEFCONFIG_DIR)/*_defconfig)))
TARGETS_CONFIG := $(notdir $(patsubst %_defconfig,%-config,$(wildcard $(DEFCONFIG_DIR)/*_defconfig)))
# Set O variable if not already done on the command line
ifneq ("$(origin O)", "command line")
O := $(BUILDROOT)/output
else
override O := $(BUILDROOT)/$(O)
endif
.NOTPARALLEL: $(TARGETS) $(TARGETS_CONFIG) all
.PHONY: $(TARGETS) $(TARGETS_CONFIG) all clean help
@@ -23,7 +30,7 @@ $(TARGETS_CONFIG): %-config:
$(TARGETS): %: $(RELEASE_DIR) %-config
@echo "build $@"
$(MAKE) -C $(BUILDROOT) BR2_EXTERNAL=$(BUILDROOT_EXTERNAL)
cp -f $(BUILDROOT)/output/images/hassos_* $(RELEASE_DIR)/
cp -f $(O)/images/hassos_* $(RELEASE_DIR)/
# Do not clean when building for one target
ifneq ($(words $(filter $(TARGETS),$(MAKECMDGOALS))), 1)

View File

@@ -1,18 +1,52 @@
# Home Assistant Operating system
# Home Assistant Operating System
Home Assistant Operating System (HassOS) is based on [buildroot](https://buildroot.org/). It's a hypervisor for Docker and supports various kind of hardware. It is also available as virtual appliance for different virtualization solutions. The whole system is optimized for hosting [Home Assistant](https://www.home-assistant.io) and its features (to be precise, the [Add-ons](https://www.home-assistant.io/addons/)). You can update the system by using OTA updates or offline updates.
Home Assistant Operating System (formerly HassOS) is an operating system optimized for hosting [Home Assistant](https://www.home-assistant.io) and its [Add-ons](https://www.home-assistant.io/addons/).
This is an embedded Linux which works different than a normal Linux distribution. The system is designed to run with minimal I/O and is optimized for its tasks.
Home Assistant Operating System uses Docker as Container engine. It by default deploys the Home Assistant Supervisor as a container. Home Assistant Supervisor in turn uses the Docker container engine to control Home Assistant Core and Add-Ons in separate containers. Home Assistant Operating System is **not** based on a regular Linux distribution like Ubuntu. It is built using [buildroot](https://buildroot.org/) and it is optimized for running Home Assistant, especially on single board compute (SBC) devices like the Pi, ODROID, NUC and Tinker Board (see supported hardware below).
If you don't have experience with embedded systems, buildroot or the build process Linux distributions, then please read up on those topics. All provided documentation here is focusing on developers with a background on embedded systems or a strong understanding of the internal workings of operating systems.
## Features
## Focus
- Lightweight and memory-efficient
- Minimized I/O
- Over The Air (OTA) updates
- Offline updates
- Modular using Docker
- Barebox as bootloader on EFI
- U-Boot as bootloader
- Linux/Buildroot LTS
- RAUC for OTA updates
- SquashFS LZ4 as filesystem
- Docker-CE
- AppArmor protected
- ZRAM LZ4 for `/tmp`, `/var` and swap
## Supported hardware
- Raspberry Pi
- Hardkernel ODROID
- Intel NUC
- Asus Tinker Board
- Virtual appliances
See full list and specific models [here](./Documentation/boards/README.md)
## Getting Started
If you just want to use Home Assistant the official [getting started guide](https://www.home-assistant.io/getting-started/) and [installation instructions](https://www.home-assistant.io/hassio/installation/) take you through how to download Home Assistant Operating System and get it running on your machine.
If you're interested in finding out more about Home Assistant Operating System and how it works read on...
## HassOS components
- **Bootloader:**
- [Barebox](https://barebox.org/) for devices that support EFI
- [U-Boot](https://www.denx.de/wiki/U-Boot) for devices that don't support EFI
- **Operating System:**
- [Buildroot](https://buildroot.org/) LTS Linux
- **File Systems:**
- [SquashFS](https://www.kernel.org/doc/Documentation/filesystems/squashfs.txt) for read-only file systems (using LZ4 compression)
- [ZRAM](https://www.kernel.org/doc/Documentation/blockdev/zram.txt) for `/tmp`, `/var` and swap (using LZ4 compression)
- **Container Platform:**
- [Docker Engine](https://docs.docker.com/engine/) for running Home Assistant components in containers
- **Updates:**
- [RAUC](https://rauc.io/) for Over The Air (OTA) and USB updates
- **Security:**
- [AppArmor](https://apparmor.net/) Linux kernel security module
If you don't have experience with these, embedded systems, buildroot or the build process for Linux distributions, then please read up on these topics. The rest of the documentation in this project is for developers and assumes you have experience of embedded systems or a strong understanding of the internal workings of operating systems.
## Developer Documentation
All developer documentation is in the [Documentation](./Documentation) directory.

View File

@@ -46,8 +46,8 @@ jobs:
scripts/*.sh \
buildroot-external/scripts/*.sh \
buildroot-external/board/**/*.sh \
buildroot-external/ota/rauc-hook \
buildroot-external/rootfs-overlay/usr/bin/* \
buildroot-external/rootfs-overlay/usr/sbin/* \
buildroot-external/rootfs-overlay/usr/libexec/* \
buildroot-external/rootfs-overlay/usr/lib/rauc/*
displayName: 'Run ShellCheck'

View File

@@ -7,20 +7,16 @@ function hassos_pre_image() {
cp -t "${BOOT_DATA}" \
"${BINARIES_DIR}/boot.scr" \
"${BINARIES_DIR}/rk3288-tinker.dtb"
"${BINARIES_DIR}/rk3288-tinker.dtb" \
"${BINARIES_DIR}/rk3288-tinker-s.dtb"
echo "console=tty1" > "${BOOT_DATA}/cmdline.txt"
# Create boot binary
rm -f "${BINARIES_DIR}/idbloader.img"
mkimage -n rk3288 -T rksd -d "${BINARIES_DIR}/u-boot-tpl.bin" "${BINARIES_DIR}/idbloader.img"
cat "${BINARIES_DIR}/u-boot-spl.bin" >> "${BINARIES_DIR}/idbloader.img"
# SPL
create_spl_image
dd if="${BINARIES_DIR}/idbloader.img" of="${SPL_IMG}" conv=notrunc bs=512 seek=64
dd if="${BINARIES_DIR}/u-boot-dtb.img" of="${SPL_IMG}" conv=notrunc bs=512 seek=12288
dd if="${BINARIES_DIR}/u-boot-dtb.img" of="${SPL_IMG}" conv=notrunc bs=512 seek=8192
}

View File

@@ -1,7 +1,8 @@
From 2c2e60256f2cbb2fce50a6317f85b1500efd1a6c Mon Sep 17 00:00:00 2001
From 2ae3821fd824560ef2db3c87cfbec985177911f6 Mon Sep 17 00:00:00 2001
Message-Id: <2ae3821fd824560ef2db3c87cfbec985177911f6.1599249626.git.stefan@agner.ch>
From: "Miouyouyou (Myy)" <myy@miouyouyou.fr>
Date: Mon, 5 Nov 2018 22:03:26 +0100
Subject: [PATCH] ARM: DTS: rk3288-tinker: Setup the Bluetooth UART pins
Subject: [PATCH 1/2] ARM: DTS: rk3288-tinker: Setup the Bluetooth UART pins
The most essential being the RTS pin, which is clearly needed to
upload the initial configuration into the Realtek Bluetooth
@@ -39,24 +40,25 @@ echo 1 > value &&
sleep 1
Signed-off-by: Miouyouyou (Myy) <myy@miouyouyou.fr>
[move change to rk3288-tinker.dtsi]
Signed-off-by: Stefan Agner <stefan@agner.ch>
---
arch/arm/boot/dts/rk3288-tinker.dts | 6 ++++++
1 file changed, 6 insertions(+)
arch/arm/boot/dts/rk3288-tinker.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/rk3288-tinker.dts b/arch/arm/boot/dts/rk3288-tinker.dts
index d4df13bed..b92e59c1e 100644
--- a/arch/arm/boot/dts/rk3288-tinker.dts
+++ b/arch/arm/boot/dts/rk3288-tinker.dts
@@ -73,3 +73,9 @@
status = "okay";
supports-sdio;
diff --git a/arch/arm/boot/dts/rk3288-tinker.dtsi b/arch/arm/boot/dts/rk3288-tinker.dtsi
index acfaa12ec239..284e7982925d 100644
--- a/arch/arm/boot/dts/rk3288-tinker.dtsi
+++ b/arch/arm/boot/dts/rk3288-tinker.dtsi
@@ -492,6 +492,8 @@ &tsadc {
};
+
+&uart0 {
&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_xfer>, <&uart0_cts>, <&uart0_rts>;
+};
+
status = "okay";
};
--
2.16.4
2.28.0

View File

@@ -0,0 +1,55 @@
From fc25c993bf2feb6e66d55bf03eb725ec688e47eb Mon Sep 17 00:00:00 2001
Message-Id: <fc25c993bf2feb6e66d55bf03eb725ec688e47eb.1599250914.git.stefan@agner.ch>
In-Reply-To: <2ae3821fd824560ef2db3c87cfbec985177911f6.1599250914.git.stefan@agner.ch>
References: <2ae3821fd824560ef2db3c87cfbec985177911f6.1599250914.git.stefan@agner.ch>
From: "Miouyouyou (Myy)" <myy@miouyouyou.fr>
Date: Mon, 5 Nov 2018 22:15:14 +0100
Subject: [PATCH 2/3] ARM: DTS: rk3288-tinker: Defining the SPI interface
Taken from, and tested by @TonyMac32 .
Well, the original one was tested by him but I had to adapt the
registers definitions to the new 64-bits LPAE-compliant syntax.
Therefore that *might* break, along with a few other patches.
Signed-off-by: Miouyouyou (Myy) <myy@miouyouyou.fr>
[move change to rk3288-tinker.dtsi]
Signed-off-by: Stefan Agner <stefan@agner.ch>
---
arch/arm/boot/dts/rk3288-tinker.dtsi | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)
diff --git a/arch/arm/boot/dts/rk3288-tinker.dtsi b/arch/arm/boot/dts/rk3288-tinker.dtsi
index 284e7982925d..d6cc66ab5bb1 100644
--- a/arch/arm/boot/dts/rk3288-tinker.dtsi
+++ b/arch/arm/boot/dts/rk3288-tinker.dtsi
@@ -485,6 +485,25 @@ &sdio0 {
status = "okay";
};
+&spi2 {
+ max-freq = <50000000>;
+ status = "okay";
+
+ spidev@0 {
+ compatible = "rockchip,spi_tinker";
+ reg = <0x0 0>;
+ spi-max-frequency = <50000000>;
+ spi-cpha = <1>;
+ };
+
+ spidev@1 {
+ compatible = "rockchip,spi_tinker";
+ reg = <0x1>;
+ spi-max-frequency = <50000000>;
+ spi-cpha = <1>;
+ };
+};
+
&tsadc {
rockchip,hw-tshut-mode = <1>; /* tshut mode 0:CRU 1:GPIO */
rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */
--
2.28.0

View File

@@ -0,0 +1,41 @@
From 3a9d71847ae869ffdb2b0818aa86a36d57d96331 Mon Sep 17 00:00:00 2001
Message-Id: <3a9d71847ae869ffdb2b0818aa86a36d57d96331.1599250914.git.stefan@agner.ch>
In-Reply-To: <2ae3821fd824560ef2db3c87cfbec985177911f6.1599250914.git.stefan@agner.ch>
References: <2ae3821fd824560ef2db3c87cfbec985177911f6.1599250914.git.stefan@agner.ch>
From: Stefan Agner <stefan@agner.ch>
Date: Fri, 4 Sep 2020 21:57:55 +0200
Subject: [PATCH 3/3] ARM: dts: rockchip: enable I2C1/4 on rk3288-tinker
Enable I2C devices which are accessible via 40-pin header.
Signed-off-by: Stefan Agner <stefan@agner.ch>
---
arch/arm/boot/dts/rk3288-tinker.dtsi | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/rk3288-tinker.dtsi b/arch/arm/boot/dts/rk3288-tinker.dtsi
index d6cc66ab5bb1..7af5818ac77c 100644
--- a/arch/arm/boot/dts/rk3288-tinker.dtsi
+++ b/arch/arm/boot/dts/rk3288-tinker.dtsi
@@ -344,10 +344,18 @@ regulator-state-mem {
};
};
+&i2c1 {
+ status = "okay";
+};
+
&i2c2 {
status = "okay";
};
+&i2c4 {
+ status = "okay";
+};
+
&i2c5 {
status = "okay";
};
--
2.28.0

View File

@@ -1,74 +0,0 @@
Patches act8846 regulator providing the proper reset handle and exploit
the SIPC bit in GLB_POWER_OFF register. Mainly used to reset some rockchip
boards.
Origin: <https://patchwork.kernel.org/patch/6409521/>
diff --git a/drivers/regulator/act8865-regulator.c b/drivers/regulator/act8865-regulator.c
index 2ff73d7..836d10b 100644
--- a/drivers/regulator/act8865-regulator.c
+++ b/drivers/regulator/act8865-regulator.c
@@ -27,6 +27,7 @@
#include <linux/regulator/of_regulator.h>
#include <linux/regmap.h>
#include <dt-bindings/regulator/active-semi,8865-regulator.h>
+#include <linux/reboot.h>
/*
* ACT8600 Global Register Map.
@@ -133,6 +134,8 @@
#define ACT8865_VOLTAGE_NUM 64
#define ACT8600_SUDCDC_VOLTAGE_NUM 255
+#define ACT8846_SIPC_MASK 0x01
+
struct act8865 {
struct regmap *regmap;
int off_reg;
@@ -402,6 +405,22 @@ static void act8865_power_off(void)
while (1);
}
+static int act8846_power_cycle(struct notifier_block *this,
+ unsigned long code, void *unused)
+{
+ struct act8865 *act8846;
+
+ act8846 = i2c_get_clientdata(act8865_i2c_client);
+ regmap_write(act8846->regmap, ACT8846_GLB_OFF_CTRL, ACT8846_SIPC_MASK);
+
+ return NOTIFY_DONE;
+}
+
+static struct notifier_block act8846_restart_handler = {
+ .notifier_call = act8846_power_cycle,
+ .priority = 129,
+};
+
static int act8865_pmic_probe(struct i2c_client *client,
const struct i2c_device_id *i2c_id)
{
@@ -484,6 +503,8 @@ static int act8865_pmic_probe(struct i2c_client *client,
}
if (of_device_is_system_power_controller(dev->of_node)) {
+ int ret;
+
if (!pm_power_off && (off_reg > 0)) {
act8865_i2c_client = client;
act8865->off_reg = off_reg;
@@ -492,6 +513,14 @@ static int act8865_pmic_probe(struct i2c_client *client,
} else {
dev_err(dev, "Failed to set poweroff capability, already defined\n");
}
+
+ if (type == ACT8846) {
+ act8865_i2c_client = client;
+ ret = register_restart_handler(&act8846_restart_handler);
+ if (ret)
+ pr_err("%s: cannot register restart handler, %d\n",
+ __func__, ret);
+ }
}
/* Finally register devices */

View File

@@ -1,35 +0,0 @@
From 604ea7fc311af2b3a41e7fe3b4fbde0ee03dfb9c Mon Sep 17 00:00:00 2001
From: Myy Miouyouyou <myy@miouyouyou.fr>
Date: Thu, 19 Oct 2017 21:09:50 +0200
Subject: [PATCH 04/28] dts: rk3288: miqi: Enabling the Mali GPU node
Why is the MiQi the only one left without a working mali GPU node ?
Seriously, is there a rk3288 chipset WITHOUT a mali GPU ? Couldn't
they enable it once in the DTSI, instead of defining it as "disabled"
and enabling it in every DTS file ?
Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
---
arch/arm/boot/dts/rk3288-miqi.dts | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm/boot/dts/rk3288-miqi.dts b/arch/arm/boot/dts/rk3288-miqi.dts
index 4d923aa6..3cd60674 100644
--- a/arch/arm/boot/dts/rk3288-miqi.dts
+++ b/arch/arm/boot/dts/rk3288-miqi.dts
@@ -149,6 +149,11 @@
status = "ok";
};
+&gpu {
+ mali-supply = <&vdd_gpu>;
+ status = "okay";
+};
+
&hdmi {
ddc-i2c-bus = <&i2c5>;
status = "okay";
--
2.11.0

View File

@@ -1,45 +0,0 @@
From 89e5763110ca77d68a4be00cd97a638adc2401d5 Mon Sep 17 00:00:00 2001
From: Willy Tarreau <w@1wt.eu>
Date: Tue, 2 Aug 2016 08:31:00 +0200
Subject: [PATCH 05/28] ARM: dts: rockchip: fix the regulator's voltage range
on MiQi board
The board declared too narrow a voltage range for the CPU and GPU
regulators, preventing it from using the full CPU frequency range.
The regulators support 712500 to 1500000 microvolts.
Signed-off-by: Willy Tarreau <w@1wt.eu>
(cherry picked from commit 95330e63a9295a2632cee8cce5db80677f01857a)
---
arch/arm/boot/dts/rk3288-miqi.dts | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/rk3288-miqi.dts b/arch/arm/boot/dts/rk3288-miqi.dts
index 3cd60674..a1c3cdaa 100644
--- a/arch/arm/boot/dts/rk3288-miqi.dts
+++ b/arch/arm/boot/dts/rk3288-miqi.dts
@@ -168,8 +168,8 @@
fcs,suspend-voltage-selector = <1>;
reg = <0x40>;
regulator-name = "vdd_cpu";
- regulator-min-microvolt = <850000>;
- regulator-max-microvolt = <1350000>;
+ regulator-min-microvolt = <712500>;
+ regulator-max-microvolt = <1500000>;
regulator-always-on;
regulator-boot-on;
regulator-enable-ramp-delay = <300>;
@@ -182,8 +182,8 @@
fcs,suspend-voltage-selector = <1>;
reg = <0x41>;
regulator-name = "vdd_gpu";
- regulator-min-microvolt = <850000>;
- regulator-max-microvolt = <1350000>;
+ regulator-min-microvolt = <712500>;
+ regulator-max-microvolt = <1500000>;
regulator-always-on;
vin-supply = <&vcc_sys>;
};
--
2.11.0

View File

@@ -1,46 +0,0 @@
From c27e445527e949f3ef46d5326066196969c17d23 Mon Sep 17 00:00:00 2001
From: Myy <myy@miouyouyou.fr>
Date: Sun, 12 Mar 2017 19:43:15 +0000
Subject: [PATCH 06/28] ARM: dts: rockchip: add the MiQi board's fan definition
The MiQi board is sold with an enclosure in which a fan is connected
to the second LED output, and configured by default in "heartbeat"
mode so that it rotates slowly and increases when the CPU load
increases, ensuring appropriate cooling by default. This LED output
is called "Fan" in the original kernel and connected to GPIO18
(gpiochip 0, pin 18). Here we called it "miqi:green:fan" to stay
consistent with the kernel's naming conventions.
It's worth noting that without this patch the fan doesn't work at
all, risking to make the board overheat.
Fixes: 162718c (v4.7)
Cc: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Willy Tarreau <w@1wt.eu>
Signed-off-by: Myy <myy@miouyouyou.fr>
---
arch/arm/boot/dts/rk3288-miqi.dts | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/boot/dts/rk3288-miqi.dts b/arch/arm/boot/dts/rk3288-miqi.dts
index a1c3cdaa..0e383595 100644
--- a/arch/arm/boot/dts/rk3288-miqi.dts
+++ b/arch/arm/boot/dts/rk3288-miqi.dts
@@ -67,6 +67,13 @@
leds {
compatible = "gpio-leds";
+ fan {
+ gpios = <&gpio0 RK_PC2 GPIO_ACTIVE_HIGH>;
+ label = "miqi:green:fan";
+ linux,default-trigger = "heartbeat";
+ };
+
+
work {
gpios = <&gpio7 RK_PA2 GPIO_ACTIVE_HIGH>;
label = "miqi:green:user";
--
2.11.0

View File

@@ -1,98 +0,0 @@
From d5d5c53173c484a13cda62a537cbf75a5df4b0e4 Mon Sep 17 00:00:00 2001
From: "Miouyouyou (Myy)" <myy@miouyouyou.fr>
Date: Mon, 5 Nov 2018 21:58:56 +0100
Subject: [PATCH] ARM: DTS: rk3288-tinker: Enabling SDIO and Wifi
Adding the appropriate nodes in order to exploit the WiFi capabilities
of the board.
Since these capabilities are provided through SDIO, and the SDIO
nodes were not defined, these were added too.
These seems to depend on each other so they are added in one big
patch.
Split if necessary.
Signed-off-by: Miouyouyou (Myy) <myy@miouyouyou.fr>
---
arch/arm/boot/dts/rk3288-tinker.dts | 62 +++++++++++++++++++++++++++++++++++++
1 file changed, 62 insertions(+)
diff --git a/arch/arm/boot/dts/rk3288-tinker.dts b/arch/arm/boot/dts/rk3288-tinker.dts
index 1e43527aa..d4df13bed 100644
--- a/arch/arm/boot/dts/rk3288-tinker.dts
+++ b/arch/arm/boot/dts/rk3288-tinker.dts
@@ -6,8 +6,70 @@
/dts-v1/;
#include "rk3288-tinker.dtsi"
+#include <dt-bindings/clock/rockchip,rk808.h>
/ {
model = "Rockchip RK3288 Asus Tinker Board";
compatible = "asus,rk3288-tinker", "rockchip,rk3288";
+
+ /* This is essential to get SDIO devices working.
+ The Wifi depends on SDIO ! */
+ sdio_pwrseq: sdio-pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ clocks = <&rk808 RK808_CLKOUT1>;
+ clock-names = "ext_clock";
+ pinctrl-names = "default";
+ pinctrl-0 = <&chip_enable_h>, <&wifi_enable_h>;
+
+ /*
+ * On the module itself this is one of these (depending
+ * on the actual card populated):
+ * - SDIO_RESET_L_WL_REG_ON
+ * - PDN (power down when low)
+ */
+ reset-gpios = <&gpio4 28 GPIO_ACTIVE_LOW>, <&gpio4 27 GPIO_ACTIVE_LOW>;
+ };
+
+ wireless-wlan {
+ compatible = "wlan-platdata";
+ rockchip,grf = <&grf>;
+ sdio_vref = <1800>;
+ status = "okay";
+ wifi_chip_type = "8723bs";
+ WIFI,host_wake_irq = <&gpio4 30 GPIO_ACTIVE_HIGH>;
+ };
+};
+
+&io_domains {
+ wifi-supply = <&vcc_18>;
+};
+
+&pinctrl {
+ sdio-pwrseq {
+ wifi_enable_h: wifienable-h {
+ rockchip,pins = <4 28 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ chip_enable_h: chip-enable-h {
+ rockchip,pins = <4 27 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+};
+
+&sdio0 {
+ bus-width = <4>;
+ cap-sd-highspeed;
+ cap-sdio-irq;
+ clock-frequency = <50000000>;
+ clock-freq-min-max = <200000 50000000>;
+ disable-wp;
+ keep-power-in-suspend;
+ mmc-pwrseq = <&sdio_pwrseq>;
+ non-removable;
+ num-slots = <1>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
+ sd-uhs-sdr104;
+ status = "okay";
+ supports-sdio;
};
--
2.16.4

View File

@@ -1,53 +0,0 @@
From a72e0749acad92df7b854e38e97e1dc7b4799abe Mon Sep 17 00:00:00 2001
From: "Miouyouyou (Myy)" <myy@miouyouyou.fr>
Date: Mon, 5 Nov 2018 22:11:24 +0100
Subject: [PATCH] ARM: DTS: rk3288-tinker: Defined the I2C interfaces
And all the hardware behind.
Taken from @TonyMac32, Butchered by @Miouyouyou .
Signed-off-by: Miouyouyou (Myy) <myy@miouyouyou.fr>
---
arch/arm/boot/dts/rk3288-tinker.dts | 25 +++++++++++++++++++++++++
1 file changed, 25 insertions(+)
diff --git a/arch/arm/boot/dts/rk3288-tinker.dts b/arch/arm/boot/dts/rk3288-tinker.dts
index b92e59c1e..96d05fc6b 100644
--- a/arch/arm/boot/dts/rk3288-tinker.dts
+++ b/arch/arm/boot/dts/rk3288-tinker.dts
@@ -40,6 +40,31 @@
};
};
+&i2c1 {
+ status = "okay";
+};
+
+&i2c2 {
+ afc0:af-controller@0 {
+ status = "okay";
+ compatible = "silicon touch,vm149C-v4l2-i2c-subdev";
+ reg = <0x0 0x0c>;
+ };
+
+ eeprom:m24c08@50 {
+ compatible = "at,24c08";
+ reg = <0x50>;
+ };
+};
+
+&i2c3 {
+ status = "okay";
+};
+
+&i2c4 {
+ status = "okay";
+};
+
&io_domains {
wifi-supply = <&vcc_18>;
};
--
2.16.4

View File

@@ -1,50 +0,0 @@
From b24b8f83e150811ad54ee2a4843e44cd1421fafa Mon Sep 17 00:00:00 2001
From: "Miouyouyou (Myy)" <myy@miouyouyou.fr>
Date: Mon, 5 Nov 2018 22:15:14 +0100
Subject: [PATCH] ARM: DTS: rk3288-tinker: Defining the SPI interface
Taken from, and tested by @TonyMac32 .
Well, the original one was tested by him but I had to adapt the
registers definitions to the new 64-bits LPAE-compliant syntax.
Therefore that *might* break, along with a few other patches.
Signed-off-by: Miouyouyou (Myy) <myy@miouyouyou.fr>
---
arch/arm/boot/dts/rk3288-tinker.dts | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)
diff --git a/arch/arm/boot/dts/rk3288-tinker.dts b/arch/arm/boot/dts/rk3288-tinker.dts
index 96d05fc6b..17bfea298 100644
--- a/arch/arm/boot/dts/rk3288-tinker.dts
+++ b/arch/arm/boot/dts/rk3288-tinker.dts
@@ -99,6 +99,25 @@
supports-sdio;
};
+&spi2 {
+ max-freq = <50000000>;
+ status = "okay";
+
+ spidev@0 {
+ compatible = "rockchip,spi_tinker";
+ reg = <0x0 0>;
+ spi-max-frequency = <50000000>;
+ spi-cpha = <1>;
+ };
+
+ spidev@1 {
+ compatible = "rockchip,spi_tinker";
+ reg = <0x1>;
+ spi-max-frequency = <50000000>;
+ spi-cpha = <1>;
+ };
+};
+
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_xfer>, <&uart0_cts>, <&uart0_rts>;
--
2.16.4

View File

@@ -1,32 +0,0 @@
From 9177b30ab083dbda2bede3b3d61ef71ad4b1ffe0 Mon Sep 17 00:00:00 2001
From: "Miouyouyou (Myy)" <myy@miouyouyou.fr>
Date: Thu, 1 Nov 2018 21:31:26 +0100
Subject: [PATCH 2/2] arm: dts: veyron: Added a flag to disable cache flush
during reset
Flushing the MMC cache of ASUS Chromebooks during initialization or
"recovery" generates 10 minutes hangup, according to @SolidHal.
This is an adaptation of @SolidHal, in order to pinpoint the fix to
Veyron Chromebooks, and avoiding issues other RK3288 boards.
Signed-off-by: Miouyouyou (Myy) <myy@miouyouyou.fr>
---
arch/arm/boot/dts/rk3288-veyron.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/boot/dts/rk3288-veyron.dtsi b/arch/arm/boot/dts/rk3288-veyron.dtsi
index 2075120cf..fa4951fd7 100644
--- a/arch/arm/boot/dts/rk3288-veyron.dtsi
+++ b/arch/arm/boot/dts/rk3288-veyron.dtsi
@@ -123,6 +123,7 @@
mmc-hs200-1_8v;
mmc-pwrseq = <&emmc_pwrseq>;
non-removable;
+ no-recovery-cache-flush;
pinctrl-names = "default";
pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>;
};
--
2.16.4

View File

@@ -27,9 +27,9 @@ diff --git a/drivers/net/wireless/ath/ath9k/hif_usb.c b/drivers/net/wireless/ath
usb_anchor_urb(urb, &hif_dev->regout_submitted);
ret = usb_submit_urb(urb, GFP_KERNEL);
@@ -723,11 +723,11 @@
return;
}
@@ -735,11 +735,11 @@
rx_buf->skb = nskb;
+ usb_fill_bulk_urb(urb, hif_dev->udev,
+ usb_rcvbulkpipe(hif_dev->udev,
@@ -38,7 +38,7 @@ diff --git a/drivers/net/wireless/ath/ath9k/hif_usb.c b/drivers/net/wireless/ath
USB_REG_IN_PIPE),
nskb->data, MAX_REG_IN_BUF_SIZE,
+ ath9k_hif_usb_reg_in_cb, nskb);
- ath9k_hif_usb_reg_in_cb, nskb, 1);
- ath9k_hif_usb_reg_in_cb, rx_buf, 1);
}
resubmit:

View File

@@ -1,25 +0,0 @@
diff --git a/arch/arm/boot/dts/rk3288-tinker.dtsi b/arch/arm/boot/dts/rk3288-tinker.dtsi
index f88c913ff..7f04ccbdf 100644
--- a/arch/arm/boot/dts/rk3288-tinker.dtsi
+++ b/arch/arm/boot/dts/rk3288-tinker.dtsi
@@ -547,3 +547,20 @@
&gpiomem {
status = "okay";
};
+
+&emmc {
+ bus-width = <8>;
+ cap-mmc-highspeed;
+ non-removable;
+ pinctrl-names = "default";
+ pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_pwr &emmc_bus8>;
+ max-frequency = <150000000>;
+ mmc-hs200-1_8v;
+ mmc-ddr-1_8v;
+ status = "okay";
+};
+
+&hdmi {
+ pinctrl-names = "default";
+ pinctrl-0 = <&hdmi_cec_c0>;
+};

View File

@@ -1,13 +0,0 @@
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 37a3de760..6bcfceede 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -832,6 +832,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
rk3188-radxarock.dtb \
rk3228-evb.dtb \
rk3229-evb.dtb \
+ rk3288-xt-q8l-v10.dtb \
rk3229-xms6.dtb \
rk3288-evb-act8846.dtb \
rk3288-evb-rk808.dtb \

View File

@@ -1,103 +0,0 @@
diff --git a/drivers/media/rc/keymaps/rc-xt-q8l-v10.c b/drivers/media/rc/keymaps/rc-xt-q8l-v10.c
index e69de29..19c7d9e 100644
--- /dev/null
+++ b/drivers/media/rc/keymaps/rc-xt-q8l-v10.c
@@ -0,0 +1,76 @@
+// SPDX-License-Identifier: GPL-2.0+
+// rc-xt-q8l-v10.c - Keytable for xt-q8l-v10 tv box remote controller
+//
+// keymap imported from ir-keymaps.c
+//
+// Copyright (c) 2018 Paolo Sabatino
+
+#include <media/rc-map.h>
+#include <linux/module.h>
+
+/*
+
+*/
+
+static struct rc_map_table xt_q8l_v10[] = {
+
+ { 0xcc1d11, KEY_ENTER },
+ { 0xcc1d00, KEY_POWER },
+ { 0xcc1d15, KEY_PLAYPAUSE },
+ { 0xcc1d16, KEY_STOP },
+ { 0xcc1d06, KEY_PREVIOUSSONG },
+ { 0xcc1d0a, KEY_NEXTSONG },
+ { 0xcc1d41, KEY_1 },
+ { 0xcc1d45, KEY_2 },
+ { 0xcc1d4d, KEY_3 },
+ { 0xcc1d42, KEY_4 },
+ { 0xcc1d46, KEY_5 },
+ { 0xcc1d4e, KEY_6 },
+ { 0xcc1d43, KEY_7 },
+ { 0xcc1d47, KEY_8 },
+ { 0xcc1d4f, KEY_9 },
+ { 0xcc1d49, KEY_0 },
+ { 0xcc1d4a, KEY_BACKSPACE },
+ { 0xcc1d48, KEY_F6 },
+ { 0xcc1d03, KEY_HOME },
+ { 0xcc1d0f, KEY_BACK },
+ { 0xcc1d40, KEY_MENU },
+ { 0xcc1d4c, KEY_TEXT },
+ { 0xcc1d10, KEY_LEFT },
+ { 0xcc1d12, KEY_RIGHT },
+ { 0xcc1d44, KEY_DOWN },
+ { 0xcc1d07, KEY_UP },
+ { 0xcc1d02, KEY_VOLUMEDOWN },
+ { 0xcc1d0c, KEY_MUTE },
+ { 0xcc1d0e, KEY_VOLUMEUP },
+ { 0xcc1d01, KEY_F1 },
+ { 0xcc1d05, KEY_F2 },
+ { 0xcc1d09, KEY_F3 },
+ { 0xcc1d0d, KEY_F4 },
+
+};
+
+static struct rc_map_list xt_q8l_v10_map = {
+ .map = {
+ .scan = xt_q8l_v10,
+ .size = ARRAY_SIZE(xt_q8l_v10),
+ .rc_proto = RC_PROTO_NEC, /* Legacy IR type */
+ .name = RC_MAP_XT_Q8L_V10,
+ }
+};
+
+static int __init init_rc_map_xt_q8l_v10(void)
+{
+ return rc_map_register(&xt_q8l_v10_map);
+}
+
+static void __exit exit_rc_map_xt_q8l_v10(void)
+{
+ rc_map_unregister(&xt_q8l_v10_map);
+}
+
+module_init(init_rc_map_xt_q8l_v10)
+module_exit(exit_rc_map_xt_q8l_v10)
+
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("Paolo Sabatino");
diff --git a/include/media/rc-map.h b/include/media/rc-map.h
index d621acadf..ad7abdb97 100644
--- a/include/media/rc-map.h
+++ b/include/media/rc-map.h
@@ -278,6 +278,7 @@ struct rc_map *rc_map_get(const char *name);
#define RC_MAP_WINFAST_USBII_DELUXE "rc-winfast-usbii-deluxe"
#define RC_MAP_SU3000 "rc-su3000"
#define RC_MAP_XBOX_DVD "rc-xbox-dvd"
+#define RC_MAP_XT_Q8L_V10 "rc-xt-q8l-v10"
#define RC_MAP_X96MAX "rc-x96max"
/*
diff --git a/drivers/media/rc/keymaps/Makefile b/drivers/media/rc/keymaps/Makefile
index 5b1399af6..ec9ce1206 100644
--- a/drivers/media/rc/keymaps/Makefile
+++ b/drivers/media/rc/keymaps/Makefile
@@ -117,4 +117,5 @@ obj-$(CONFIG_RC_MAP) += rc-adstech-dvb-t-pci.o \
rc-winfast-usbii-deluxe.o \
rc-su3000.o \
rc-xbox-dvd.o \
+ rc-xt-q8l-v10.o \
rc-x96max.o \

View File

@@ -0,0 +1,37 @@
From cd1aac268ff58eea28153bbabfb33abc2df52b1f Mon Sep 17 00:00:00 2001
Message-Id: <cd1aac268ff58eea28153bbabfb33abc2df52b1f.1602103621.git.stefan@agner.ch>
From: Pascal Vizeli <pvizeli@syshack.ch>
Date: Fri, 24 Apr 2020 12:41:50 +0000
Subject: [PATCH 1/4] SPL: modify load address of U-Boot
Default load address of U-Boot is at sector 16384, which is where HAOS
has its first partition. Use 0x2000 (8192) instead.
Signed-off-by: Pascal Vizeli <pvizeli@syshack.ch>
Signed-off-by: Stefan Agner <stefan@agner.ch>
---
configs/tinker-rk3288_defconfig | 1 +
configs/tinker-s-rk3288_defconfig | 1 +
2 files changed, 2 insertions(+)
diff --git a/configs/tinker-rk3288_defconfig b/configs/tinker-rk3288_defconfig
index d459c7f50d..e0682ed479 100644
--- a/configs/tinker-rk3288_defconfig
+++ b/configs/tinker-rk3288_defconfig
@@ -88,3 +88,4 @@ CONFIG_VIDEO_ROCKCHIP=y
CONFIG_DISPLAY_ROCKCHIP_HDMI=y
CONFIG_CMD_DHRYSTONE=y
CONFIG_ERRNO_STR=y
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x2000
diff --git a/configs/tinker-s-rk3288_defconfig b/configs/tinker-s-rk3288_defconfig
index 68411d863b..1a285baf73 100644
--- a/configs/tinker-s-rk3288_defconfig
+++ b/configs/tinker-s-rk3288_defconfig
@@ -90,3 +90,4 @@ CONFIG_DISPLAY_ROCKCHIP_HDMI=y
CONFIG_CONSOLE_SCROLL_LINES=10
CONFIG_CMD_DHRYSTONE=y
CONFIG_ERRNO_STR=y
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x2000
--
2.28.0

View File

@@ -1,23 +0,0 @@
From 17735a28503d90db2a7173816861750f475580ea Mon Sep 17 00:00:00 2001
From: Pascal Vizeli <pvizeli@syshack.ch>
Date: Fri, 24 Apr 2020 12:41:50 +0000
Subject: [PATCH 1/1] TLP: Modify entrypoint for u-boot
Signed-off-by: Pascal Vizeli <pvizeli@syshack.ch>
---
configs/tinker-rk3288_defconfig | 2 ++
1 file changed, 2 insertions(+)
diff --git a/configs/tinker-rk3288_defconfig b/configs/tinker-rk3288_defconfig
index 83c3450839..648a7904be 100644
--- a/configs/tinker-rk3288_defconfig
+++ b/configs/tinker-rk3288_defconfig
@@ -84,3 +84,5 @@ CONFIG_USB_ETHER_ASIX=y
CONFIG_USB_ETHER_SMSC95XX=y
CONFIG_CMD_DHRYSTONE=y
CONFIG_ERRNO_STR=y
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x3000
+
--
2.17.1

View File

@@ -0,0 +1,55 @@
From d49ad12ee89d0d64f1f594bcad7de0e4f9631add Mon Sep 17 00:00:00 2001
Message-Id: <d49ad12ee89d0d64f1f594bcad7de0e4f9631add.1602103621.git.stefan@agner.ch>
In-Reply-To: <cd1aac268ff58eea28153bbabfb33abc2df52b1f.1602103621.git.stefan@agner.ch>
References: <cd1aac268ff58eea28153bbabfb33abc2df52b1f.1602103621.git.stefan@agner.ch>
From: Stefan Agner <stefan@agner.ch>
Date: Fri, 4 Sep 2020 15:40:55 +0200
Subject: [PATCH 2/4] rockchip: dts: tinker: move i2c node to shared device
tree
The I2C EEPROM is present on Tinker Board S as well. Move the i2c node
to the shared, U-Boot specific rk3288-tinker-u-boot.dtsi device tree.
Cc: Jonas Karlman <jonas@kwiboo.se>
Signed-off-by: Stefan Agner <stefan@agner.ch>
---
arch/arm/dts/rk3288-tinker-u-boot.dtsi | 7 +++++++
arch/arm/dts/rk3288-tinker.dts | 7 -------
2 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/arch/arm/dts/rk3288-tinker-u-boot.dtsi b/arch/arm/dts/rk3288-tinker-u-boot.dtsi
index 732aa4f91f..3d169906fd 100644
--- a/arch/arm/dts/rk3288-tinker-u-boot.dtsi
+++ b/arch/arm/dts/rk3288-tinker-u-boot.dtsi
@@ -17,6 +17,13 @@
rockchip,sdram-params = <0x20d266a4 0x5b6 2 533000000 6 9 0>;
};
+&i2c2 {
+ m24c08@50 {
+ compatible = "at,24c08", "i2c-eeprom";
+ reg = <0x50>;
+ };
+};
+
&pinctrl {
u-boot,dm-pre-reloc;
};
diff --git a/arch/arm/dts/rk3288-tinker.dts b/arch/arm/dts/rk3288-tinker.dts
index 4b8405fd82..338670123b 100644
--- a/arch/arm/dts/rk3288-tinker.dts
+++ b/arch/arm/dts/rk3288-tinker.dts
@@ -35,10 +35,3 @@
vbus-supply = <&vcc5v0_host>;
status = "okay";
};
-
-&i2c2 {
- m24c08@50 {
- compatible = "at,24c08", "i2c-eeprom";
- reg = <0x50>;
- };
-};
--
2.28.0

View File

@@ -0,0 +1,34 @@
From 07a02625ba95f68ba670b4c1cc98567acb390195 Mon Sep 17 00:00:00 2001
Message-Id: <07a02625ba95f68ba670b4c1cc98567acb390195.1602103621.git.stefan@agner.ch>
In-Reply-To: <cd1aac268ff58eea28153bbabfb33abc2df52b1f.1602103621.git.stefan@agner.ch>
References: <cd1aac268ff58eea28153bbabfb33abc2df52b1f.1602103621.git.stefan@agner.ch>
From: Stefan Agner <stefan@agner.ch>
Date: Fri, 4 Sep 2020 15:44:38 +0200
Subject: [PATCH 3/4] rockchip: dts: tinker: remove unnecessary node
The property reg-shift with the same value is present in the base
device tree already. Remove unnecessary node from rk3288-tinker.dts.
Signed-off-by: Stefan Agner <stefan@agner.ch>
---
arch/arm/dts/rk3288-tinker.dts | 4 ----
1 file changed, 4 deletions(-)
diff --git a/arch/arm/dts/rk3288-tinker.dts b/arch/arm/dts/rk3288-tinker.dts
index 338670123b..8b1848c310 100644
--- a/arch/arm/dts/rk3288-tinker.dts
+++ b/arch/arm/dts/rk3288-tinker.dts
@@ -27,10 +27,6 @@
status = "okay";
};
-&uart2 {
- reg-shift = <2>;
-};
-
&usb_host1 {
vbus-supply = <&vcc5v0_host>;
status = "okay";
--
2.28.0

View File

@@ -1,7 +1,10 @@
From 4147d34a63f74f78a8ff9a3dcf2f4c9cd8d6be3a Mon Sep 17 00:00:00 2001
From 549d98c233b2a8b7cd4b0d4eb9652ad60a8a0f75 Mon Sep 17 00:00:00 2001
Message-Id: <549d98c233b2a8b7cd4b0d4eb9652ad60a8a0f75.1602103621.git.stefan@agner.ch>
In-Reply-To: <cd1aac268ff58eea28153bbabfb33abc2df52b1f.1602103621.git.stefan@agner.ch>
References: <cd1aac268ff58eea28153bbabfb33abc2df52b1f.1602103621.git.stefan@agner.ch>
From: Pascal Vizeli <pvizeli@syshack.ch>
Date: Fri, 24 Apr 2020 11:37:55 +0000
Subject: [PATCH 1/1] pmic: enable LDO2 vcc33_mipi at bootup
Subject: [PATCH 4/4] pmic: enable LDO2 vcc33_mipi at bootup
Signed-off-by: Pascal Vizeli <pvizeli@syshack.ch>
---
@@ -9,10 +12,10 @@ Signed-off-by: Pascal Vizeli <pvizeli@syshack.ch>
1 file changed, 37 insertions(+)
diff --git a/board/rockchip/tinker_rk3288/tinker-rk3288.c b/board/rockchip/tinker_rk3288/tinker-rk3288.c
index 7af39e10cd..f12409933d 100644
index f85209c649..6fa1bb0c66 100644
--- a/board/rockchip/tinker_rk3288/tinker-rk3288.c
+++ b/board/rockchip/tinker_rk3288/tinker-rk3288.c
@@ -12,6 +12,7 @@
@@ -13,6 +13,7 @@
#include <netdev.h>
#include <asm/arch-rockchip/bootrom.h>
#include <asm/io.h>
@@ -20,7 +23,7 @@ index 7af39e10cd..f12409933d 100644
static int get_ethaddr_from_eeprom(u8 *addr)
{
@@ -47,3 +48,39 @@ int mmc_get_env_dev(void)
@@ -48,3 +49,39 @@ int mmc_get_env_dev(void)
return 1;
}
@@ -61,5 +64,5 @@ index 7af39e10cd..f12409933d 100644
+}
+#endif
--
2.17.1
2.28.0

View File

@@ -27,7 +27,11 @@ setenv bootargs_b "root=PARTUUID=a3ec664e-32ce-4665-95ea-7ae90ce9aa20 rootfstype
fileenv mmc ${devnum}:1 ${ramdisk_addr_r} cmdline.txt cmdline
# Load device tree
fatload mmc ${devnum}:1 ${fdt_addr_r} rk3288-tinker.dtb
if test "$devnum" = "0"; then
fatload mmc ${devnum}:1 ${fdt_addr_r} rk3288-tinker-s.dtb
else
fatload mmc ${devnum}:1 ${fdt_addr_r} rk3288-tinker.dtb
fi
setenv bootargs
for BOOT_SLOT in "${BOOT_ORDER}"; do

View File

@@ -18,13 +18,6 @@ test -n "${BOOT_ORDER}" || setenv BOOT_ORDER "A B"
test -n "${BOOT_A_LEFT}" || setenv BOOT_A_LEFT 3
test -n "${BOOT_B_LEFT}" || setenv BOOT_B_LEFT 3
if load mmc ${devnum}:1 ${ramdisk_addr_r} config.txt; then
env import -t ${ramdisk_addr_r} ${filesize};
fi
# Board bootargs
setenv bootargs_odroidc2 ""
# HassOS bootargs
setenv bootargs_hassos "zram.enabled=1 zram.num_devices=3 apparmor=1 security=apparmor systemd.machine_id=${MACHINE_ID} cgroup_enable=memory"
@@ -57,14 +50,14 @@ for BOOT_SLOT in "${BOOT_ORDER}"; do
setexpr BOOT_A_LEFT ${BOOT_A_LEFT} - 1
echo "Found valid slot A, ${BOOT_A_LEFT} attempts remaining"
setenv load_kernel "ext4load mmc ${devnum}:5 ${kernel_addr_r} Image"
setenv bootargs "${bootargs_hassos} ${bootargs_odroidc2} ${bootargs_a} rauc.slot=A ${cmdline}"
setenv bootargs "${bootargs_hassos} ${bootargs_a} rauc.slot=A ${cmdline}"
fi
elif test "x${BOOT_SLOT}" = "xB"; then
if test ${BOOT_B_LEFT} -gt 0; then
setexpr BOOT_B_LEFT ${BOOT_B_LEFT} - 1
echo "Found valid slot B, ${BOOT_B_LEFT} attempts remaining"
setenv load_kernel "ext4load mmc ${devnum}:7 ${kernel_addr_r} Image"
setenv bootargs "${bootargs_hassos} ${bootargs_odroidc2} ${bootargs_b} rauc.slot=B ${cmdline}"
setenv bootargs "${bootargs_hassos} ${bootargs_b} rauc.slot=B ${cmdline}"
fi
fi
done

View File

@@ -1,3 +1,4 @@
CONFIG_DOS_PARTITION=y
# CONFIG_EFI_PARTITION is not set
# CONFIG_USB_STORAGE is not set
CONFIG_DISPLAY_BOARDINFO=y

View File

@@ -7,7 +7,7 @@ function hassos_pre_image() {
local SPL_IMG="$(path_spl_img)"
cp "${BINARIES_DIR}/boot.scr" "${BOOT_DATA}/boot.scr"
cp "${BINARIES_DIR}/meson-g12b-odroid-n2.dtb" "${BOOT_DATA}/meson-g12b-odroid-n2.dtb"
cp "${BINARIES_DIR}"/*.dtb "${BOOT_DATA}/"
echo "console=tty0 console=ttyAML0,115200n8" > "${BOOT_DATA}/cmdline.txt"

View File

@@ -18,13 +18,6 @@ test -n "${BOOT_ORDER}" || setenv BOOT_ORDER "A B"
test -n "${BOOT_A_LEFT}" || setenv BOOT_A_LEFT 3
test -n "${BOOT_B_LEFT}" || setenv BOOT_B_LEFT 3
if load mmc ${devnum}:1 ${ramdisk_addr_r} config.txt; then
env import -t ${ramdisk_addr_r} ${filesize};
fi
# Board bootargs
setenv bootargs_odroidn2 ""
# HassOS bootargs
setenv bootargs_hassos "zram.enabled=1 zram.num_devices=3 apparmor=1 security=apparmor systemd.machine_id=${MACHINE_ID} cgroup_enable=memory"
@@ -36,7 +29,11 @@ usb start
# Load extraargs
fileenv mmc ${devnum}:1 ${ramdisk_addr_r} cmdline.txt cmdline
fatload mmc ${devnum}:1 ${fdt_addr_r} meson-g12b-odroid-n2.dtb
if test "${board_rev}" = "c"; then
fatload mmc ${devnum}:1 ${fdt_addr_r} meson-g12b-odroid-n2-plus.dtb
else
fatload mmc ${devnum}:1 ${fdt_addr_r} meson-g12b-odroid-n2.dtb
fi
# logical volumes get numbered after physical ones.
# 1. boot
@@ -57,14 +54,14 @@ for BOOT_SLOT in "${BOOT_ORDER}"; do
setexpr BOOT_A_LEFT ${BOOT_A_LEFT} - 1
echo "Found valid slot A, ${BOOT_A_LEFT} attempts remaining"
setenv load_kernel "ext4load mmc ${devnum}:5 ${kernel_addr_r} Image"
setenv bootargs "${bootargs_hassos} ${bootargs_odroidn2} ${bootargs_a} rauc.slot=A ${cmdline}"
setenv bootargs "${bootargs_hassos} ${bootargs_a} rauc.slot=A ${cmdline}"
fi
elif test "x${BOOT_SLOT}" = "xB"; then
if test ${BOOT_B_LEFT} -gt 0; then
setexpr BOOT_B_LEFT ${BOOT_B_LEFT} - 1
echo "Found valid slot B, ${BOOT_B_LEFT} attempts remaining"
setenv load_kernel "ext4load mmc ${devnum}:7 ${kernel_addr_r} Image"
setenv bootargs "${bootargs_hassos} ${bootargs_odroidn2} ${bootargs_b} rauc.slot=B ${cmdline}"
setenv bootargs "${bootargs_hassos} ${bootargs_b} rauc.slot=B ${cmdline}"
fi
fi
done

View File

@@ -1,3 +1,4 @@
CONFIG_DOS_PARTITION=y
# CONFIG_EFI_PARTITION is not set
# CONFIG_USB_STORAGE is not set
CONFIG_DISPLAY_BOARDINFO=y

View File

@@ -20,13 +20,6 @@ test -n "${BOOT_ORDER}" || setenv BOOT_ORDER "A B"
test -n "${BOOT_A_LEFT}" || setenv BOOT_A_LEFT 3
test -n "${BOOT_B_LEFT}" || setenv BOOT_B_LEFT 3
if load mmc ${devnum}:1 ${ramdisk_addr_r} config.txt; then
env import -t ${ramdisk_addr_r} ${filesize};
fi
# Board bootargs
setenv bootargs_odroidxu4 ""
# HassOS bootargs
setenv bootargs_hassos "zram.enabled=1 zram.num_devices=3 apparmor=1 security=apparmor systemd.machine_id=${MACHINE_ID} cgroup_enable=memory"
@@ -61,14 +54,14 @@ for BOOT_SLOT in "${BOOT_ORDER}"; do
setexpr BOOT_A_LEFT ${BOOT_A_LEFT} - 1
echo "Found valid slot A, ${BOOT_A_LEFT} attempts remaining"
setenv load_kernel "ext4load mmc ${devnum}:5 ${kernel_addr_r} zImage"
setenv bootargs "${bootargs_hassos} ${bootargs_odroidxu4} ${bootargs_a} rauc.slot=A ${cmdline}"
setenv bootargs "${bootargs_hassos} ${bootargs_a} rauc.slot=A ${cmdline}"
fi
elif test "x${BOOT_SLOT}" = "xB"; then
if test ${BOOT_B_LEFT} -gt 0; then
setexpr BOOT_B_LEFT ${BOOT_B_LEFT} - 1
echo "Found valid slot B, ${BOOT_B_LEFT} attempts remaining"
setenv load_kernel "ext4load mmc ${devnum}:7 ${kernel_addr_r} zImage"
setenv bootargs "${bootargs_hassos} ${bootargs_odroidxu4} ${bootargs_b} rauc.slot=B ${cmdline}"
setenv bootargs "${bootargs_hassos} ${bootargs_b} rauc.slot=B ${cmdline}"
fi
fi
done

View File

@@ -1,43 +0,0 @@
From e2b93751cfd0722801b65b4603b588ab9df4c12b Mon Sep 17 00:00:00 2001
From: Jerome Brunet <jbrunet@baylibre.com>
Date: Tue, 21 Apr 2020 18:39:30 +0200
Subject: [PATCH 2/8] arm64: defconfig: enable meson gx audio as module
Enable the module config for the Amlogic GX audio card.
This module will imply the internal components usually associated
with it to make a functional sound card on these platforms.
Also enable the simple amplifier module which often used on the
output stage of those cards.
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Tested-by: Christian Hewitt <christianshewitt@gmail.com>
Link: https://lore.kernel.org/r/20200421163935.775935-2-jbrunet@baylibre.com
---
arch/arm64/configs/defconfig | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index 03d0189f7d68..ceb60ee9c340 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -644,6 +644,7 @@ CONFIG_SND_HDA_CODEC_HDMI=m
CONFIG_SND_SOC=y
CONFIG_SND_BCM2835_SOC_I2S=m
CONFIG_SND_MESON_AXG_SOUND_CARD=m
+CONFIG_SND_MESON_GX_SOUND_CARD=m
CONFIG_SND_SOC_SDM845=m
CONFIG_SND_SOC_ROCKCHIP=m
CONFIG_SND_SOC_ROCKCHIP_SPDIF=m
@@ -656,6 +657,7 @@ CONFIG_SND_SOC_AK4613=m
CONFIG_SND_SOC_ES7134=m
CONFIG_SND_SOC_ES7241=m
CONFIG_SND_SOC_PCM3168A_I2C=m
+CONFIG_SND_SOC_SIMPLE_AMPLIFIER=m
CONFIG_SND_SOC_TAS571X=m
CONFIG_SND_SOC_WCD934X=m
CONFIG_SND_SOC_WSA881X=m
--
2.17.1

View File

@@ -0,0 +1,124 @@
From f6fce2e974fe091fd233301bd7c127ca18304039 Mon Sep 17 00:00:00 2001
Message-Id: <f6fce2e974fe091fd233301bd7c127ca18304039.1603303549.git.stefan@agner.ch>
From: Jerome Brunet <jbrunet@baylibre.com>
Date: Mon, 19 Oct 2020 19:07:02 +0200
Subject: [PATCH] usb: cdc-acm: fix cooldown mechanism
Commit a4e7279cd1d1 ("cdc-acm: introduce a cool down") is causing
regression if there is some USB error, such as -EPROTO.
This has been reported on some samples of the Odroid-N2 using the Combee II
Zibgee USB dongle.
> struct acm *acm = container_of(work, struct acm, work)
is incorrect in case of a delayed work and causes warnings, usually from
the workqueue:
> WARNING: CPU: 0 PID: 0 at kernel/workqueue.c:1474 __queue_work+0x480/0x528.
When this happens, USB eventually stops working completely after a while.
Also the ACM_ERROR_DELAY bit is never set, so the cooldown mechanism
previously introduced cannot be triggered and acm_submit_read_urb() is
never called.
This changes makes the cdc-acm driver use a single delayed work, fixing the
pointer arithmetic in acm_softint() and set the ACM_ERROR_DELAY when the
cooldown mechanism appear to be needed.
Fixes: a4e7279cd1d1 ("cdc-acm: introduce a cool down")
Reported-by: Pascal Vizeli <pascal.vizeli@nabucasa.com>
Cc: Oliver Neukum <oneukum@suse.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
---
drivers/usb/class/cdc-acm.c | 12 +++++-------
drivers/usb/class/cdc-acm.h | 3 +--
2 files changed, 6 insertions(+), 9 deletions(-)
diff --git a/drivers/usb/class/cdc-acm.c b/drivers/usb/class/cdc-acm.c
index 7f6f3ab5b8a6..8f087499196a 100644
--- a/drivers/usb/class/cdc-acm.c
+++ b/drivers/usb/class/cdc-acm.c
@@ -507,6 +507,7 @@ static void acm_read_bulk_callback(struct urb *urb)
"%s - cooling babbling device\n", __func__);
usb_mark_last_busy(acm->dev);
set_bit(rb->index, &acm->urbs_in_error_delay);
+ set_bit(ACM_ERROR_DELAY, &acm->flags);
cooldown = true;
break;
default:
@@ -532,7 +533,7 @@ static void acm_read_bulk_callback(struct urb *urb)
if (stopped || stalled || cooldown) {
if (stalled)
- schedule_work(&acm->work);
+ schedule_delayed_work(&acm->dwork, 0);
else if (cooldown)
schedule_delayed_work(&acm->dwork, HZ / 2);
return;
@@ -562,13 +563,13 @@ static void acm_write_bulk(struct urb *urb)
acm_write_done(acm, wb);
spin_unlock_irqrestore(&acm->write_lock, flags);
set_bit(EVENT_TTY_WAKEUP, &acm->flags);
- schedule_work(&acm->work);
+ schedule_delayed_work(&acm->dwork, 0);
}
static void acm_softint(struct work_struct *work)
{
int i;
- struct acm *acm = container_of(work, struct acm, work);
+ struct acm *acm = container_of(work, struct acm, dwork.work);
if (test_bit(EVENT_RX_STALL, &acm->flags)) {
smp_mb(); /* against acm_suspend() */
@@ -584,7 +585,7 @@ static void acm_softint(struct work_struct *work)
if (test_and_clear_bit(ACM_ERROR_DELAY, &acm->flags)) {
for (i = 0; i < acm->rx_buflimit; i++)
if (test_and_clear_bit(i, &acm->urbs_in_error_delay))
- acm_submit_read_urb(acm, i, GFP_NOIO);
+ acm_submit_read_urb(acm, i, GFP_KERNEL);
}
if (test_and_clear_bit(EVENT_TTY_WAKEUP, &acm->flags))
@@ -1352,7 +1353,6 @@ static int acm_probe(struct usb_interface *intf,
acm->ctrlsize = ctrlsize;
acm->readsize = readsize;
acm->rx_buflimit = num_rx_buf;
- INIT_WORK(&acm->work, acm_softint);
INIT_DELAYED_WORK(&acm->dwork, acm_softint);
init_waitqueue_head(&acm->wioctl);
spin_lock_init(&acm->write_lock);
@@ -1562,7 +1562,6 @@ static void acm_disconnect(struct usb_interface *intf)
}
acm_kill_urbs(acm);
- cancel_work_sync(&acm->work);
cancel_delayed_work_sync(&acm->dwork);
tty_unregister_device(acm_tty_driver, acm->minor);
@@ -1605,7 +1604,6 @@ static int acm_suspend(struct usb_interface *intf, pm_message_t message)
return 0;
acm_kill_urbs(acm);
- cancel_work_sync(&acm->work);
cancel_delayed_work_sync(&acm->dwork);
acm->urbs_in_error_delay = 0;
diff --git a/drivers/usb/class/cdc-acm.h b/drivers/usb/class/cdc-acm.h
index cd5e9d8ab237..b95ff769072e 100644
--- a/drivers/usb/class/cdc-acm.h
+++ b/drivers/usb/class/cdc-acm.h
@@ -112,8 +112,7 @@ struct acm {
# define ACM_ERROR_DELAY 3
unsigned long urbs_in_error_delay; /* these need to be restarted after a delay */
struct usb_cdc_line_coding line; /* bits, stop, parity */
- struct work_struct work; /* work queue entry for various purposes*/
- struct delayed_work dwork; /* for cool downs needed in error recovery */
+ struct delayed_work dwork; /* work queue entry for various purposes */
unsigned int ctrlin; /* input control lines (DCD, DSR, RI, break, overruns) */
unsigned int ctrlout; /* output control lines (DTR, RTS) */
struct async_icount iocount; /* counters for control line changes */
--
2.28.0

View File

@@ -1,28 +0,0 @@
From 821b8ac21b1675910423ee69d37cb1977b8f271e Mon Sep 17 00:00:00 2001
From: Jerome Brunet <jbrunet@baylibre.com>
Date: Mon, 30 Mar 2020 17:39:04 +0200
Subject: [PATCH 3/8] ASoC: meson: imply acodec glue on axg sound card
When axg card driver support is enabled, lets enable the related
internal DAC glue by default.
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
---
sound/soc/meson/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/sound/soc/meson/Kconfig b/sound/soc/meson/Kconfig
index 8b6295283989..363dc3b1bbe4 100644
--- a/sound/soc/meson/Kconfig
+++ b/sound/soc/meson/Kconfig
@@ -68,6 +68,7 @@ config SND_MESON_AXG_SOUND_CARD
imply SND_MESON_AXG_SPDIFOUT
imply SND_MESON_AXG_SPDIFIN
imply SND_MESON_AXG_PDM
+ imply SND_MESON_G12A_TOACODEC
imply SND_MESON_G12A_TOHDMITX if DRM_MESON_DW_HDMI
help
Select Y or M to add support for the AXG SoC sound card
--
2.17.1

View File

@@ -0,0 +1,31 @@
From 4b9d9159ed5a79ceac5b831012b3cb44cce2516c Mon Sep 17 00:00:00 2001
Message-Id: <4b9d9159ed5a79ceac5b831012b3cb44cce2516c.1602360581.git.stefan@agner.ch>
In-Reply-To: <d35db3d5f943fea569dde8e83f15565254643385.1602360581.git.stefan@agner.ch>
References: <d35db3d5f943fea569dde8e83f15565254643385.1602360581.git.stefan@agner.ch>
From: Christian Hewitt <christianshewitt@gmail.com>
Date: Sun, 19 Jul 2020 14:10:33 +0000
Subject: [PATCH 2/4] dt-bindings: arm: amlogic: add support for the ODROID-N2+
HardKernel ODROID-N2+ uses a revised Amlogic S922X v2 chip that supports
higher cpu clock speeds than the original ODROID-N2.
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
---
Documentation/devicetree/bindings/arm/amlogic.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/arm/amlogic.yaml b/Documentation/devicetree/bindings/arm/amlogic.yaml
index 5eba9f48823e..12ba8d074370 100644
--- a/Documentation/devicetree/bindings/arm/amlogic.yaml
+++ b/Documentation/devicetree/bindings/arm/amlogic.yaml
@@ -153,6 +153,7 @@ properties:
- azw,gtking
- azw,gtking-pro
- hardkernel,odroid-n2
+ - hardkernel,odroid-n2-plus
- khadas,vim3
- ugoos,am6
- const: amlogic,s922x
--
2.28.0

View File

@@ -1,47 +0,0 @@
From 60164df03c6314d8f5f3afef56b0bf97962ec9ee Mon Sep 17 00:00:00 2001
From: Jerome Brunet <jbrunet@baylibre.com>
Date: Mon, 24 Feb 2020 14:35:17 +0100
Subject: [PATCH 4/8] ASoC: meson: gx-card: fix sound-dai dt schema
There is a fair amount of warnings when running 'make dtbs_check' with
amlogic,gx-sound-card.yaml.
Ex:
arch/arm64/boot/dts/amlogic/meson-gxm-q200.dt.yaml: sound: dai-link-0:sound-dai:0:1: missing phandle tag in 0
arch/arm64/boot/dts/amlogic/meson-gxm-q200.dt.yaml: sound: dai-link-0:sound-dai:0:2: missing phandle tag in 0
arch/arm64/boot/dts/amlogic/meson-gxm-q200.dt.yaml: sound: dai-link-0:sound-dai:0: [66, 0, 0] is too long
The reason is that the sound-dai phandle provided has cells, and in such
case the schema should use 'phandle-array' instead of 'phandle'.
Fixes: fd00366b8e41 ("ASoC: meson: gx: add sound card dt-binding documentation")
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
---
.../devicetree/bindings/sound/amlogic,gx-sound-card.yaml | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/sound/amlogic,gx-sound-card.yaml b/Documentation/devicetree/bindings/sound/amlogic,gx-sound-card.yaml
index fb374c659be1..a48222e8cd08 100644
--- a/Documentation/devicetree/bindings/sound/amlogic,gx-sound-card.yaml
+++ b/Documentation/devicetree/bindings/sound/amlogic,gx-sound-card.yaml
@@ -57,7 +57,7 @@ patternProperties:
rate
sound-dai:
- $ref: /schemas/types.yaml#/definitions/phandle
+ $ref: /schemas/types.yaml#/definitions/phandle-array
description: phandle of the CPU DAI
patternProperties:
@@ -71,7 +71,7 @@ patternProperties:
properties:
sound-dai:
- $ref: /schemas/types.yaml#/definitions/phandle
+ $ref: /schemas/types.yaml#/definitions/phandle-array
description: phandle of the codec DAI
required:
--
2.17.1

View File

@@ -0,0 +1,97 @@
From 81b5af6c3ce3e0f312be0897bec0b3c942e2ce97 Mon Sep 17 00:00:00 2001
Message-Id: <81b5af6c3ce3e0f312be0897bec0b3c942e2ce97.1602360581.git.stefan@agner.ch>
In-Reply-To: <d35db3d5f943fea569dde8e83f15565254643385.1602360581.git.stefan@agner.ch>
References: <d35db3d5f943fea569dde8e83f15565254643385.1602360581.git.stefan@agner.ch>
From: Christian Hewitt <christianshewitt@gmail.com>
Date: Sun, 19 Jul 2020 14:10:34 +0000
Subject: [PATCH 3/4] arm64: dts: meson: add support for the ODROID-N2+
HardKernel ODROID-N2+ uses an Amlogic S922X rev. C chip capable of higher
clock speeds than the original ODROID-N2. Hardkernel supports the big cpu
cluster at 2.4GHz and the little cpu cluster at 2.0GHz. Opp points and
regulator changess are from the HardKernel Linux kernel sources.
Suggested-by: Dongjin Kim <tobetter@hardkernel.com>
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
[Integrated Neil Armstrong's feedback from mailing list]
Signed-off-by: Stefan Agner <stefan@agner.ch>
---
arch/arm64/boot/dts/amlogic/Makefile | 1 +
.../dts/amlogic/meson-g12b-odroid-n2-plus.dts | 53 +++++++++++++++++++
2 files changed, 54 insertions(+)
create mode 100644 arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2-plus.dts
diff --git a/arch/arm64/boot/dts/amlogic/Makefile b/arch/arm64/boot/dts/amlogic/Makefile
index 4e2239ffcaa5..b0b3d6791499 100644
--- a/arch/arm64/boot/dts/amlogic/Makefile
+++ b/arch/arm64/boot/dts/amlogic/Makefile
@@ -8,6 +8,7 @@ dtb-$(CONFIG_ARCH_MESON) += meson-g12b-gtking-pro.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-g12b-a311d-khadas-vim3.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-g12b-s922x-khadas-vim3.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-g12b-odroid-n2.dtb
+dtb-$(CONFIG_ARCH_MESON) += meson-g12b-odroid-n2-plus.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-g12b-ugoos-am6.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-gxbb-kii-pro.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-gxbb-nanopi-k2.dtb
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2-plus.dts b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2-plus.dts
new file mode 100644
index 000000000000..4ebb448d233f
--- /dev/null
+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2-plus.dts
@@ -0,0 +1,53 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2019 BayLibre, SAS
+ * Author: Neil Armstrong <narmstrong@baylibre.com>
+ */
+
+/dts-v1/;
+
+#include "meson-g12b-odroid-n2.dtsi"
+
+/ {
+ compatible = "hardkernel,odroid-n2-plus", "amlogic,s922x", "amlogic,g12b";
+ model = "Hardkernel ODROID-N2+";
+};
+
+&vddcpu_a {
+ regulator-min-microvolt = <680000>;
+ regulator-max-microvolt = <1040000>;
+
+ pwms = <&pwm_ab 0 1500 0>;
+};
+
+&vddcpu_b {
+ regulator-min-microvolt = <680000>;
+ regulator-max-microvolt = <1040000>;
+
+ pwms = <&pwm_AO_cd 1 1500 0>;
+};
+
+&cpu_opp_table_0 {
+ opp-1908000000 {
+ opp-hz = /bits/ 64 <1908000000>;
+ opp-microvolt = <1030000>;
+ };
+
+ opp-2016000000 {
+ opp-hz = /bits/ 64 <2016000000>;
+ opp-microvolt = <1040000>;
+ };
+};
+
+&cpub_opp_table_1 {
+ opp-2304000000 {
+ opp-hz = /bits/ 64 <2304000000>;
+ opp-microvolt = <1030000>;
+ };
+
+ opp-2400000000 {
+ opp-hz = /bits/ 64 <2400000000>;
+ opp-microvolt = <1040000>;
+ };
+};
+
--
2.28.0

View File

@@ -1,39 +0,0 @@
From e128dd1ca079c5ee558ab100387d9f81bd4f3980 Mon Sep 17 00:00:00 2001
From: Jerome Brunet <jbrunet@baylibre.com>
Date: Thu, 7 May 2020 00:16:55 +0200
Subject: [PATCH 5/8] arm64: dts: meson: g12: add internal DAC
add internal audio DAC support on the g12 and sm1 SoC family
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Link: https://lore.kernel.org/r/20200506221656.477379-7-jbrunet@baylibre.com
---
arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
index c0aef7d69117..593a006f4b7b 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
@@ -250,6 +250,17 @@
};
};
+ acodec: audio-controller@32000 {
+ compatible = "amlogic,t9015";
+ reg = <0x0 0x32000 0x0 0x14>;
+ #sound-dai-cells = <0>;
+ sound-name-prefix = "ACODEC";
+ clocks = <&clkc CLKID_AUDIO_CODEC>;
+ clock-names = "pclk";
+ resets = <&reset RESET_AUDIO_CODEC>;
+ status = "disabled";
+ };
+
periphs: bus@34400 {
compatible = "simple-bus";
reg = <0x0 0x34400 0x0 0x400>;
--
2.17.1

View File

@@ -0,0 +1,38 @@
From 6a7c42785788faa862aeb7902cb2b3b08f033ca0 Mon Sep 17 00:00:00 2001
Message-Id: <6a7c42785788faa862aeb7902cb2b3b08f033ca0.1602360581.git.stefan@agner.ch>
In-Reply-To: <d35db3d5f943fea569dde8e83f15565254643385.1602360581.git.stefan@agner.ch>
References: <d35db3d5f943fea569dde8e83f15565254643385.1602360581.git.stefan@agner.ch>
From: Stefan Agner <stefan@agner.ch>
Date: Thu, 27 Aug 2020 23:29:57 +0200
Subject: [PATCH 4/4] clk: meson: g12a: mark fclk_div2 as critical
On Amlogic Meson G12b platform, similar to fclk_div3, the fclk_div2
seems to be necessary for the system to operate correctly as well.
Typically, the clock also gets chosen by the eMMC peripheral. This
probably masked the problem so far. However, when booting from a SD
card the clock seems to get disabled which leads to a system freeze.
Let's mark this clock as critical, fixing boot from SD card on G12b
platforms.
Signed-off-by: Stefan Agner <stefan@agner.ch>
---
drivers/clk/meson/g12a.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/clk/meson/g12a.c b/drivers/clk/meson/g12a.c
index 9803d44bb157..9a6722a1dc19 100644
--- a/drivers/clk/meson/g12a.c
+++ b/drivers/clk/meson/g12a.c
@@ -298,6 +298,7 @@ static struct clk_regmap g12a_fclk_div2 = {
&g12a_fclk_div2_div.hw
},
.num_parents = 1,
+ .flags = CLK_IS_CRITICAL,
},
};
--
2.28.0

View File

@@ -1,39 +0,0 @@
From 5ea4085da165fd3f3aa211cb3664dd166d0d5fd7 Mon Sep 17 00:00:00 2001
From: Jerome Brunet <jbrunet@baylibre.com>
Date: Thu, 7 May 2020 00:16:56 +0200
Subject: [PATCH 6/8] arm64: dts: meson: g12: add internal DAC glue
add the internal DAC glue support on the g12 and sm1 family
This glue connects the different TDM interfaces of the SoC to
the internal audio DAC codec.
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Link: https://lore.kernel.org/r/20200506221656.477379-8-jbrunet@baylibre.com
---
arch/arm64/boot/dts/amlogic/meson-g12.dtsi | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12.dtsi
index 55d39020ec72..0d14409f509c 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-g12.dtsi
@@ -343,6 +343,15 @@
status = "disabled";
};
+ toacodec: audio-controller@740 {
+ compatible = "amlogic,g12a-toacodec";
+ reg = <0x0 0x740 0x0 0x4>;
+ #sound-dai-cells = <1>;
+ sound-name-prefix = "TOACODEC";
+ resets = <&clkc_audio AUD_RESET_TOACODEC>;
+ status = "disabled";
+ };
+
tohdmitx: audio-controller@744 {
compatible = "amlogic,g12a-tohdmitx";
reg = <0x0 0x744 0x0 0x4>;
--
2.17.1

View File

@@ -1,123 +0,0 @@
From 15b3cef2ea75c4d81cb067264be1cf49c49f81b1 Mon Sep 17 00:00:00 2001
From: Jerome Brunet <jbrunet@baylibre.com>
Date: Mon, 15 Jun 2020 15:38:44 +0200
Subject: [PATCH 7/8] arm64: dts: meson-g12b: odroid-n2: enable audio loopback
Add capture pcm interfaces and loopback routes to the odroid-n2
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
---
.../boot/dts/amlogic/meson-g12b-odroid-n2.dts | 65 +++++++++++++++++--
1 file changed, 61 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts
index 169ea283d4ee..d4421ad164bd 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts
@@ -209,11 +209,28 @@
sound {
compatible = "amlogic,axg-sound-card";
model = "G12B-ODROID-N2";
- audio-aux-devs = <&tdmout_b>;
+ audio-aux-devs = <&tdmout_b>, <&tdmin_a>, <&tdmin_b>,
+ <&tdmin_c>, <&tdmin_lb>;
audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1",
"TDMOUT_B IN 1", "FRDDR_B OUT 1",
"TDMOUT_B IN 2", "FRDDR_C OUT 1",
- "TDM_B Playback", "TDMOUT_B OUT";
+ "TDM_B Playback", "TDMOUT_B OUT",
+ "TDMIN_A IN 4", "TDM_B Loopback",
+ "TDMIN_B IN 4", "TDM_B Loopback",
+ "TDMIN_C IN 4", "TDM_B Loopback",
+ "TDMIN_LB IN 1", "TDM_B Loopback",
+ "TODDR_A IN 0", "TDMIN_A OUT",
+ "TODDR_B IN 0", "TDMIN_A OUT",
+ "TODDR_C IN 0", "TDMIN_A OUT",
+ "TODDR_A IN 1", "TDMIN_B OUT",
+ "TODDR_B IN 1", "TDMIN_B OUT",
+ "TODDR_C IN 1", "TDMIN_B OUT",
+ "TODDR_A IN 2", "TDMIN_C OUT",
+ "TODDR_B IN 2", "TDMIN_C OUT",
+ "TODDR_C IN 2", "TDMIN_C OUT",
+ "TODDR_A IN 6", "TDMIN_LB OUT",
+ "TODDR_B IN 6", "TDMIN_LB OUT",
+ "TODDR_C IN 6", "TDMIN_LB OUT";
assigned-clocks = <&clkc CLKID_MPLL2>,
<&clkc CLKID_MPLL0>,
@@ -236,8 +253,20 @@
sound-dai = <&frddr_c>;
};
- /* 8ch hdmi interface */
dai-link-3 {
+ sound-dai = <&toddr_a>;
+ };
+
+ dai-link-4 {
+ sound-dai = <&toddr_b>;
+ };
+
+ dai-link-5 {
+ sound-dai = <&toddr_c>;
+ };
+
+ /* 8ch hdmi interface */
+ dai-link-6 {
sound-dai = <&tdmif_b>;
dai-format = "i2s";
dai-tdm-slot-tx-mask-0 = <1 1>;
@@ -252,7 +281,7 @@
};
/* hdmi glue */
- dai-link-4 {
+ dai-link-7 {
sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>;
codec {
@@ -476,6 +505,22 @@
status = "okay";
};
+&tdmin_a {
+ status = "okay";
+};
+
+&tdmin_b {
+ status = "okay";
+};
+
+&tdmin_c {
+ status = "okay";
+};
+
+&tdmin_lb {
+ status = "okay";
+};
+
&tdmout_b {
status = "okay";
};
@@ -484,6 +529,18 @@
status = "okay";
};
+&toddr_a {
+ status = "okay";
+};
+
+&toddr_b {
+ status = "okay";
+};
+
+&toddr_c {
+ status = "okay";
+};
+
&uart_AO {
status = "okay";
pinctrl-0 = <&uart_ao_a_pins>;
--
2.17.1

View File

@@ -1,168 +0,0 @@
From 978cc250574b7f1ab45f494cc2a094e3c9fd1fa4 Mon Sep 17 00:00:00 2001
From: Jerome Brunet <jbrunet@baylibre.com>
Date: Mon, 15 Jun 2020 16:34:37 +0200
Subject: [PATCH 8/8] arm64: dts: meson: odroid-n2: add jack audio output
support
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
---
.../boot/dts/amlogic/meson-g12b-odroid-n2.dts | 79 +++++++++++++++++--
1 file changed, 74 insertions(+), 5 deletions(-)
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts
index d4421ad164bd..34fffa6d859d 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts
@@ -9,6 +9,7 @@
#include "meson-g12b-s922x.dtsi"
#include <dt-bindings/input/input.h>
#include <dt-bindings/gpio/meson-g12a-gpio.h>
+#include <dt-bindings/sound/meson-g12a-toacodec.h>
#include <dt-bindings/sound/meson-g12a-tohdmitx.h>
/ {
@@ -20,6 +21,14 @@
ethernet0 = &ethmac;
};
+ dioo2133: audio-amplifier-0 {
+ compatible = "simple-audio-amplifier";
+ enable-gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_HIGH>;
+ VCC-supply = <&vcc_5v>;
+ sound-name-prefix = "U19";
+ status = "okay";
+ };
+
chosen {
stdout-path = "serial0:115200n8";
};
@@ -209,16 +218,26 @@
sound {
compatible = "amlogic,axg-sound-card";
model = "G12B-ODROID-N2";
- audio-aux-devs = <&tdmout_b>, <&tdmin_a>, <&tdmin_b>,
- <&tdmin_c>, <&tdmin_lb>;
+ audio-widgets = "Line", "Lineout";
+ audio-aux-devs = <&tdmout_b>, <&tdmout_c>, <&tdmin_a>,
+ <&tdmin_b>, <&tdmin_c>, <&tdmin_lb>,
+ <&dioo2133>;
audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1",
"TDMOUT_B IN 1", "FRDDR_B OUT 1",
"TDMOUT_B IN 2", "FRDDR_C OUT 1",
"TDM_B Playback", "TDMOUT_B OUT",
+ "TDMOUT_C IN 0", "FRDDR_A OUT 2",
+ "TDMOUT_C IN 1", "FRDDR_B OUT 2",
+ "TDMOUT_C IN 2", "FRDDR_C OUT 2",
+ "TDM_C Playback", "TDMOUT_C OUT",
"TDMIN_A IN 4", "TDM_B Loopback",
"TDMIN_B IN 4", "TDM_B Loopback",
"TDMIN_C IN 4", "TDM_B Loopback",
"TDMIN_LB IN 1", "TDM_B Loopback",
+ "TDMIN_A IN 5", "TDM_C Loopback",
+ "TDMIN_B IN 5", "TDM_C Loopback",
+ "TDMIN_C IN 5", "TDM_C Loopback",
+ "TDMIN_LB IN 2", "TDM_C Loopback",
"TODDR_A IN 0", "TDMIN_A OUT",
"TODDR_B IN 0", "TDMIN_A OUT",
"TODDR_C IN 0", "TDMIN_A OUT",
@@ -230,7 +249,11 @@
"TODDR_C IN 2", "TDMIN_C OUT",
"TODDR_A IN 6", "TDMIN_LB OUT",
"TODDR_B IN 6", "TDMIN_LB OUT",
- "TODDR_C IN 6", "TDMIN_LB OUT";
+ "TODDR_C IN 6", "TDMIN_LB OUT",
+ "U19 INL", "ACODEC LOLP",
+ "U19 INR", "ACODEC LORP",
+ "Lineout", "U19 OUTL",
+ "Lineout", "U19 OUTR";
assigned-clocks = <&clkc CLKID_MPLL2>,
<&clkc CLKID_MPLL0>,
@@ -275,22 +298,56 @@
dai-tdm-slot-tx-mask-3 = <1 1>;
mclk-fs = <256>;
- codec {
+ codec-0 {
sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>;
};
+
+ codec-1 {
+ sound-dai = <&toacodec TOACODEC_IN_B>;
+ };
};
- /* hdmi glue */
+ /* i2s jack output interface */
dai-link-7 {
+ sound-dai = <&tdmif_c>;
+ dai-format = "i2s";
+ dai-tdm-slot-tx-mask-0 = <1 1>;
+ mclk-fs = <256>;
+
+ codec-0 {
+ sound-dai = <&tohdmitx TOHDMITX_I2S_IN_C>;
+ };
+
+ codec-1 {
+ sound-dai = <&toacodec TOACODEC_IN_C>;
+ };
+ };
+
+ /* hdmi glue */
+ dai-link-8 {
sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>;
codec {
sound-dai = <&hdmi_tx>;
};
};
+
+ /* acodec glue */
+ dai-link-9 {
+ sound-dai = <&toacodec TOACODEC_OUT>;
+
+ codec {
+ sound-dai = <&acodec>;
+ };
+ };
};
};
+&acodec {
+ AVDD-supply = <&vddao_1v8>;
+ status = "okay";
+};
+
&arb {
status = "okay";
};
@@ -505,6 +562,10 @@
status = "okay";
};
+&tdmif_c {
+ status = "okay";
+};
+
&tdmin_a {
status = "okay";
};
@@ -525,6 +586,14 @@
status = "okay";
};
+&tdmout_c {
+ status = "okay";
+};
+
+&toacodec {
+ status = "okay";
+};
+
&tohdmitx {
status = "okay";
};
--
2.17.1

View File

@@ -1,22 +1,25 @@
From b93c598b1acfe59ffac342d114483af8a45a78ac Mon Sep 17 00:00:00 2001
From f40f83d023b2e1dd82e751aee35c1f0d386b8b4f Mon Sep 17 00:00:00 2001
Message-Id: <f40f83d023b2e1dd82e751aee35c1f0d386b8b4f.1602104035.git.stefan@agner.ch>
From: Pascal Vizeli <pvizeli@syshack.ch>
Date: Sat, 1 Feb 2020 20:55:39 +0000
Subject: [PATCH 1/1] Amlogic w400: read ethaddr from efuse
Subject: [PATCH 1/3] Amlogic w400: read ethaddr from efuse
Signed-off-by: Pascal Vizeli <pvizeli@syshack.ch>
---
board/amlogic/w400/w400.c | 25 ++++++++++++++++++++++++-
1 file changed, 24 insertions(+), 1 deletion(-)
board/amlogic/w400/w400.c | 27 ++++++++++++++++++++++++---
1 file changed, 24 insertions(+), 3 deletions(-)
diff --git a/board/amlogic/w400/w400.c b/board/amlogic/w400/w400.c
index e60dc3a622..d4028c6a39 100644
index 47a51710dc..d74aab899a 100644
--- a/board/amlogic/w400/w400.c
+++ b/board/amlogic/w400/w400.c
@@ -6,13 +6,36 @@
@@ -6,15 +6,36 @@
#include <common.h>
#include <dm.h>
-#include <env_internal.h>
-#include <init.h>
-#include <net.h>
+#include <env.h>
#include <asm/io.h>
+#include <asm/arch/sm.h>
@@ -37,7 +40,7 @@ index e60dc3a622..d4028c6a39 100644
+ len = meson_sm_read_efuse(EFUSE_MAC_OFFSET,
+ efuse_mac_addr, EFUSE_MAC_SIZE);
+ if (len != EFUSE_MAC_SIZE)
+ return 0;
+ return 0;
+
+ for (int i = 0; i < 6; i++){
+ buff[0] = efuse_mac_addr[i * 2];
@@ -51,5 +54,5 @@ index e60dc3a622..d4028c6a39 100644
return 0;
}
--
2.17.1
2.28.0

View File

@@ -0,0 +1,63 @@
From c67fb4dbb332ed38bc7fbee13079e5ea11390f4e Mon Sep 17 00:00:00 2001
Message-Id: <c67fb4dbb332ed38bc7fbee13079e5ea11390f4e.1602104035.git.stefan@agner.ch>
In-Reply-To: <f40f83d023b2e1dd82e751aee35c1f0d386b8b4f.1602104035.git.stefan@agner.ch>
References: <f40f83d023b2e1dd82e751aee35c1f0d386b8b4f.1602104035.git.stefan@agner.ch>
From: Stefan Agner <stefan@agner.ch>
Date: Mon, 31 Aug 2020 13:40:18 +0200
Subject: [PATCH 2/3] ARM: meson: isolate loading of socinfo
Move loading of socinfo into a separate function so the value can be
reused later.
Signed-off-by: Stefan Agner <stefan@agner.ch>
---
arch/arm/mach-meson/board-info.c | 20 ++++++++++++++++++--
1 file changed, 18 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-meson/board-info.c b/arch/arm/mach-meson/board-info.c
index 3abb27e03b..cfcd5bbd3b 100644
--- a/arch/arm/mach-meson/board-info.c
+++ b/arch/arm/mach-meson/board-info.c
@@ -126,12 +126,16 @@ static void print_board_model(void)
printf("Model: %s\n", model ? model : "Unknown");
}
-int show_board_info(void)
+static unsigned int get_socinfo(void)
{
struct regmap *regmap;
int nodeoffset, ret;
ofnode node;
- unsigned int socinfo;
+ static unsigned int socinfo = 0;
+
+ /* Empty socinfo is invalid, so !socinfo is successfully initialized */
+ if (socinfo)
+ return socinfo;
/* find the offset of compatible node */
nodeoffset = fdt_node_offset_by_compatible(gd->fdt_blob, -1,
@@ -158,8 +162,20 @@ int show_board_info(void)
return 0;
}
+ return socinfo;
+}
+
+int show_board_info(void)
+{
+ unsigned int socinfo;
+
/* print board information */
print_board_model();
+
+ socinfo = get_socinfo();
+ if (!socinfo)
+ return 0;
+
printf("SoC: Amlogic Meson %s (%s) Revision %x:%x (%x:%x)\n",
socinfo_to_soc_id(socinfo),
socinfo_to_package_id(socinfo),
--
2.28.0

View File

@@ -0,0 +1,82 @@
From bb86524d84909ffe5d1d6ff3afe41d26396ba561 Mon Sep 17 00:00:00 2001
Message-Id: <bb86524d84909ffe5d1d6ff3afe41d26396ba561.1602104035.git.stefan@agner.ch>
In-Reply-To: <f40f83d023b2e1dd82e751aee35c1f0d386b8b4f.1602104035.git.stefan@agner.ch>
References: <f40f83d023b2e1dd82e751aee35c1f0d386b8b4f.1602104035.git.stefan@agner.ch>
From: Pascal Vizeli <pvizeli@syshack.ch>
Date: Tue, 4 Aug 2020 13:50:57 +0000
Subject: [PATCH 3/3] meson: Add board_rev to env
Signed-off-by: Pascal Vizeli <pvizeli@syshack.ch>
Signed-off-by: Stefan Agner <stefan@agner.ch>
---
arch/arm/include/asm/arch-meson/boot.h | 4 ++++
arch/arm/mach-meson/board-info.c | 12 ++++++++++++
board/amlogic/w400/w400.c | 5 +++++
3 files changed, 21 insertions(+)
diff --git a/arch/arm/include/asm/arch-meson/boot.h b/arch/arm/include/asm/arch-meson/boot.h
index a90fe55081..c67d12d06c 100644
--- a/arch/arm/include/asm/arch-meson/boot.h
+++ b/arch/arm/include/asm/arch-meson/boot.h
@@ -7,6 +7,8 @@
#ifndef __MESON_BOOT_H__
#define __MESON_BOOT_H__
+#include <linux/types.h>
+
/* Boot device */
#define BOOT_DEVICE_RESERVED 0
#define BOOT_DEVICE_EMMC 1
@@ -17,4 +19,6 @@
int meson_get_boot_device(void);
+int meson_get_soc_rev(char *buff, size_t buff_len);
+
#endif /* __MESON_BOOT_H__ */
diff --git a/arch/arm/mach-meson/board-info.c b/arch/arm/mach-meson/board-info.c
index cfcd5bbd3b..3ea7eb7251 100644
--- a/arch/arm/mach-meson/board-info.c
+++ b/arch/arm/mach-meson/board-info.c
@@ -186,3 +186,15 @@ int show_board_info(void)
return 0;
}
+
+int meson_get_soc_rev(char *buff, size_t buff_len)
+{
+ unsigned int socinfo;
+
+ socinfo = get_socinfo();
+ if (!socinfo)
+ return -1;
+
+ /* Write SoC info */
+ return snprintf(buff, buff_len, "%x", socinfo_to_minor(socinfo));
+}
diff --git a/board/amlogic/w400/w400.c b/board/amlogic/w400/w400.c
index d74aab899a..cb2e5edf5e 100644
--- a/board/amlogic/w400/w400.c
+++ b/board/amlogic/w400/w400.c
@@ -10,6 +10,7 @@
#include <asm/io.h>
#include <asm/arch/sm.h>
#include <asm/arch/eth.h>
+#include <asm/arch/boot.h>
#define EFUSE_MAC_OFFSET 20
#define EFUSE_MAC_SIZE 12
@@ -20,6 +21,10 @@ int misc_init_r(void)
char efuse_mac_addr[EFUSE_MAC_SIZE], buff[3];
ssize_t len;
+ if (meson_get_soc_rev(buff, sizeof(buff))) {
+ env_set("board_rev", buff);
+ }
+
meson_eth_init(PHY_INTERFACE_MODE_RGMII, 0);
if (!eth_env_get_enetaddr("ethaddr", mac_addr)) {
--
2.28.0

View File

@@ -13,8 +13,9 @@
<Description>Logical network used by this appliance.</Description>
</Network>
</NetworkSection>
<VirtualSystem ovf:id="Home Assistant">
<VirtualSystem ovf:id="HomeAssistant">
<Info>A virtual machine</Info>
<Name>Home Assistant</Name>
<ProductSection>
<Info>Meta-information about the installed software</Info>
<Product>Operating-System</Product>

View File

@@ -37,4 +37,10 @@ CONFIG_HYPERV_KEYBOARD=m
CONFIG_HYPERV_STORAGE=y
CONFIG_HYPERV_NET=y
CONFIG_HYPERV_VSOCKETS=m
CONFIG_PCI_HYPERV=m
CONFIG_PCI_HYPERV_INTERFACE=m
CONFIG_FB_HYPERV=y
CONFIG_IGBVF=m
CONFIG_IXGBEVF=m
CONFIG_I40EVF=m

View File

@@ -9,6 +9,9 @@ kernel=u-boot.bin
# uncomment for aarch64 bit support
#arm_64bit=1
# uncomment to enable primary UART console
#enable_uart=1
# uncomment if you get no picture on HDMI for a default "safe" mode
#hdmi_safe=1
@@ -46,8 +49,8 @@ kernel=u-boot.bin
# uncomment for composite PAL
#sdtv_mode=2
#uncomment to overclock the arm. 700 MHz is the default.
#arm_freq=800
# Uncomment to disable continous SD-card poll (for USB SSD)
#dtparam=sd_poll_once=on
# Uncomment some or all of these to enable the optional hardware interfaces
#dtparam=i2c_arm=on

View File

@@ -13,14 +13,13 @@ function hassos_pre_image() {
# Firmware
if [[ "${BOARD_ID}" =~ "rpi4" ]]; then
cp -t "${BOOT_DATA}" \
"${BINARIES_DIR}/rpi-firmware/fixup4.dat" \
"${BINARIES_DIR}/rpi-firmware/start4.elf"
cp "${BINARIES_DIR}/rpi-firmware/fixup.dat" "${BOOT_DATA}/fixup4.dat"
cp "${BINARIES_DIR}/rpi-firmware/start.elf" "${BOOT_DATA}/start4.elf"
else
cp -t "${BOOT_DATA}" \
"${BINARIES_DIR}/rpi-firmware/fixup.dat" \
"${BINARIES_DIR}/rpi-firmware/start.elf" \
"${BINARIES_DIR}/rpi-firmware/bootcode.bin"
"${BINARIES_DIR}/rpi-firmware/fixup.dat" \
"${BINARIES_DIR}/rpi-firmware/start.elf" \
"${BINARIES_DIR}/rpi-firmware/bootcode.bin"
fi
# Set cmd options

View File

@@ -0,0 +1,2 @@
# CONFIG_AUTOFS4_FS is not set
# CONFIG_AUTOFS_FS is not set

View File

@@ -0,0 +1,50 @@
From d6fc5f89ac905cb3efc9c61ce79dbfad5d91883b Mon Sep 17 00:00:00 2001
Message-Id: <d6fc5f89ac905cb3efc9c61ce79dbfad5d91883b.1597690408.git.stefan@agner.ch>
From: Chung-Hsien Hsu <stanley.hsu@cypress.com>
Date: Wed, 15 Aug 2018 05:32:39 -0500
Subject: [PATCH] brcmfmac: add FT-based AKMs in brcmf_set_key_mgmt() for FT
support
Add WLAN_AKM_SUITE_FT_8021X and WLAN_AKM_SUITE_FT_PSK in
brcmf_set_key_mgmt() for FT support.
Signed-off-by: Chung-Hsien Hsu <stanley.hsu@cypress.com>
Signed-off-by: Chi-Hsien Lin <chi-hsien.lin@cypress.com>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
---
drivers/net/wireless/broadcom/brcm80211/brcmfmac/cfg80211.c | 6 ++++++
.../net/wireless/broadcom/brcm80211/include/brcmu_wifi.h | 1 +
2 files changed, 7 insertions(+)
diff --git a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/cfg80211.c b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/cfg80211.c
index 71b7e5c19434..c312626c0a27 100644
--- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/cfg80211.c
+++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/cfg80211.c
@@ -1649,6 +1649,12 @@ brcmf_set_key_mgmt(struct net_device *ndev, struct cfg80211_connect_params *sme)
case WLAN_AKM_SUITE_PSK:
val = WPA2_AUTH_PSK;
break;
+ case WLAN_AKM_SUITE_FT_8021X:
+ val = WPA2_AUTH_UNSPECIFIED | WPA2_AUTH_FT;
+ break;
+ case WLAN_AKM_SUITE_FT_PSK:
+ val = WPA2_AUTH_PSK | WPA2_AUTH_FT;
+ break;
default:
brcmf_err("invalid cipher group (%d)\n",
sme->crypto.cipher_group);
diff --git a/drivers/net/wireless/broadcom/brcm80211/include/brcmu_wifi.h b/drivers/net/wireless/broadcom/brcm80211/include/brcmu_wifi.h
index 75b2a0438cfa..dddebaa60352 100644
--- a/drivers/net/wireless/broadcom/brcm80211/include/brcmu_wifi.h
+++ b/drivers/net/wireless/broadcom/brcm80211/include/brcmu_wifi.h
@@ -239,6 +239,7 @@ static inline bool ac_bitmap_tst(u8 bitmap, int prec)
#define WPA2_AUTH_RESERVED4 0x0400
#define WPA2_AUTH_RESERVED5 0x0800
#define WPA2_AUTH_1X_SHA256 0x1000 /* 1X with SHA256 key derivation */
+#define WPA2_AUTH_FT 0x4000 /* Fast BSS Transition */
#define WPA2_AUTH_PSK_SHA256 0x8000 /* PSK with SHA256 key derivation */
#define DOT11_DEFAULT_RTS_LEN 2347
--
2.28.0

View File

@@ -1,7 +1,8 @@
From 0f45c3f2f46b62f767ef225b258f927ad88ca360 Mon Sep 17 00:00:00 2001
From a04331a6ba7334282836bbaa76e979c4e6be3900 Mon Sep 17 00:00:00 2001
Message-Id: <a04331a6ba7334282836bbaa76e979c4e6be3900.1602102849.git.stefan@agner.ch>
From: Pascal Vizeli <pvizeli@syshack.ch>
Date: Tue, 10 Dec 2019 09:48:46 +0000
Subject: [PATCH 1/1] rpi: Use CONFIG_OF_BOARD instead of CONFIG_EMBED
Subject: [PATCH 1/2] rpi: Use CONFIG_OF_BOARD instead of CONFIG_EMBED
Signed-off-by: Pascal Vizeli <pvizeli@syshack.ch>
---
@@ -13,7 +14,7 @@ Signed-off-by: Pascal Vizeli <pvizeli@syshack.ch>
5 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/configs/rpi_0_w_defconfig b/configs/rpi_0_w_defconfig
index fe5a7763a6..ed7f9381e9 100644
index bba5e12b12..0241f4c6d3 100644
--- a/configs/rpi_0_w_defconfig
+++ b/configs/rpi_0_w_defconfig
@@ -17,7 +17,7 @@ CONFIG_CMD_GPIO=y
@@ -22,11 +23,11 @@ index fe5a7763a6..ed7f9381e9 100644
CONFIG_CMD_FS_UUID=y
-CONFIG_OF_EMBED=y
+CONFIG_OF_BOARD=y
CONFIG_DEFAULT_DEVICE_TREE="bcm2835-rpi-zero-w"
CONFIG_ENV_FAT_INTERFACE="mmc"
CONFIG_ENV_FAT_DEVICE_AND_PART="0:1"
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
diff --git a/configs/rpi_2_defconfig b/configs/rpi_2_defconfig
index bf331c0ad0..52e3c3b234 100644
index 1c2bbb29ce..9573e475f4 100644
--- a/configs/rpi_2_defconfig
+++ b/configs/rpi_2_defconfig
@@ -17,7 +17,7 @@ CONFIG_CMD_GPIO=y
@@ -35,11 +36,11 @@ index bf331c0ad0..52e3c3b234 100644
CONFIG_CMD_FS_UUID=y
-CONFIG_OF_EMBED=y
+CONFIG_OF_BOARD=y
CONFIG_DEFAULT_DEVICE_TREE="bcm2836-rpi-2-b"
CONFIG_ENV_FAT_INTERFACE="mmc"
CONFIG_ENV_FAT_DEVICE_AND_PART="0:1"
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
diff --git a/configs/rpi_3_32b_defconfig b/configs/rpi_3_32b_defconfig
index c2417a0ec9..191962f0f7 100644
index b8a3d17f43..252df994e6 100644
--- a/configs/rpi_3_32b_defconfig
+++ b/configs/rpi_3_32b_defconfig
@@ -18,7 +18,7 @@ CONFIG_CMD_GPIO=y
@@ -48,11 +49,11 @@ index c2417a0ec9..191962f0f7 100644
CONFIG_CMD_FS_UUID=y
-CONFIG_OF_EMBED=y
+CONFIG_OF_BOARD=y
CONFIG_DEFAULT_DEVICE_TREE="bcm2837-rpi-3-b"
CONFIG_ENV_FAT_INTERFACE="mmc"
CONFIG_ENV_FAT_DEVICE_AND_PART="0:1"
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
diff --git a/configs/rpi_3_defconfig b/configs/rpi_3_defconfig
index 4fa682539c..03a2356d3d 100644
index 9b281a4f15..1e9ee6122e 100644
--- a/configs/rpi_3_defconfig
+++ b/configs/rpi_3_defconfig
@@ -18,7 +18,7 @@ CONFIG_CMD_GPIO=y
@@ -61,11 +62,11 @@ index 4fa682539c..03a2356d3d 100644
CONFIG_CMD_FS_UUID=y
-CONFIG_OF_EMBED=y
+CONFIG_OF_BOARD=y
CONFIG_DEFAULT_DEVICE_TREE="bcm2837-rpi-3-b"
CONFIG_ENV_FAT_INTERFACE="mmc"
CONFIG_ENV_FAT_DEVICE_AND_PART="0:1"
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
diff --git a/configs/rpi_defconfig b/configs/rpi_defconfig
index 2c04b3334e..bf00d8b669 100644
index b5ad53c37b..223fc03275 100644
--- a/configs/rpi_defconfig
+++ b/configs/rpi_defconfig
@@ -17,7 +17,7 @@ CONFIG_CMD_GPIO=y
@@ -74,8 +75,9 @@ index 2c04b3334e..bf00d8b669 100644
CONFIG_CMD_FS_UUID=y
-CONFIG_OF_EMBED=y
+CONFIG_OF_BOARD=y
CONFIG_DEFAULT_DEVICE_TREE="bcm2835-rpi-b"
CONFIG_ENV_FAT_INTERFACE="mmc"
CONFIG_ENV_FAT_DEVICE_AND_PART="0:1"
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
--
2.17.1
2.28.0

View File

@@ -1,49 +0,0 @@
From 5e960cc9b208c53d5385d5a2f6c7f380e9499d4c Mon Sep 17 00:00:00 2001
From: Alexandru Costache <alexandru@balena.io>
Date: Wed, 18 Mar 2020 16:54:28 +0100
Subject: [PATCH] Add a retry limit when writing to uart console
Seems that if the serial console is incorrectly
configured in the dtb, writing to it may block indefinitely,
thus preventing the board from booting.
Let's add a retry count to unblock in such cases.
Upstream-status: Inappropriate [configuration]
Signed-off-by: Alexandru Costache <alexandru@balena.io>
---
drivers/serial/serial_bcm283x_mu.c | 12 +++++++++---
1 file changed, 9 insertions(+), 3 deletions(-)
diff --git a/drivers/serial/serial_bcm283x_mu.c b/drivers/serial/serial_bcm283x_mu.c
index bd1d89ec83..bd033d14c4 100644
--- a/drivers/serial/serial_bcm283x_mu.c
+++ b/drivers/serial/serial_bcm283x_mu.c
@@ -49,7 +49,7 @@ struct bcm283x_mu_regs {
struct bcm283x_mu_priv {
struct bcm283x_mu_regs *regs;
};
-
+static uint16_t putc_retry = 0;
static int bcm283x_mu_serial_getc(struct udevice *dev);
static int bcm283x_mu_serial_setbrg(struct udevice *dev, int baudrate)
@@ -105,8 +105,14 @@ static int bcm283x_mu_serial_putc(struct udevice *dev, const char data)
struct bcm283x_mu_regs *regs = priv->regs;
/* Wait until there is space in the FIFO */
- if (!(readl(&regs->lsr) & BCM283X_MU_LSR_TX_EMPTY))
- return -EAGAIN;
+ if (!(readl(&regs->lsr) & BCM283X_MU_LSR_TX_EMPTY)) {
+ if (++putc_retry) {
+ return -EAGAIN;
+ } else {
+ /* Couldn't write for too long, drop char */
+ return 0;
+ }
+ }
/* Send the character */
writel(data, &regs->io);
--
2.17.1

View File

@@ -1,7 +1,10 @@
From 68e65b1e3859d4baf41d1e5f6525ff7ace778ba1 Mon Sep 17 00:00:00 2001
From cc40a554b003df9b07f8a55f69a94d7393d81cbc Mon Sep 17 00:00:00 2001
Message-Id: <cc40a554b003df9b07f8a55f69a94d7393d81cbc.1602102849.git.stefan@agner.ch>
In-Reply-To: <a04331a6ba7334282836bbaa76e979c4e6be3900.1602102849.git.stefan@agner.ch>
References: <a04331a6ba7334282836bbaa76e979c4e6be3900.1602102849.git.stefan@agner.ch>
From: Florin Sarbu <florin@balena.io>
Date: Thu, 12 Sep 2019 12:31:31 +0200
Subject: [PATCH] raspberrypi: Disable simple framebuffer support
Subject: [PATCH 2/2] raspberrypi: Disable simple framebuffer support
On 4.19 kernels this u-boot driver clashes with bcm2708_fb.
So let's disable it from here so that we have bcm2708_fb
@@ -17,10 +20,10 @@ Signed-off-by: Florin Sarbu <florin@balena.io>
3 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/board/raspberrypi/rpi/rpi.c b/board/raspberrypi/rpi/rpi.c
index 153a1fd..c7bd399 100644
index 6b1fa5fc14..5cfee7c00a 100644
--- a/board/raspberrypi/rpi/rpi.c
+++ b/board/raspberrypi/rpi/rpi.c
@@ -482,7 +482,7 @@ int ft_board_setup(void *blob, bd_t *bd)
@@ -485,7 +485,7 @@ int ft_board_setup(void *blob, struct bd_info *bd)
* should be more intelligent, and e.g. only do this if no enabled DT
* node exists for the "real" graphics driver.
*/
@@ -30,7 +33,7 @@ index 153a1fd..c7bd399 100644
#ifdef CONFIG_EFI_LOADER
/* Reserve the spin table */
diff --git a/common/Makefile b/common/Makefile
index 0de60b3..2848d98 100644
index 2e7a090588..b3985cc04d 100644
--- a/common/Makefile
+++ b/common/Makefile
@@ -50,7 +50,7 @@ ifndef CONFIG_DM_VIDEO
@@ -43,10 +46,10 @@ index 0de60b3..2848d98 100644
obj-$(CONFIG_MENU) += menu.o
obj-$(CONFIG_UPDATE_TFTP) += update.o
diff --git a/include/configs/rpi.h b/include/configs/rpi.h
index a38bf20..e2760b0 100644
index 834f1cd236..19a0d611c4 100644
--- a/include/configs/rpi.h
+++ b/include/configs/rpi.h
@@ -60,8 +60,8 @@
@@ -65,8 +65,8 @@
/* GPIO */
#define CONFIG_BCM2835_GPIO
/* LCD */
@@ -58,5 +61,5 @@ index a38bf20..e2760b0 100644
#ifdef CONFIG_CMD_USB
#define CONFIG_TFTP_TSIZE
--
2.7.4
2.28.0

View File

@@ -1,4 +1,5 @@
KERNEL=="ttyAMA[01]", PROGRAM="/bin/sh -c '\
KERNEL=="ttyAMA0", PROGRAM="/bin/sh -c '\
ALIASES=/proc/device-tree/aliases; \
if cmp -s $ALIASES/uart0 $ALIASES/serial0; then \
echo 0;\
@@ -9,6 +10,19 @@ KERNEL=="ttyAMA[01]", PROGRAM="/bin/sh -c '\
fi\
'", SYMLINK+="serial%c"
KERNEL=="ttyAMA1", PROGRAM="/bin/sh -c '\
ALIASES=/proc/device-tree/aliases; \
if [ -e /dev/ttyAMA0 ]; then \
exit 1; \
elif cmp -s $ALIASES/uart0 $ALIASES/serial0; then \
echo 0;\
elif cmp -s $ALIASES/uart0 $ALIASES/serial1; then \
echo 1; \
else \
exit 1; \
fi\
'", SYMLINK+="serial%c"
KERNEL=="ttyS0", PROGRAM="/bin/sh -c '\
ALIASES=/proc/device-tree/aliases; \
if cmp -s $ALIASES/uart1 $ALIASES/serial0; then \

View File

@@ -22,7 +22,7 @@ BR2_ROOTFS_POST_IMAGE_SCRIPT="$(BR2_EXTERNAL_HASSOS_PATH)/scripts/post-image.sh"
BR2_ROOTFS_POST_SCRIPT_ARGS="$(BR2_EXTERNAL_HASSOS_PATH)/board/intel/nuc $(BR2_EXTERNAL_HASSOS_PATH)/board/intel/nuc/hassos-hook.sh"
BR2_LINUX_KERNEL=y
BR2_LINUX_KERNEL_CUSTOM_VERSION=y
BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="5.4.53"
BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="5.4.63"
BR2_LINUX_KERNEL_DEFCONFIG="x86_64"
BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config $(BR2_EXTERNAL_HASSOS_PATH)/board/intel/nuc/kernel.config"
BR2_LINUX_KERNEL_LZ4=y
@@ -80,6 +80,7 @@ BR2_PACKAGE_RNG_TOOLS=y
BR2_PACKAGE_SYSTEMD_RANDOMSEED=y
# BR2_PACKAGE_SYSTEMD_RESOLVED is not set
BR2_PACKAGE_SYSTEMD_COREDUMP=y
BR2_PACKAGE_SYSTEMD_LOGIND=y
BR2_PACKAGE_UTIL_LINUX_PARTX=y
BR2_PACKAGE_UTIL_LINUX_ZRAMCTL=y
BR2_PACKAGE_UTIL_LINUX_LOGIN=y

View File

@@ -22,7 +22,7 @@ BR2_ROOTFS_POST_IMAGE_SCRIPT="$(BR2_EXTERNAL_HASSOS_PATH)/scripts/post-image.sh"
BR2_ROOTFS_POST_SCRIPT_ARGS="$(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/odroid-c2 $(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/odroid-c2/hassos-hook.sh"
BR2_LINUX_KERNEL=y
BR2_LINUX_KERNEL_CUSTOM_VERSION=y
BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="5.7.10"
BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="5.9.1"
BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y
BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="$(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/kernel-amlogic.config"
BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config"
@@ -71,6 +71,7 @@ BR2_PACKAGE_RNG_TOOLS=y
BR2_PACKAGE_SYSTEMD_RANDOMSEED=y
# BR2_PACKAGE_SYSTEMD_RESOLVED is not set
BR2_PACKAGE_SYSTEMD_COREDUMP=y
BR2_PACKAGE_SYSTEMD_LOGIND=y
BR2_PACKAGE_UTIL_LINUX_PARTX=y
BR2_PACKAGE_UTIL_LINUX_ZRAMCTL=y
BR2_PACKAGE_UTIL_LINUX_LOGIN=y
@@ -83,12 +84,12 @@ BR2_TARGET_ROOTFS_SQUASHFS4_LZ4=y
BR2_TARGET_UBOOT=y
BR2_TARGET_UBOOT_BUILD_SYSTEM_KCONFIG=y
BR2_TARGET_UBOOT_CUSTOM_VERSION=y
BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2020.01"
BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2020.10"
BR2_TARGET_UBOOT_BOARD_DEFCONFIG="odroid-c2"
BR2_TARGET_UBOOT_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/bootloader/uboot.config $(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/odroid-c2/uboot.config"
BR2_TARGET_UBOOT_BOOT_SCRIPT=y
BR2_TARGET_UBOOT_BOOT_SCRIPT_SOURCE="$(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/odroid-c2/uboot-boot.ush"
BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_5_7=y
BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_5_4=y
BR2_PACKAGE_HOST_DOSFSTOOLS=y
BR2_PACKAGE_HOST_E2FSPROGS=y
BR2_PACKAGE_HOST_GPTFDISK=y

View File

@@ -22,13 +22,13 @@ BR2_ROOTFS_POST_IMAGE_SCRIPT="$(BR2_EXTERNAL_HASSOS_PATH)/scripts/post-image.sh"
BR2_ROOTFS_POST_SCRIPT_ARGS="$(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/odroid-n2 $(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/odroid-n2/hassos-hook.sh"
BR2_LINUX_KERNEL=y
BR2_LINUX_KERNEL_CUSTOM_VERSION=y
BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="5.7.10"
BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="5.9.1"
BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y
BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="$(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/kernel-amlogic.config"
BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config"
BR2_LINUX_KERNEL_LZ4=y
BR2_LINUX_KERNEL_DTS_SUPPORT=y
BR2_LINUX_KERNEL_INTREE_DTS_NAME="amlogic/meson-g12b-odroid-n2"
BR2_LINUX_KERNEL_INTREE_DTS_NAME="amlogic/meson-g12b-odroid-n2 amlogic/meson-g12b-odroid-n2-plus"
BR2_LINUX_KERNEL_NEEDS_HOST_OPENSSL=y
BR2_LINUX_KERNEL_NEEDS_HOST_LIBELF=y
BR2_PACKAGE_BUSYBOX_CONFIG="$(BR2_EXTERNAL_HASSOS_PATH)/busybox.config"
@@ -71,6 +71,7 @@ BR2_PACKAGE_RNG_TOOLS=y
BR2_PACKAGE_SYSTEMD_RANDOMSEED=y
# BR2_PACKAGE_SYSTEMD_RESOLVED is not set
BR2_PACKAGE_SYSTEMD_COREDUMP=y
BR2_PACKAGE_SYSTEMD_LOGIND=y
BR2_PACKAGE_UTIL_LINUX_PARTX=y
BR2_PACKAGE_UTIL_LINUX_ZRAMCTL=y
BR2_PACKAGE_UTIL_LINUX_LOGIN=y
@@ -83,12 +84,12 @@ BR2_TARGET_ROOTFS_SQUASHFS4_LZ4=y
BR2_TARGET_UBOOT=y
BR2_TARGET_UBOOT_BUILD_SYSTEM_KCONFIG=y
BR2_TARGET_UBOOT_CUSTOM_VERSION=y
BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2020.01"
BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2020.10"
BR2_TARGET_UBOOT_BOARD_DEFCONFIG="odroid-n2"
BR2_TARGET_UBOOT_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/bootloader/uboot.config $(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/odroid-n2/uboot.config"
BR2_TARGET_UBOOT_BOOT_SCRIPT=y
BR2_TARGET_UBOOT_BOOT_SCRIPT_SOURCE="$(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/odroid-n2/uboot-boot.ush"
BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_5_7=y
BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_5_4=y
BR2_PACKAGE_HOST_DOSFSTOOLS=y
BR2_PACKAGE_HOST_E2FSPROGS=y
BR2_PACKAGE_HOST_GPTFDISK=y

View File

@@ -23,7 +23,7 @@ BR2_ROOTFS_POST_IMAGE_SCRIPT="$(BR2_EXTERNAL_HASSOS_PATH)/scripts/post-image.sh"
BR2_ROOTFS_POST_SCRIPT_ARGS="$(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/odroid-xu4 $(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/odroid-xu4/hassos-hook.sh"
BR2_LINUX_KERNEL=y
BR2_LINUX_KERNEL_CUSTOM_VERSION=y
BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="5.7.10"
BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="5.9.1"
BR2_LINUX_KERNEL_DEFCONFIG="exynos"
BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config"
BR2_LINUX_KERNEL_LZ4=y
@@ -73,6 +73,7 @@ BR2_PACKAGE_RNG_TOOLS=y
BR2_PACKAGE_SYSTEMD_RANDOMSEED=y
# BR2_PACKAGE_SYSTEMD_RESOLVED is not set
BR2_PACKAGE_SYSTEMD_COREDUMP=y
BR2_PACKAGE_SYSTEMD_LOGIND=y
BR2_PACKAGE_UTIL_LINUX_PARTX=y
BR2_PACKAGE_UTIL_LINUX_ZRAMCTL=y
BR2_PACKAGE_UTIL_LINUX_LOGIN=y
@@ -85,14 +86,14 @@ BR2_TARGET_ROOTFS_SQUASHFS4_LZ4=y
BR2_TARGET_UBOOT=y
BR2_TARGET_UBOOT_BUILD_SYSTEM_KCONFIG=y
BR2_TARGET_UBOOT_CUSTOM_VERSION=y
BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2020.01"
BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2020.10"
BR2_TARGET_UBOOT_BOARD_DEFCONFIG="odroid-xu3"
BR2_TARGET_UBOOT_NEEDS_DTC=y
BR2_TARGET_UBOOT_FORMAT_DTB_BIN=y
BR2_TARGET_UBOOT_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/bootloader/uboot.config $(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/odroid-xu4/uboot.config"
BR2_TARGET_UBOOT_BOOT_SCRIPT=y
BR2_TARGET_UBOOT_BOOT_SCRIPT_SOURCE="$(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/odroid-xu4/uboot-boot.ush"
BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_5_7=y
BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_5_4=y
BR2_PACKAGE_HOST_DOSFSTOOLS=y
BR2_PACKAGE_HOST_E2FSPROGS=y
BR2_PACKAGE_HOST_GPTFDISK=y

View File

@@ -23,7 +23,7 @@ BR2_ROOTFS_POST_IMAGE_SCRIPT="$(BR2_EXTERNAL_HASSOS_PATH)/scripts/post-image.sh"
BR2_ROOTFS_POST_SCRIPT_ARGS="$(BR2_EXTERNAL_HASSOS_PATH)/board/intel/ova $(BR2_EXTERNAL_HASSOS_PATH)/board/intel/ova/hassos-hook.sh"
BR2_LINUX_KERNEL=y
BR2_LINUX_KERNEL_CUSTOM_VERSION=y
BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="5.4.53"
BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="5.4.63"
BR2_LINUX_KERNEL_DEFCONFIG="x86_64"
BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config $(BR2_EXTERNAL_HASSOS_PATH)/board/intel/ova/kernel.config"
BR2_LINUX_KERNEL_LZ4=y
@@ -71,6 +71,7 @@ BR2_PACKAGE_RNG_TOOLS=y
BR2_PACKAGE_SYSTEMD_RANDOMSEED=y
# BR2_PACKAGE_SYSTEMD_RESOLVED is not set
BR2_PACKAGE_SYSTEMD_COREDUMP=y
BR2_PACKAGE_SYSTEMD_LOGIND=y
BR2_PACKAGE_UTIL_LINUX_PARTX=y
BR2_PACKAGE_UTIL_LINUX_ZRAMCTL=y
BR2_PACKAGE_UTIL_LINUX_LOGIN=y

View File

@@ -26,7 +26,7 @@ BR2_LINUX_KERNEL=y
BR2_LINUX_KERNEL_CUSTOM_TARBALL=y
BR2_LINUX_KERNEL_CUSTOM_TARBALL_LOCATION="https://github.com/raspberrypi/linux/archive/cc39f1c9f82f6fe5a437836811d906c709e0661c.tar.gz"
BR2_LINUX_KERNEL_DEFCONFIG="bcmrpi"
BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config"
BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/kernel.config"
BR2_LINUX_KERNEL_LZ4=y
BR2_LINUX_KERNEL_DTS_SUPPORT=y
BR2_LINUX_KERNEL_INTREE_DTS_NAME="bcm2708-rpi-zero-w"
@@ -74,6 +74,7 @@ BR2_PACKAGE_RNG_TOOLS=y
BR2_PACKAGE_SYSTEMD_RANDOMSEED=y
# BR2_PACKAGE_SYSTEMD_RESOLVED is not set
BR2_PACKAGE_SYSTEMD_COREDUMP=y
BR2_PACKAGE_SYSTEMD_LOGIND=y
BR2_PACKAGE_UTIL_LINUX_PARTX=y
BR2_PACKAGE_UTIL_LINUX_ZRAMCTL=y
BR2_PACKAGE_UTIL_LINUX_LOGIN=y
@@ -86,7 +87,7 @@ BR2_TARGET_ROOTFS_SQUASHFS4_LZ4=y
BR2_TARGET_UBOOT=y
BR2_TARGET_UBOOT_BUILD_SYSTEM_KCONFIG=y
BR2_TARGET_UBOOT_CUSTOM_VERSION=y
BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2020.01"
BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2020.10"
BR2_TARGET_UBOOT_BOARD_DEFCONFIG="rpi_0_w"
BR2_TARGET_UBOOT_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/bootloader/uboot.config $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/uboot.config"
BR2_TARGET_UBOOT_BOOT_SCRIPT=y

View File

@@ -26,7 +26,7 @@ BR2_LINUX_KERNEL=y
BR2_LINUX_KERNEL_CUSTOM_TARBALL=y
BR2_LINUX_KERNEL_CUSTOM_TARBALL_LOCATION="https://github.com/raspberrypi/linux/archive/cc39f1c9f82f6fe5a437836811d906c709e0661c.tar.gz"
BR2_LINUX_KERNEL_DEFCONFIG="bcm2709"
BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config"
BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/kernel.config"
BR2_LINUX_KERNEL_LZ4=y
BR2_LINUX_KERNEL_DTS_SUPPORT=y
BR2_LINUX_KERNEL_INTREE_DTS_NAME="bcm2709-rpi-2-b bcm2710-rpi-2-b"
@@ -73,6 +73,7 @@ BR2_PACKAGE_RNG_TOOLS=y
BR2_PACKAGE_SYSTEMD_RANDOMSEED=y
# BR2_PACKAGE_SYSTEMD_RESOLVED is not set
BR2_PACKAGE_SYSTEMD_COREDUMP=y
BR2_PACKAGE_SYSTEMD_LOGIND=y
BR2_PACKAGE_UTIL_LINUX_PARTX=y
BR2_PACKAGE_UTIL_LINUX_ZRAMCTL=y
BR2_PACKAGE_UTIL_LINUX_LOGIN=y
@@ -85,7 +86,7 @@ BR2_TARGET_ROOTFS_SQUASHFS4_LZ4=y
BR2_TARGET_UBOOT=y
BR2_TARGET_UBOOT_BUILD_SYSTEM_KCONFIG=y
BR2_TARGET_UBOOT_CUSTOM_VERSION=y
BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2020.01"
BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2020.10"
BR2_TARGET_UBOOT_BOARD_DEFCONFIG="rpi_2"
BR2_TARGET_UBOOT_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/bootloader/uboot.config $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/uboot.config"
BR2_TARGET_UBOOT_BOOT_SCRIPT=y

View File

@@ -26,7 +26,7 @@ BR2_LINUX_KERNEL=y
BR2_LINUX_KERNEL_CUSTOM_TARBALL=y
BR2_LINUX_KERNEL_CUSTOM_TARBALL_LOCATION="https://github.com/raspberrypi/linux/archive/cc39f1c9f82f6fe5a437836811d906c709e0661c.tar.gz"
BR2_LINUX_KERNEL_DEFCONFIG="bcmrpi3"
BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config"
BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/kernel.config"
BR2_LINUX_KERNEL_LZ4=y
BR2_LINUX_KERNEL_DTS_SUPPORT=y
BR2_LINUX_KERNEL_INTREE_DTS_NAME="broadcom/bcm2710-rpi-3-b broadcom/bcm2837-rpi-3-b broadcom/bcm2710-rpi-3-b-plus"
@@ -74,6 +74,7 @@ BR2_PACKAGE_RNG_TOOLS=y
BR2_PACKAGE_SYSTEMD_RANDOMSEED=y
# BR2_PACKAGE_SYSTEMD_RESOLVED is not set
BR2_PACKAGE_SYSTEMD_COREDUMP=y
BR2_PACKAGE_SYSTEMD_LOGIND=y
BR2_PACKAGE_UTIL_LINUX_PARTX=y
BR2_PACKAGE_UTIL_LINUX_ZRAMCTL=y
BR2_PACKAGE_UTIL_LINUX_LOGIN=y
@@ -86,7 +87,7 @@ BR2_TARGET_ROOTFS_SQUASHFS4_LZ4=y
BR2_TARGET_UBOOT=y
BR2_TARGET_UBOOT_BUILD_SYSTEM_KCONFIG=y
BR2_TARGET_UBOOT_CUSTOM_VERSION=y
BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2020.01"
BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2020.10"
BR2_TARGET_UBOOT_BOARD_DEFCONFIG="rpi_3"
BR2_TARGET_UBOOT_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/bootloader/uboot.config $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/uboot.config"
BR2_TARGET_UBOOT_BOOT_SCRIPT=y

View File

@@ -26,7 +26,7 @@ BR2_LINUX_KERNEL=y
BR2_LINUX_KERNEL_CUSTOM_TARBALL=y
BR2_LINUX_KERNEL_CUSTOM_TARBALL_LOCATION="https://github.com/raspberrypi/linux/archive/cc39f1c9f82f6fe5a437836811d906c709e0661c.tar.gz"
BR2_LINUX_KERNEL_DEFCONFIG="bcm2709"
BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config"
BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/kernel.config"
BR2_LINUX_KERNEL_LZ4=y
BR2_LINUX_KERNEL_DTS_SUPPORT=y
BR2_LINUX_KERNEL_INTREE_DTS_NAME="bcm2710-rpi-3-b bcm2710-rpi-3-b-plus bcm2710-rpi-cm3"
@@ -74,6 +74,7 @@ BR2_PACKAGE_RNG_TOOLS=y
BR2_PACKAGE_SYSTEMD_RANDOMSEED=y
# BR2_PACKAGE_SYSTEMD_RESOLVED is not set
BR2_PACKAGE_SYSTEMD_COREDUMP=y
BR2_PACKAGE_SYSTEMD_LOGIND=y
BR2_PACKAGE_UTIL_LINUX_PARTX=y
BR2_PACKAGE_UTIL_LINUX_ZRAMCTL=y
BR2_PACKAGE_UTIL_LINUX_LOGIN=y
@@ -86,7 +87,7 @@ BR2_TARGET_ROOTFS_SQUASHFS4_LZ4=y
BR2_TARGET_UBOOT=y
BR2_TARGET_UBOOT_BUILD_SYSTEM_KCONFIG=y
BR2_TARGET_UBOOT_CUSTOM_VERSION=y
BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2020.01"
BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2020.10"
BR2_TARGET_UBOOT_BOARD_DEFCONFIG="rpi_3_32b"
BR2_TARGET_UBOOT_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/bootloader/uboot.config $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/uboot.config"
BR2_TARGET_UBOOT_BOOT_SCRIPT=y

View File

@@ -26,7 +26,7 @@ BR2_LINUX_KERNEL=y
BR2_LINUX_KERNEL_CUSTOM_TARBALL=y
BR2_LINUX_KERNEL_CUSTOM_TARBALL_LOCATION="https://github.com/raspberrypi/linux/archive/cc39f1c9f82f6fe5a437836811d906c709e0661c.tar.gz"
BR2_LINUX_KERNEL_DEFCONFIG="bcm2711"
BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config"
BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/kernel.config"
BR2_LINUX_KERNEL_LZ4=y
BR2_LINUX_KERNEL_DTS_SUPPORT=y
BR2_LINUX_KERNEL_INTREE_DTS_NAME="broadcom/bcm2711-rpi-4-b"
@@ -75,6 +75,7 @@ BR2_PACKAGE_RNG_TOOLS=y
BR2_PACKAGE_SYSTEMD_RANDOMSEED=y
# BR2_PACKAGE_SYSTEMD_RESOLVED is not set
BR2_PACKAGE_SYSTEMD_COREDUMP=y
BR2_PACKAGE_SYSTEMD_LOGIND=y
BR2_PACKAGE_UTIL_LINUX_PARTX=y
BR2_PACKAGE_UTIL_LINUX_ZRAMCTL=y
BR2_PACKAGE_UTIL_LINUX_LOGIN=y
@@ -87,7 +88,7 @@ BR2_TARGET_ROOTFS_SQUASHFS4_LZ4=y
BR2_TARGET_UBOOT=y
BR2_TARGET_UBOOT_BUILD_SYSTEM_KCONFIG=y
BR2_TARGET_UBOOT_CUSTOM_VERSION=y
BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2020.07"
BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2020.10"
BR2_TARGET_UBOOT_BOARD_DEFCONFIG="rpi_4"
BR2_TARGET_UBOOT_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/bootloader/uboot.config $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/uboot.config"
BR2_TARGET_UBOOT_BOOT_SCRIPT=y

View File

@@ -26,7 +26,7 @@ BR2_LINUX_KERNEL=y
BR2_LINUX_KERNEL_CUSTOM_TARBALL=y
BR2_LINUX_KERNEL_CUSTOM_TARBALL_LOCATION="https://github.com/raspberrypi/linux/archive/cc39f1c9f82f6fe5a437836811d906c709e0661c.tar.gz"
BR2_LINUX_KERNEL_DEFCONFIG="bcm2711"
BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config"
BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/kernel.config"
BR2_LINUX_KERNEL_LZ4=y
BR2_LINUX_KERNEL_DTS_SUPPORT=y
BR2_LINUX_KERNEL_INTREE_DTS_NAME="bcm2711-rpi-4-b"
@@ -75,6 +75,7 @@ BR2_PACKAGE_RNG_TOOLS=y
BR2_PACKAGE_SYSTEMD_RANDOMSEED=y
# BR2_PACKAGE_SYSTEMD_RESOLVED is not set
BR2_PACKAGE_SYSTEMD_COREDUMP=y
BR2_PACKAGE_SYSTEMD_LOGIND=y
BR2_PACKAGE_UTIL_LINUX_PARTX=y
BR2_PACKAGE_UTIL_LINUX_ZRAMCTL=y
BR2_PACKAGE_UTIL_LINUX_LOGIN=y
@@ -87,7 +88,7 @@ BR2_TARGET_ROOTFS_SQUASHFS4_LZ4=y
BR2_TARGET_UBOOT=y
BR2_TARGET_UBOOT_BUILD_SYSTEM_KCONFIG=y
BR2_TARGET_UBOOT_CUSTOM_VERSION=y
BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2020.01"
BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2020.10"
BR2_TARGET_UBOOT_BOARD_DEFCONFIG="rpi_4_32b"
BR2_TARGET_UBOOT_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/bootloader/uboot.config $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/uboot.config"
BR2_TARGET_UBOOT_BOOT_SCRIPT=y

View File

@@ -26,7 +26,7 @@ BR2_LINUX_KERNEL=y
BR2_LINUX_KERNEL_CUSTOM_TARBALL=y
BR2_LINUX_KERNEL_CUSTOM_TARBALL_LOCATION="https://github.com/raspberrypi/linux/archive/cc39f1c9f82f6fe5a437836811d906c709e0661c.tar.gz"
BR2_LINUX_KERNEL_DEFCONFIG="bcmrpi"
BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config"
BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/kernel.config"
BR2_LINUX_KERNEL_LZ4=y
BR2_LINUX_KERNEL_DTS_SUPPORT=y
BR2_LINUX_KERNEL_INTREE_DTS_NAME="bcm2708-rpi-b bcm2708-rpi-b-plus bcm2708-rpi-cm"
@@ -73,6 +73,7 @@ BR2_PACKAGE_RNG_TOOLS=y
BR2_PACKAGE_SYSTEMD_RANDOMSEED=y
# BR2_PACKAGE_SYSTEMD_RESOLVED is not set
BR2_PACKAGE_SYSTEMD_COREDUMP=y
BR2_PACKAGE_SYSTEMD_LOGIND=y
BR2_PACKAGE_UTIL_LINUX_PARTX=y
BR2_PACKAGE_UTIL_LINUX_ZRAMCTL=y
BR2_PACKAGE_UTIL_LINUX_LOGIN=y
@@ -85,7 +86,7 @@ BR2_TARGET_ROOTFS_SQUASHFS4_LZ4=y
BR2_TARGET_UBOOT=y
BR2_TARGET_UBOOT_BUILD_SYSTEM_KCONFIG=y
BR2_TARGET_UBOOT_CUSTOM_VERSION=y
BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2020.01"
BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2020.10"
BR2_TARGET_UBOOT_BOARD_DEFCONFIG="rpi"
BR2_TARGET_UBOOT_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/bootloader/uboot.config $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/uboot.config"
BR2_TARGET_UBOOT_BOOT_SCRIPT=y

View File

@@ -24,13 +24,13 @@ BR2_ROOTFS_POST_IMAGE_SCRIPT="$(BR2_EXTERNAL_HASSOS_PATH)/scripts/post-image.sh"
BR2_ROOTFS_POST_SCRIPT_ARGS="$(BR2_EXTERNAL_HASSOS_PATH)/board/asus/tinker $(BR2_EXTERNAL_HASSOS_PATH)/board/asus/hassos-hook.sh"
BR2_LINUX_KERNEL=y
BR2_LINUX_KERNEL_CUSTOM_VERSION=y
BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="5.4.53"
BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="5.4.63"
BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y
BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="$(BR2_EXTERNAL_HASSOS_PATH)/board/asus/tinker/kernel.config"
BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config"
BR2_LINUX_KERNEL_LZ4=y
BR2_LINUX_KERNEL_DTS_SUPPORT=y
BR2_LINUX_KERNEL_INTREE_DTS_NAME="rk3288-tinker"
BR2_LINUX_KERNEL_INTREE_DTS_NAME="rk3288-tinker rk3288-tinker-s"
BR2_LINUX_KERNEL_NEEDS_HOST_OPENSSL=y
BR2_LINUX_KERNEL_NEEDS_HOST_LIBELF=y
BR2_PACKAGE_BUSYBOX_CONFIG="$(BR2_EXTERNAL_HASSOS_PATH)/busybox.config"
@@ -75,6 +75,7 @@ BR2_PACKAGE_RNG_TOOLS=y
BR2_PACKAGE_SYSTEMD_RANDOMSEED=y
# BR2_PACKAGE_SYSTEMD_RESOLVED is not set
BR2_PACKAGE_SYSTEMD_COREDUMP=y
BR2_PACKAGE_SYSTEMD_LOGIND=y
BR2_PACKAGE_UTIL_LINUX_PARTX=y
BR2_PACKAGE_UTIL_LINUX_ZRAMCTL=y
BR2_PACKAGE_UTIL_LINUX_LOGIN=y
@@ -87,14 +88,14 @@ BR2_TARGET_ROOTFS_SQUASHFS4_LZ4=y
BR2_TARGET_UBOOT=y
BR2_TARGET_UBOOT_BUILD_SYSTEM_KCONFIG=y
BR2_TARGET_UBOOT_CUSTOM_VERSION=y
BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2020.01"
BR2_TARGET_UBOOT_BOARD_DEFCONFIG="tinker-rk3288"
BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2020.10"
BR2_TARGET_UBOOT_BOARD_DEFCONFIG="tinker-s-rk3288"
BR2_TARGET_UBOOT_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/bootloader/uboot.config $(BR2_EXTERNAL_HASSOS_PATH)/board/asus/tinker/uboot.config"
BR2_TARGET_UBOOT_FORMAT_DTB_BIN=y
BR2_TARGET_UBOOT_FORMAT_DTB_IMG=y
BR2_TARGET_UBOOT_NEEDS_PYLIBFDT=y
BR2_TARGET_UBOOT_SPL=y
BR2_TARGET_UBOOT_SPL_NAME="spl/u-boot-spl.bin tpl/u-boot-tpl.bin"
BR2_TARGET_UBOOT_SPL_NAME="idbloader.img"
BR2_TARGET_UBOOT_BOOT_SCRIPT=y
BR2_TARGET_UBOOT_BOOT_SCRIPT_SOURCE="$(BR2_EXTERNAL_HASSOS_PATH)/board/asus/tinker/uboot-boot.ush"
BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_5_4=y

View File

@@ -24,6 +24,9 @@ CONFIG_BT_HCIBTUSB=y
CONFIG_BT_HCIBTUSB_BCM=m
CONFIG_BT_HCIBTUSB_RTL=m
CONFIG_RTL_CARDS=y
CONFIG_RTL8192CU=m
# Multimedia core support
CONFIG_MEDIA_SUPPORT=y
CONFIG_MEDIA_CONTROLLER=y

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@@ -71,6 +71,8 @@ CONFIG_EXT4_FS=y
CONFIG_EXT4_FS_POSIX_ACL=y
CONFIG_EXT4_FS_SECURITY=y
CONFIG_OVERLAY_FS=y
CONFIG_OVERLAY_FS_REDIRECT_DIR=y
CONFIG_OVERLAY_FS_METACOPY=y
CONFIG_CRYPTO_CCM=m
CONFIG_CRYPTO_GCM=m

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@@ -1,5 +1,5 @@
VERSION_MAJOR=5
VERSION_BUILD=0
VERSION_BUILD=4
HASSOS_NAME="HassOS"
HASSOS_ID="hassos"

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@@ -2,29 +2,46 @@
##
# Hooks
env
# Handle boot hocks
if [ "${RAUC_SLOT_CLASS}" = "boot" ]; then
BOOT_DATA=/tmp/boot-data
BOOT_TMP=/tmp/boot-tmp
BOOT_NEW=/tmp/boot-new
BOOT_MNT=/mnt/boot
mkdir -p ${BOOT_DATA}
if [ "${1}" = "slot-pre-install" ]; then
cp -f ${RAUC_SLOT_MOUNT_POINT}/*.txt ${BOOT_DATA}/
elif [ "${1}" = "slot-post-install" ]; then
cp -f ${BOOT_DATA}/*.txt ${RAUC_SLOT_MOUNT_POINT}/
mkdir -p "${BOOT_TMP}"
mkdir -p "${BOOT_NEW}"
# Mount boot
if ! systemctl -q is-active mnt-boot.mount; then
systemctl start mnt-boot.mount
fi
mount "${RAUC_IMAGE_NAME}" "${BOOT_NEW}"
# Backup boot config
cp -f "${BOOT_MNT}"/*.txt "${BOOT_TMP}/"
# Update
cp -rf "${BOOT_NEW}"/* "${BOOT_MNT}/"
# Restore boot config
cp -f "${BOOT_TMP}"/*.txt "${BOOT_MNT}/"
umount "${BOOT_NEW}"
rm -rf "${BOOT_TMP}" "${BOOT_NEW}"
fi
# Handle spl install
if [ "${RAUC_SLOT_CLASS}" = "spl" ]; then
DEVICE_CHILD="$(findfs LABEL="hassos-boot")"
DEVICE_ROOT="/dev/$(lsblk -no pkname ${DEVICE_CHILD})"
DEVICE_ROOT="/dev/$(lsblk -no pkname "${DEVICE_CHILD}")"
if sfdisk -dq ${DEVICE_ROOT} | grep -q 'label: gpt'; then
dd if=${RAUC_IMAGE_NAME} of=${DEVICE_ROOT} conv=notrunc bs=512 seek=2 skip=2
if sfdisk -dq "${DEVICE_ROOT}" | grep -q 'label: gpt'; then
dd if="${RAUC_IMAGE_NAME}" of="${DEVICE_ROOT}" conv=notrunc bs=512 seek=2 skip=2
else
dd if=${RAUC_IMAGE_NAME} of=${DEVICE_ROOT} conv=notrunc bs=1 count=440
dd if=${RAUC_IMAGE_NAME} of=${DEVICE_ROOT} conv=notrunc bs=512 seek=1 skip=1
dd if="${RAUC_IMAGE_NAME}" of="${DEVICE_ROOT}" conv=notrunc bs=1 count=440
dd if="${RAUC_IMAGE_NAME}" of="${DEVICE_ROOT}" conv=notrunc bs=512 seek=1 skip=1
fi
fi

View File

@@ -11,8 +11,8 @@ BLUETOOTH_BCM43XX_SITE = $(BR2_EXTERNAL_HASSOS_PATH)/package/bluetooth-bcm43xx
BLUETOOTH_BCM43XX_SITE_METHOD = local
define BLUETOOTH_BCM43XX_BUILD_CMDS
curl -L -o $(@D)/BCM43430A1.hcd https://raw.githubusercontent.com/RPi-Distro/bluez-firmware/fff76cb15527c435ce99a9787848eacd6288282c/broadcom/BCM43430A1.hcd
curl -L -o $(@D)/BCM4345C0.hcd https://raw.githubusercontent.com/RPi-Distro/bluez-firmware/fff76cb15527c435ce99a9787848eacd6288282c/broadcom/BCM4345C0.hcd
curl -L -o $(@D)/BCM43430A1.hcd https://raw.githubusercontent.com/RPi-Distro/bluez-firmware/a4e08822e3f24a6211f6ac94bc98b7ef87700c70/broadcom/BCM43430A1.hcd
curl -L -o $(@D)/BCM4345C0.hcd https://raw.githubusercontent.com/RPi-Distro/bluez-firmware/a4e08822e3f24a6211f6ac94bc98b7ef87700c70/broadcom/BCM4345C0.hcd
curl -L -o $(@D)/btuart https://raw.githubusercontent.com/RPi-Distro/pi-bluetooth/cbdbcb66bcc5b9af05f1a9fffe2254c872bb0ace/usr/bin/btuart
curl -L -o $(@D)/bthelper https://raw.githubusercontent.com/RPi-Distro/pi-bluetooth/cbdbcb66bcc5b9af05f1a9fffe2254c872bb0ace/usr/bin/bthelper
curl -L -o $(@D)/90-pi-bluetooth.rules https://raw.githubusercontent.com/RPi-Distro/pi-bluetooth/cbdbcb66bcc5b9af05f1a9fffe2254c872bb0ace/lib/udev/rules.d/90-pi-bluetooth.rules

View File

@@ -26,12 +26,14 @@ DNS="homeassistant/${ARCH}-hassio-dns"
AUDIO="homeassistant/${ARCH}-hassio-audio"
CLI="homeassistant/${ARCH}-hassio-cli"
MULTICAST="homeassistant/${ARCH}-hassio-multicast"
OBSERVER="homeassistant/${ARCH}-hassio-observer"
SUPERVISOR_VERSION=$(curl -s ${VERSION_URL} | jq -e -r '.supervisor')
DNS_VERSION=$(curl -s ${VERSION_URL} | jq -e -r '.dns')
CLI_VERSION=$(curl -s ${VERSION_URL} | jq -e -r '.cli')
AUDIO_VERSION=$(curl -s ${VERSION_URL} | jq -e -r '.audio')
MULTICAST_VERSION=$(curl -s ${VERSION_URL} | jq -e -r '.multicast')
OBSERVER_VERSION=$(curl -s ${VERSION_URL} | jq -e -r '.observer')
# Make image
dd if=/dev/zero of=${DATA_IMG} bs=1G count=1
@@ -72,6 +74,7 @@ docker pull "${CLI}:${CLI_VERSION}"
docker pull "${DNS}:${DNS_VERSION}"
docker pull "${AUDIO}:${AUDIO_VERSION}"
docker pull "${MULTICAST}:${MULTICAST_VERSION}"
docker pull "${OBSERVER}:${OBSERVER_VERSION}"
# Setup AppArmor
mkdir -p "/mnt/data/supervisor/apparmor"

View File

@@ -0,0 +1,23 @@
From 4a4298ef78e943d36f3b8d8e78bfa21b1506961e Mon Sep 17 00:00:00 2001
From: Aman Gupta Karmani <aman@tmm1.net>
Date: Mon, 12 Oct 2020 13:39:26 -0700
Subject: [PATCH] time-wait-sync: log errors trying to watch
/run/systemd/timesync
---
src/time-wait-sync/time-wait-sync.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/time-wait-sync/time-wait-sync.c b/src/time-wait-sync/time-wait-sync.c
index 96072445f6e..c8ec4850426 100644
--- a/src/time-wait-sync/time-wait-sync.c
+++ b/src/time-wait-sync/time-wait-sync.c
@@ -50,7 +50,7 @@ static void clock_state_release(ClockState *sp) {
static int clock_state_update(ClockState *sp, sd_event *event);
static int update_notify_run_systemd_timesync(ClockState *sp) {
- sp->run_systemd_timesync_wd = inotify_add_watch(sp->inotify_fd, "/run/systemd/timesync", IN_CREATE|IN_DELETE_SELF);
+ sp->run_systemd_timesync_wd = inotify_add_watch_and_warn(sp->inotify_fd, "/run/systemd/timesync", IN_CREATE|IN_DELETE_SELF);
return sp->run_systemd_timesync_wd;
}

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@@ -0,0 +1,54 @@
From f6f4f5fe5395a57f10dd446c7266c53f0673eaac Mon Sep 17 00:00:00 2001
From: Balaji Punnuru <balaji_punnuru@cable.comcast.com>
Date: Thu, 9 Apr 2020 12:21:49 -0400
Subject: [PATCH] util: return the correct correct wd from inotify helpers
We need to propagate the acquired watch descriptors because our callers
are counting on them.
[Lennart: this is split out of #15381 and simplified]
---
src/basic/fs-util.c | 14 ++++++++------
1 file changed, 8 insertions(+), 6 deletions(-)
diff --git a/src/basic/fs-util.c b/src/basic/fs-util.c
index 558cafbcaf5..ef3b5a51842 100644
--- a/src/basic/fs-util.c
+++ b/src/basic/fs-util.c
@@ -692,28 +692,30 @@ int unlink_or_warn(const char *filename) {
int inotify_add_watch_fd(int fd, int what, uint32_t mask) {
char path[STRLEN("/proc/self/fd/") + DECIMAL_STR_MAX(int) + 1];
- int r;
+ int wd;
/* This is like inotify_add_watch(), except that the file to watch is not referenced by a path, but by an fd */
xsprintf(path, "/proc/self/fd/%i", what);
- r = inotify_add_watch(fd, path, mask);
- if (r < 0)
+ wd = inotify_add_watch(fd, path, mask);
+ if (wd < 0)
return -errno;
- return r;
+ return wd;
}
int inotify_add_watch_and_warn(int fd, const char *pathname, uint32_t mask) {
+ int wd;
- if (inotify_add_watch(fd, pathname, mask) < 0) {
+ wd = inotify_add_watch(fd, pathname, mask);
+ if (wd < 0) {
if (errno == ENOSPC)
return log_error_errno(errno, "Failed to add a watch for %s: inotify watch limit reached", pathname);
return log_error_errno(errno, "Failed to add a watch for %s: %m", pathname);
}
- return 0;
+ return wd;
}
static bool unsafe_transition(const struct stat *a, const struct stat *b) {

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@@ -1,41 +0,0 @@
From b39cd5ba642ddba46268e8d873b952604844c047 Mon Sep 17 00:00:00 2001
Message-Id: <b39cd5ba642ddba46268e8d873b952604844c047.1595101389.git.stefan@agner.ch>
In-Reply-To: <040a141f84f2f84bf8be18f85b4cdb34bf066df0.1595101389.git.stefan@agner.ch>
References: <040a141f84f2f84bf8be18f85b4cdb34bf066df0.1595101389.git.stefan@agner.ch>
From: Sylwester Nawrocki <s.nawrocki@samsung.com>
Date: Mon, 25 May 2020 13:39:51 +0200
Subject: [PATCH 02/20] usb: xhci: Add missing cache flush in the scratchpad
array initialization
In current code there is no cache flush after initializing the scratchpad
buffer array with the scratchpad buffer pointers. This leads to a failure
of the "slot enable" command on the rpi4 board (Broadcom STB PCIe
controller + VL805 USB hub) - the very first TRB transfer on the command
ring fails and there is a timeout while waiting for the command completion
event. After adding the missing cache flush everything seems to be working
as expected.
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
---
drivers/usb/host/xhci-mem.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/usb/host/xhci-mem.c b/drivers/usb/host/xhci-mem.c
index 2d968aafb0..f446520528 100644
--- a/drivers/usb/host/xhci-mem.c
+++ b/drivers/usb/host/xhci-mem.c
@@ -395,6 +395,9 @@ static int xhci_scratchpad_alloc(struct xhci_ctrl *ctrl)
scratchpad->sp_array[i] = cpu_to_le64(ptr);
}
+ xhci_flush_cache((uintptr_t)scratchpad->sp_array,
+ sizeof(u64) * num_sp);
+
return 0;
fail_sp3:
--
2.27.0

View File

@@ -1,69 +0,0 @@
From 71343be3dd8d7f04cea781c8369aa77a36ae7123 Mon Sep 17 00:00:00 2001
Message-Id: <71343be3dd8d7f04cea781c8369aa77a36ae7123.1595101389.git.stefan@agner.ch>
In-Reply-To: <040a141f84f2f84bf8be18f85b4cdb34bf066df0.1595101389.git.stefan@agner.ch>
References: <040a141f84f2f84bf8be18f85b4cdb34bf066df0.1595101389.git.stefan@agner.ch>
From: Sylwester Nawrocki <s.nawrocki@samsung.com>
Date: Mon, 25 May 2020 13:39:52 +0200
Subject: [PATCH 03/20] usb: xhci: Use only 32-bit accesses in
xhci_writeq/xhci_readq
There might be hardware configurations where 64-bit data accesses
to XHCI registers are not supported properly. This patch removes
the readq/writeq so always two 32-bit accesses are used to read/write
64-bit XHCI registers, similarly as it is done in Linux kernel.
This patch fixes operation of the XHCI controller on RPI4 Broadcom
BCM2711 SoC based board, where the VL805 USB XHCI controller is
connected to the PCIe Root Complex, which is attached to the system
through the SCB bridge.
Even though the architecture is 64-bit the PCIe BAR is 32-bit and likely
the 64-bit wide register accesses initiated by the CPU are not properly
translated to a sequence of 32-bit PCIe accesses.
xhci_readq(), for example, always returns same value in upper and lower
32-bits, e.g. 0xabcd1234abcd1234 instead of 0x00000000abcd1234.
Cc: Sergey Temerkhanov <s.temerkhanov@gmail.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
---
include/usb/xhci.h | 8 --------
1 file changed, 8 deletions(-)
diff --git a/include/usb/xhci.h b/include/usb/xhci.h
index 20e4a21066..1170c0ac69 100644
--- a/include/usb/xhci.h
+++ b/include/usb/xhci.h
@@ -1114,28 +1114,20 @@ static inline void xhci_writel(uint32_t volatile *regs, const unsigned int val)
*/
static inline u64 xhci_readq(__le64 volatile *regs)
{
-#if BITS_PER_LONG == 64
- return readq(regs);
-#else
__u32 *ptr = (__u32 *)regs;
u64 val_lo = readl(ptr);
u64 val_hi = readl(ptr + 1);
return val_lo + (val_hi << 32);
-#endif
}
static inline void xhci_writeq(__le64 volatile *regs, const u64 val)
{
-#if BITS_PER_LONG == 64
- writeq(val, regs);
-#else
__u32 *ptr = (__u32 *)regs;
u32 val_lo = lower_32_bits(val);
/* FIXME */
u32 val_hi = upper_32_bits(val);
writel(val_lo, ptr);
writel(val_hi, ptr + 1);
-#endif
}
int xhci_hcd_init(int index, struct xhci_hccr **ret_hccr,
--
2.27.0

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@@ -1,85 +0,0 @@
From 82024c95e4d00b555f93d93b9f706c4d995ab302 Mon Sep 17 00:00:00 2001
Message-Id: <82024c95e4d00b555f93d93b9f706c4d995ab302.1595101389.git.stefan@agner.ch>
In-Reply-To: <040a141f84f2f84bf8be18f85b4cdb34bf066df0.1595101389.git.stefan@agner.ch>
References: <040a141f84f2f84bf8be18f85b4cdb34bf066df0.1595101389.git.stefan@agner.ch>
From: Sylwester Nawrocki <s.nawrocki@samsung.com>
Date: Mon, 25 May 2020 13:39:53 +0200
Subject: [PATCH 04/20] pci: Move some PCIe register offset definitions to a
common header
Some PCI Express register offsets are currently defined in multiple
drivers, move them to a common header to avoid re-definitions and
as a pre-requisite for adding new PCIe driver.
While at it replace some spaces with tabs.
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
---
drivers/pci/pci-rcar-gen3.c | 8 --------
drivers/pci/pcie_intel_fpga.c | 3 ---
include/pci.h | 13 +++++++++++--
3 files changed, 11 insertions(+), 13 deletions(-)
diff --git a/drivers/pci/pci-rcar-gen3.c b/drivers/pci/pci-rcar-gen3.c
index df7b37a592..1f51854ccc 100644
--- a/drivers/pci/pci-rcar-gen3.c
+++ b/drivers/pci/pci-rcar-gen3.c
@@ -118,14 +118,6 @@
#define RCAR_PCI_MAX_RESOURCES 4
#define MAX_NR_INBOUND_MAPS 6
-#define PCI_EXP_FLAGS 2 /* Capabilities register */
-#define PCI_EXP_FLAGS_TYPE 0x00f0 /* Device/Port type */
-#define PCI_EXP_TYPE_ROOT_PORT 0x4 /* Root Port */
-#define PCI_EXP_LNKCAP 12 /* Link Capabilities */
-#define PCI_EXP_LNKCAP_DLLLARC 0x00100000 /* Data Link Layer Link Active Reporting Capable */
-#define PCI_EXP_SLTCAP 20 /* Slot Capabilities */
-#define PCI_EXP_SLTCAP_PSN 0xfff80000 /* Physical Slot Number */
-
enum {
RCAR_PCI_ACCESS_READ,
RCAR_PCI_ACCESS_WRITE,
diff --git a/drivers/pci/pcie_intel_fpga.c b/drivers/pci/pcie_intel_fpga.c
index aa1903e547..9f102c64c6 100644
--- a/drivers/pci/pcie_intel_fpga.c
+++ b/drivers/pci/pcie_intel_fpga.c
@@ -67,9 +67,6 @@
#define IS_ROOT_PORT(pcie, bdf) \
((PCI_BUS(bdf) == pcie->first_busno) ? true : false)
-#define PCI_EXP_LNKSTA 18 /* Link Status */
-#define PCI_EXP_LNKSTA_DLLLA 0x2000 /* Data Link Layer Link Active */
-
/**
* struct intel_fpga_pcie - Intel FPGA PCIe controller state
* @bus: Pointer to the PCI bus
diff --git a/include/pci.h b/include/pci.h
index 19c9244b94..9cd8564436 100644
--- a/include/pci.h
+++ b/include/pci.h
@@ -471,10 +471,19 @@
#define PCI_EA_FIELD_MASK 0xfffffffc /* For Base & Max Offset */
/* PCI Express capabilities */
+#define PCI_EXP_FLAGS 2 /* Capabilities register */
+#define PCI_EXP_FLAGS_TYPE 0x00f0 /* Device/Port type */
+#define PCI_EXP_TYPE_ROOT_PORT 0x4 /* Root Port */
#define PCI_EXP_DEVCAP 4 /* Device capabilities */
-#define PCI_EXP_DEVCAP_FLR 0x10000000 /* Function Level Reset */
+#define PCI_EXP_DEVCAP_FLR 0x10000000 /* Function Level Reset */
#define PCI_EXP_DEVCTL 8 /* Device Control */
-#define PCI_EXP_DEVCTL_BCR_FLR 0x8000 /* Bridge Configuration Retry / FLR */
+#define PCI_EXP_DEVCTL_BCR_FLR 0x8000 /* Bridge Configuration Retry / FLR */
+#define PCI_EXP_LNKCAP 12 /* Link Capabilities */
+#define PCI_EXP_LNKCAP_DLLLARC 0x00100000 /* Data Link Layer Link Active Reporting Capable */
+#define PCI_EXP_LNKSTA 18 /* Link Status */
+#define PCI_EXP_LNKSTA_DLLLA 0x2000 /* Data Link Layer Link Active */
+#define PCI_EXP_SLTCAP 20 /* Slot Capabilities */
+#define PCI_EXP_SLTCAP_PSN 0xfff80000 /* Physical Slot Number */
/* Include the ID list */
--
2.27.0

View File

@@ -1,33 +0,0 @@
From 5dddca0c2ca5de72b74a5fca0d3ea67251add760 Mon Sep 17 00:00:00 2001
Message-Id: <5dddca0c2ca5de72b74a5fca0d3ea67251add760.1595101389.git.stefan@agner.ch>
In-Reply-To: <040a141f84f2f84bf8be18f85b4cdb34bf066df0.1595101389.git.stefan@agner.ch>
References: <040a141f84f2f84bf8be18f85b4cdb34bf066df0.1595101389.git.stefan@agner.ch>
From: Marek Szyprowski <m.szyprowski@samsung.com>
Date: Mon, 25 May 2020 13:39:54 +0200
Subject: [PATCH 05/20] rpi4: shorten a mapping for the DRAM
Remove the overlap between DRAM and device's IO area.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Reviewed-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
---
arch/arm/mach-bcm283x/init.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-bcm283x/init.c b/arch/arm/mach-bcm283x/init.c
index f4d00d892d..f9a5209480 100644
--- a/arch/arm/mach-bcm283x/init.c
+++ b/arch/arm/mach-bcm283x/init.c
@@ -39,7 +39,7 @@ static struct mm_region bcm2711_mem_map[] = {
{
.virt = 0x00000000UL,
.phys = 0x00000000UL,
- .size = 0xfe000000UL,
+ .size = 0xfc000000UL,
.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
PTE_BLOCK_INNER_SHARE
}, {
--
2.27.0

View File

@@ -1,76 +0,0 @@
From a326f58940f16b2dc3740fd9e87eb485da939ae5 Mon Sep 17 00:00:00 2001
Message-Id: <a326f58940f16b2dc3740fd9e87eb485da939ae5.1595101389.git.stefan@agner.ch>
In-Reply-To: <040a141f84f2f84bf8be18f85b4cdb34bf066df0.1595101389.git.stefan@agner.ch>
References: <040a141f84f2f84bf8be18f85b4cdb34bf066df0.1595101389.git.stefan@agner.ch>
From: Marek Szyprowski <m.szyprowski@samsung.com>
Date: Mon, 25 May 2020 13:39:55 +0200
Subject: [PATCH 06/20] rpi4: add a mapping for the PCIe XHCI controller MMIO
registers (ARM 64bit)
Create a non-cacheable mapping for the 0x600000000 physical memory region,
where MMIO registers for the PCIe XHCI controller are instantiated by the
PCIe bridge.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Reviewed-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
---
arch/arm/mach-bcm283x/init.c | 18 +++++++++++++++---
1 file changed, 15 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-bcm283x/init.c b/arch/arm/mach-bcm283x/init.c
index f9a5209480..cf4c5b245d 100644
--- a/arch/arm/mach-bcm283x/init.c
+++ b/arch/arm/mach-bcm283x/init.c
@@ -12,10 +12,15 @@
#include <dm/device.h>
#include <fdt_support.h>
+#define BCM2711_RPI4_PCIE_XHCI_MMIO_PHYS 0x600000000UL
+#define BCM2711_RPI4_PCIE_XHCI_MMIO_SIZE 0x800000UL
+
#ifdef CONFIG_ARM64
#include <asm/armv8/mmu.h>
-static struct mm_region bcm283x_mem_map[] = {
+#define MEM_MAP_MAX_ENTRIES (4)
+
+static struct mm_region bcm283x_mem_map[MEM_MAP_MAX_ENTRIES] = {
{
.virt = 0x00000000UL,
.phys = 0x00000000UL,
@@ -35,7 +40,7 @@ static struct mm_region bcm283x_mem_map[] = {
}
};
-static struct mm_region bcm2711_mem_map[] = {
+static struct mm_region bcm2711_mem_map[MEM_MAP_MAX_ENTRIES] = {
{
.virt = 0x00000000UL,
.phys = 0x00000000UL,
@@ -49,6 +54,13 @@ static struct mm_region bcm2711_mem_map[] = {
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
PTE_BLOCK_NON_SHARE |
PTE_BLOCK_PXN | PTE_BLOCK_UXN
+ }, {
+ .virt = BCM2711_RPI4_PCIE_XHCI_MMIO_PHYS,
+ .phys = BCM2711_RPI4_PCIE_XHCI_MMIO_PHYS,
+ .size = BCM2711_RPI4_PCIE_XHCI_MMIO_SIZE,
+ .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+ PTE_BLOCK_NON_SHARE |
+ PTE_BLOCK_PXN | PTE_BLOCK_UXN
}, {
/* List terminator */
0,
@@ -72,7 +84,7 @@ static void _rpi_update_mem_map(struct mm_region *pd)
{
int i;
- for (i = 0; i < 2; i++) {
+ for (i = 0; i < MEM_MAP_MAX_ENTRIES; i++) {
mem_map[i].virt = pd[i].virt;
mem_map[i].phys = pd[i].phys;
mem_map[i].size = pd[i].size;
--
2.27.0

View File

@@ -1,85 +0,0 @@
From 9c761488487ce27517e2a9e425f4ed0777708c53 Mon Sep 17 00:00:00 2001
Message-Id: <9c761488487ce27517e2a9e425f4ed0777708c53.1595101389.git.stefan@agner.ch>
In-Reply-To: <040a141f84f2f84bf8be18f85b4cdb34bf066df0.1595101389.git.stefan@agner.ch>
References: <040a141f84f2f84bf8be18f85b4cdb34bf066df0.1595101389.git.stefan@agner.ch>
From: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Date: Mon, 25 May 2020 13:39:56 +0200
Subject: [PATCH 07/20] linux/bitfield.h: Add primitives for manipulating
bitfields both in host- and fixed-endian
Imports Al Viro's original Linux commit 00b0c9b82663a, which contains
an in depth explanation and two fixes from Johannes Berg:
e7d4a95da86e0 "bitfield: fix *_encode_bits()",
37a3862e12382 "bitfield: add u8 helpers".
Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
[s.nawrocki: added empty lines between functions and macros]
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
---
include/linux/bitfield.h | 52 ++++++++++++++++++++++++++++++++++++++++
1 file changed, 52 insertions(+)
diff --git a/include/linux/bitfield.h b/include/linux/bitfield.h
index 8b9d6fff00..7ad8b088ed 100644
--- a/include/linux/bitfield.h
+++ b/include/linux/bitfield.h
@@ -103,4 +103,56 @@
(typeof(_mask))(((_reg) & (_mask)) >> __bf_shf(_mask)); \
})
+extern void __compiletime_error("value doesn't fit into mask")
+__field_overflow(void);
+extern void __compiletime_error("bad bitfield mask")
+__bad_mask(void);
+
+static __always_inline u64 field_multiplier(u64 field)
+{
+ if ((field | (field - 1)) & ((field | (field - 1)) + 1))
+ __bad_mask();
+ return field & -field;
+}
+
+static __always_inline u64 field_mask(u64 field)
+{
+ return field / field_multiplier(field);
+}
+
+#define ____MAKE_OP(type, base, to, from) \
+static __always_inline __##type type##_encode_bits(base v, base field) \
+{ \
+ if (__builtin_constant_p(v) && (v & ~field_mask(field))) \
+ __field_overflow(); \
+ return to((v & field_mask(field)) * field_multiplier(field)); \
+} \
+static __always_inline __##type type##_replace_bits(__##type old, \
+ base val, base field) \
+{ \
+ return (old & ~to(field)) | type##_encode_bits(val, field); \
+} \
+static __always_inline void type##p_replace_bits(__##type * p, \
+ base val, base field) \
+{ \
+ *p = (*p & ~to(field)) | type##_encode_bits(val, field); \
+} \
+static __always_inline base type##_get_bits(__##type v, base field) \
+{ \
+ return (from(v) & field) / field_multiplier(field); \
+}
+
+#define __MAKE_OP(size) \
+ ____MAKE_OP(le##size, u##size, cpu_to_le##size, le##size##_to_cpu) \
+ ____MAKE_OP(be##size, u##size, cpu_to_be##size, be##size##_to_cpu) \
+ ____MAKE_OP(u##size, u##size, ,)
+
+____MAKE_OP(u8, u8, ,)
+__MAKE_OP(16)
+__MAKE_OP(32)
+__MAKE_OP(64)
+
+#undef __MAKE_OP
+#undef ____MAKE_OP
+
#endif
--
2.27.0

View File

@@ -1,47 +0,0 @@
From 376bd33efa69abfc6102eb5a56b700c0f1981cf4 Mon Sep 17 00:00:00 2001
Message-Id: <376bd33efa69abfc6102eb5a56b700c0f1981cf4.1595101389.git.stefan@agner.ch>
In-Reply-To: <040a141f84f2f84bf8be18f85b4cdb34bf066df0.1595101389.git.stefan@agner.ch>
References: <040a141f84f2f84bf8be18f85b4cdb34bf066df0.1595101389.git.stefan@agner.ch>
From: Sylwester Nawrocki <s.nawrocki@samsung.com>
Date: Mon, 25 May 2020 13:39:57 +0200
Subject: [PATCH 08/20] pci: Add some PCI Express capability register offset
definitions
Add PCI Express capability definitions required by the Broadcom
STB PCIe controller driver.
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
---
include/pci.h | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/include/pci.h b/include/pci.h
index 9cd8564436..281f353916 100644
--- a/include/pci.h
+++ b/include/pci.h
@@ -479,11 +479,20 @@
#define PCI_EXP_DEVCTL 8 /* Device Control */
#define PCI_EXP_DEVCTL_BCR_FLR 0x8000 /* Bridge Configuration Retry / FLR */
#define PCI_EXP_LNKCAP 12 /* Link Capabilities */
+#define PCI_EXP_LNKCAP_SLS 0x0000000f /* Supported Link Speeds */
+#define PCI_EXP_LNKCAP_MLW 0x000003f0 /* Maximum Link Width */
#define PCI_EXP_LNKCAP_DLLLARC 0x00100000 /* Data Link Layer Link Active Reporting Capable */
#define PCI_EXP_LNKSTA 18 /* Link Status */
+#define PCI_EXP_LNKSTA_CLS 0x000f /* Current Link Speed */
+#define PCI_EXP_LNKSTA_CLS_2_5GB 0x0001 /* Current Link Speed 2.5GT/s */
+#define PCI_EXP_LNKSTA_CLS_5_0GB 0x0002 /* Current Link Speed 5.0GT/s */
+#define PCI_EXP_LNKSTA_CLS_8_0GB 0x0003 /* Current Link Speed 8.0GT/s */
+#define PCI_EXP_LNKSTA_NLW 0x03f0 /* Negotiated Link Width */
+#define PCI_EXP_LNKSTA_NLW_SHIFT 4 /* start of NLW mask in link status */
#define PCI_EXP_LNKSTA_DLLLA 0x2000 /* Data Link Layer Link Active */
#define PCI_EXP_SLTCAP 20 /* Slot Capabilities */
#define PCI_EXP_SLTCAP_PSN 0xfff80000 /* Physical Slot Number */
+#define PCI_EXP_LNKCTL2 48 /* Link Control 2 */
/* Include the ID list */
--
2.27.0

View File

@@ -1,686 +0,0 @@
From 21a9b72b4a28398c9511f3d9e3c1adc1439a8870 Mon Sep 17 00:00:00 2001
Message-Id: <21a9b72b4a28398c9511f3d9e3c1adc1439a8870.1595101389.git.stefan@agner.ch>
In-Reply-To: <040a141f84f2f84bf8be18f85b4cdb34bf066df0.1595101389.git.stefan@agner.ch>
References: <040a141f84f2f84bf8be18f85b4cdb34bf066df0.1595101389.git.stefan@agner.ch>
From: Sylwester Nawrocki <s.nawrocki@samsung.com>
Date: Mon, 25 May 2020 13:39:58 +0200
Subject: [PATCH 09/20] pci: Add driver for Broadcom BCM2711 SoC PCIe
controller
This patch adds basic driver PCI Express controller found on Broadcom
set-top-box SoCs, e.g. BCM2711.
The code is based on Linux upstream driver (pcie-brcmstb.c) with MSI
handling removed. The inbound access memory region is not currently
parsed from dma-ranges DT property and a fixed 3GB region is used.
The patch has been tested on RPI4 board, i.e. on BCM2711 SoC with VL805
USB Host Controller.
Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
---
drivers/pci/Kconfig | 9 +
drivers/pci/Makefile | 1 +
drivers/pci/pcie_brcmstb.c | 623 +++++++++++++++++++++++++++++++++++++
3 files changed, 633 insertions(+)
create mode 100644 drivers/pci/pcie_brcmstb.c
diff --git a/drivers/pci/Kconfig b/drivers/pci/Kconfig
index 6d8c22aacf..7e1e51d9ea 100644
--- a/drivers/pci/Kconfig
+++ b/drivers/pci/Kconfig
@@ -205,4 +205,13 @@ config PCIE_ROCKCHIP
Say Y here if you want to enable PCIe controller support on
Rockchip SoCs.
+config PCI_BRCMSTB
+ bool "Broadcom STB PCIe controller"
+ depends on DM_PCI
+ depends on ARCH_BCM283X
+ help
+ Say Y here if you want to enable support for PCIe controller
+ on Broadcom set-top-box (STB) SoCs.
+ This driver currently supports only BCM2711 SoC and RC mode
+ of the controller.
endif
diff --git a/drivers/pci/Makefile b/drivers/pci/Makefile
index 955351c5c2..29092916a6 100644
--- a/drivers/pci/Makefile
+++ b/drivers/pci/Makefile
@@ -44,3 +44,4 @@ obj-$(CONFIG_PCIE_INTEL_FPGA) += pcie_intel_fpga.o
obj-$(CONFIG_PCI_KEYSTONE) += pcie_dw_ti.o
obj-$(CONFIG_PCIE_MEDIATEK) += pcie_mediatek.o
obj-$(CONFIG_PCIE_ROCKCHIP) += pcie_rockchip.o pcie_rockchip_phy.o
+obj-$(CONFIG_PCI_BRCMSTB) += pcie_brcmstb.o
diff --git a/drivers/pci/pcie_brcmstb.c b/drivers/pci/pcie_brcmstb.c
new file mode 100644
index 0000000000..dade79e9c8
--- /dev/null
+++ b/drivers/pci/pcie_brcmstb.c
@@ -0,0 +1,623 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Broadcom STB PCIe controller driver
+ *
+ * Copyright (C) 2020 Samsung Electronics Co., Ltd.
+ *
+ * Based on upstream Linux kernel driver:
+ * drivers/pci/controller/pcie-brcmstb.c
+ * Copyright (C) 2009 - 2017 Broadcom
+ *
+ * Based driver by Nicolas Saenz Julienne
+ * Copyright (C) 2020 Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
+ */
+
+#include <common.h>
+#include <errno.h>
+#include <dm.h>
+#include <dm/ofnode.h>
+#include <pci.h>
+#include <asm/io.h>
+#include <linux/bitfield.h>
+#include <linux/log2.h>
+#include <linux/iopoll.h>
+
+/* Offset of the mandatory PCIe capability config registers */
+#define BRCM_PCIE_CAP_REGS 0x00ac
+
+/* The PCIe controller register offsets */
+#define PCIE_RC_CFG_VENDOR_SPECIFIC_REG1 0x0188
+#define VENDOR_SPECIFIC_REG1_ENDIAN_MODE_BAR2_MASK 0xc
+#define VENDOR_SPECIFIC_REG1_LITTLE_ENDIAN 0x0
+
+#define PCIE_RC_CFG_PRIV1_ID_VAL3 0x043c
+#define CFG_PRIV1_ID_VAL3_CLASS_CODE_MASK 0xffffff
+
+#define PCIE_RC_DL_MDIO_ADDR 0x1100
+#define PCIE_RC_DL_MDIO_WR_DATA 0x1104
+#define PCIE_RC_DL_MDIO_RD_DATA 0x1108
+
+#define PCIE_MISC_MISC_CTRL 0x4008
+#define MISC_CTRL_SCB_ACCESS_EN_MASK 0x1000
+#define MISC_CTRL_CFG_READ_UR_MODE_MASK 0x2000
+#define MISC_CTRL_MAX_BURST_SIZE_MASK 0x300000
+#define MISC_CTRL_MAX_BURST_SIZE_128 0x0
+#define MISC_CTRL_SCB0_SIZE_MASK 0xf8000000
+
+#define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_LO 0x400c
+#define PCIE_MEM_WIN0_LO(win) \
+ PCIE_MISC_CPU_2_PCIE_MEM_WIN0_LO + ((win) * 4)
+
+#define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_HI 0x4010
+#define PCIE_MEM_WIN0_HI(win) \
+ PCIE_MISC_CPU_2_PCIE_MEM_WIN0_HI + ((win) * 4)
+
+#define PCIE_MISC_RC_BAR1_CONFIG_LO 0x402c
+#define RC_BAR1_CONFIG_LO_SIZE_MASK 0x1f
+
+#define PCIE_MISC_RC_BAR2_CONFIG_LO 0x4034
+#define RC_BAR2_CONFIG_LO_SIZE_MASK 0x1f
+#define PCIE_MISC_RC_BAR2_CONFIG_HI 0x4038
+
+#define PCIE_MISC_RC_BAR3_CONFIG_LO 0x403c
+#define RC_BAR3_CONFIG_LO_SIZE_MASK 0x1f
+
+#define PCIE_MISC_PCIE_STATUS 0x4068
+#define STATUS_PCIE_PORT_MASK 0x80
+#define STATUS_PCIE_PORT_SHIFT 7
+#define STATUS_PCIE_DL_ACTIVE_MASK 0x20
+#define STATUS_PCIE_DL_ACTIVE_SHIFT 5
+#define STATUS_PCIE_PHYLINKUP_MASK 0x10
+#define STATUS_PCIE_PHYLINKUP_SHIFT 4
+
+#define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_BASE_LIMIT 0x4070
+#define MEM_WIN0_BASE_LIMIT_LIMIT_MASK 0xfff00000
+#define MEM_WIN0_BASE_LIMIT_BASE_MASK 0xfff0
+#define MEM_WIN0_BASE_LIMIT_BASE_HI_SHIFT 12
+#define PCIE_MEM_WIN0_BASE_LIMIT(win) \
+ PCIE_MISC_CPU_2_PCIE_MEM_WIN0_BASE_LIMIT + ((win) * 4)
+
+#define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_BASE_HI 0x4080
+#define MEM_WIN0_BASE_HI_BASE_MASK 0xff
+#define PCIE_MEM_WIN0_BASE_HI(win) \
+ PCIE_MISC_CPU_2_PCIE_MEM_WIN0_BASE_HI + ((win) * 8)
+
+#define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_LIMIT_HI 0x4084
+#define PCIE_MEM_WIN0_LIMIT_HI_LIMIT_MASK 0xff
+#define PCIE_MEM_WIN0_LIMIT_HI(win) \
+ PCIE_MISC_CPU_2_PCIE_MEM_WIN0_LIMIT_HI + ((win) * 8)
+
+#define PCIE_MISC_HARD_PCIE_HARD_DEBUG 0x4204
+#define PCIE_HARD_DEBUG_CLKREQ_DEBUG_ENABLE_MASK 0x2
+#define PCIE_HARD_DEBUG_SERDES_IDDQ_MASK 0x08000000
+
+#define PCIE_MSI_INTR2_CLR 0x4508
+#define PCIE_MSI_INTR2_MASK_SET 0x4510
+
+#define PCIE_EXT_CFG_DATA 0x8000
+
+#define PCIE_EXT_CFG_INDEX 0x9000
+#define PCIE_EXT_BUSNUM_SHIFT 20
+#define PCIE_EXT_SLOT_SHIFT 15
+#define PCIE_EXT_FUNC_SHIFT 12
+
+#define PCIE_RGR1_SW_INIT_1 0x9210
+#define RGR1_SW_INIT_1_PERST_MASK 0x1
+#define RGR1_SW_INIT_1_INIT_MASK 0x2
+
+/* PCIe parameters */
+#define BRCM_NUM_PCIE_OUT_WINS 4
+
+/* MDIO registers */
+#define MDIO_PORT0 0x0
+#define MDIO_DATA_MASK 0x7fffffff
+#define MDIO_DATA_SHIFT 0
+#define MDIO_PORT_MASK 0xf0000
+#define MDIO_PORT_SHIFT 16
+#define MDIO_REGAD_MASK 0xffff
+#define MDIO_REGAD_SHIFT 0
+#define MDIO_CMD_MASK 0xfff00000
+#define MDIO_CMD_SHIFT 20
+#define MDIO_CMD_READ 0x1
+#define MDIO_CMD_WRITE 0x0
+#define MDIO_DATA_DONE_MASK 0x80000000
+#define SSC_REGS_ADDR 0x1100
+#define SET_ADDR_OFFSET 0x1f
+#define SSC_CNTL_OFFSET 0x2
+#define SSC_CNTL_OVRD_EN_MASK 0x8000
+#define SSC_CNTL_OVRD_VAL_MASK 0x4000
+#define SSC_STATUS_OFFSET 0x1
+#define SSC_STATUS_SSC_MASK 0x400
+#define SSC_STATUS_SSC_SHIFT 10
+#define SSC_STATUS_PLL_LOCK_MASK 0x800
+#define SSC_STATUS_PLL_LOCK_SHIFT 11
+
+/**
+ * struct brcm_pcie - the PCIe controller state
+ * @base: Base address of memory mapped IO registers of the controller
+ * @gen: Non-zero value indicates limitation of the PCIe controller operation
+ * to a specific generation (1, 2 or 3)
+ * @ssc: true indicates active Spread Spectrum Clocking operation
+ */
+struct brcm_pcie {
+ void __iomem *base;
+
+ int gen;
+ bool ssc;
+};
+
+/**
+ * brcm_pcie_encode_ibar_size() - Encode the inbound "BAR" region size
+ * @size: The inbound region size
+ *
+ * This function converts size of the inbound "BAR" region to the non-linear
+ * values of the PCIE_MISC_RC_BAR[123]_CONFIG_LO register SIZE field.
+ *
+ * Return: The encoded inbound region size
+ */
+static int brcm_pcie_encode_ibar_size(u64 size)
+{
+ int log2_in = ilog2(size);
+
+ if (log2_in >= 12 && log2_in <= 15)
+ /* Covers 4KB to 32KB (inclusive) */
+ return (log2_in - 12) + 0x1c;
+ else if (log2_in >= 16 && log2_in <= 37)
+ /* Covers 64KB to 32GB, (inclusive) */
+ return log2_in - 15;
+
+ /* Something is awry so disable */
+ return 0;
+}
+
+/**
+ * brcm_pcie_rc_mode() - Check if PCIe controller is in RC mode
+ * @pcie: Pointer to the PCIe controller state
+ *
+ * The controller is capable of serving in both RC and EP roles.
+ *
+ * Return: true for RC mode, false for EP mode.
+ */
+static bool brcm_pcie_rc_mode(struct brcm_pcie *pcie)
+{
+ u32 val;
+
+ val = readl(pcie->base + PCIE_MISC_PCIE_STATUS);
+
+ return (val & STATUS_PCIE_PORT_MASK) >> STATUS_PCIE_PORT_SHIFT;
+}
+
+/**
+ * brcm_pcie_link_up() - Check whether the PCIe link is up
+ * @pcie: Pointer to the PCIe controller state
+ *
+ * Return: true if the link is up, false otherwise.
+ */
+static bool brcm_pcie_link_up(struct brcm_pcie *pcie)
+{
+ u32 val, dla, plu;
+
+ val = readl(pcie->base + PCIE_MISC_PCIE_STATUS);
+ dla = (val & STATUS_PCIE_DL_ACTIVE_MASK) >> STATUS_PCIE_DL_ACTIVE_SHIFT;
+ plu = (val & STATUS_PCIE_PHYLINKUP_MASK) >> STATUS_PCIE_PHYLINKUP_SHIFT;
+
+ return dla && plu;
+}
+
+static int brcm_pcie_config_address(const struct udevice *dev, pci_dev_t bdf,
+ uint offset, void **paddress)
+{
+ struct brcm_pcie *pcie = dev_get_priv(dev);
+ unsigned int pci_bus = PCI_BUS(bdf);
+ unsigned int pci_dev = PCI_DEV(bdf);
+ unsigned int pci_func = PCI_FUNC(bdf);
+ int idx;
+
+ /*
+ * Busses 0 (host PCIe bridge) and 1 (its immediate child)
+ * are limited to a single device each
+ */
+ if (pci_bus < 2 && pci_dev > 0)
+ return -EINVAL;
+
+ /* Accesses to the RC go right to the RC registers */
+ if (pci_bus == 0) {
+ *paddress = pcie->base + offset;
+ return 0;
+ }
+
+ /* For devices, write to the config space index register */
+ idx = (pci_bus << PCIE_EXT_BUSNUM_SHIFT)
+ | (pci_dev << PCIE_EXT_SLOT_SHIFT)
+ | (pci_func << PCIE_EXT_FUNC_SHIFT);
+
+ writel(idx, pcie->base + PCIE_EXT_CFG_INDEX);
+ *paddress = pcie->base + PCIE_EXT_CFG_DATA + offset;
+
+ return 0;
+}
+
+static int brcm_pcie_read_config(const struct udevice *bus, pci_dev_t bdf,
+ uint offset, ulong *valuep,
+ enum pci_size_t size)
+{
+ return pci_generic_mmap_read_config(bus, brcm_pcie_config_address,
+ bdf, offset, valuep, size);
+}
+
+static int brcm_pcie_write_config(struct udevice *bus, pci_dev_t bdf,
+ uint offset, ulong value,
+ enum pci_size_t size)
+{
+ return pci_generic_mmap_write_config(bus, brcm_pcie_config_address,
+ bdf, offset, value, size);
+}
+
+static const char *link_speed_to_str(unsigned int cls)
+{
+ switch (cls) {
+ case PCI_EXP_LNKSTA_CLS_2_5GB: return "2.5";
+ case PCI_EXP_LNKSTA_CLS_5_0GB: return "5.0";
+ case PCI_EXP_LNKSTA_CLS_8_0GB: return "8.0";
+ default:
+ break;
+ }
+
+ return "??";
+}
+
+static u32 brcm_pcie_mdio_form_pkt(unsigned int port, unsigned int regad,
+ unsigned int cmd)
+{
+ u32 pkt;
+
+ pkt = (port << MDIO_PORT_SHIFT) & MDIO_PORT_MASK;
+ pkt |= (regad << MDIO_REGAD_SHIFT) & MDIO_REGAD_MASK;
+ pkt |= (cmd << MDIO_CMD_SHIFT) & MDIO_CMD_MASK;
+
+ return pkt;
+}
+
+/**
+ * brcm_pcie_mdio_read() - Perform a register read on the internal MDIO bus
+ * @base: Pointer to the PCIe controller IO registers
+ * @port: The MDIO port number
+ * @regad: The register address
+ * @val: A pointer at which to store the read value
+ *
+ * Return: 0 on success and register value in @val, negative error value
+ * on failure.
+ */
+static int brcm_pcie_mdio_read(void __iomem *base, unsigned int port,
+ unsigned int regad, u32 *val)
+{
+ u32 data, addr;
+ int ret;
+
+ addr = brcm_pcie_mdio_form_pkt(port, regad, MDIO_CMD_READ);
+ writel(addr, base + PCIE_RC_DL_MDIO_ADDR);
+ readl(base + PCIE_RC_DL_MDIO_ADDR);
+
+ ret = readl_poll_timeout(base + PCIE_RC_DL_MDIO_RD_DATA, data,
+ (data & MDIO_DATA_DONE_MASK), 100);
+
+ *val = data & MDIO_DATA_MASK;
+
+ return ret;
+}
+
+/**
+ * brcm_pcie_mdio_write() - Perform a register write on the internal MDIO bus
+ * @base: Pointer to the PCIe controller IO registers
+ * @port: The MDIO port number
+ * @regad: Address of the register
+ * @wrdata: The value to write
+ *
+ * Return: 0 on success, negative error value on failure.
+ */
+static int brcm_pcie_mdio_write(void __iomem *base, unsigned int port,
+ unsigned int regad, u16 wrdata)
+{
+ u32 data, addr;
+
+ addr = brcm_pcie_mdio_form_pkt(port, regad, MDIO_CMD_WRITE);
+ writel(addr, base + PCIE_RC_DL_MDIO_ADDR);
+ readl(base + PCIE_RC_DL_MDIO_ADDR);
+ writel(MDIO_DATA_DONE_MASK | wrdata, base + PCIE_RC_DL_MDIO_WR_DATA);
+
+ return readl_poll_timeout(base + PCIE_RC_DL_MDIO_WR_DATA, data,
+ !(data & MDIO_DATA_DONE_MASK), 100);
+}
+
+/**
+ * brcm_pcie_set_ssc() - Configure the controller for Spread Spectrum Clocking
+ * @base: pointer to the PCIe controller IO registers
+ *
+ * Return: 0 on success, negative error value on failure.
+ */
+static int brcm_pcie_set_ssc(void __iomem *base)
+{
+ int pll, ssc;
+ int ret;
+ u32 tmp;
+
+ ret = brcm_pcie_mdio_write(base, MDIO_PORT0, SET_ADDR_OFFSET,
+ SSC_REGS_ADDR);
+ if (ret < 0)
+ return ret;
+
+ ret = brcm_pcie_mdio_read(base, MDIO_PORT0, SSC_CNTL_OFFSET, &tmp);
+ if (ret < 0)
+ return ret;
+
+ tmp |= (SSC_CNTL_OVRD_EN_MASK | SSC_CNTL_OVRD_VAL_MASK);
+
+ ret = brcm_pcie_mdio_write(base, MDIO_PORT0, SSC_CNTL_OFFSET, tmp);
+ if (ret < 0)
+ return ret;
+
+ udelay(1000);
+ ret = brcm_pcie_mdio_read(base, MDIO_PORT0, SSC_STATUS_OFFSET, &tmp);
+ if (ret < 0)
+ return ret;
+
+ ssc = (tmp & SSC_STATUS_SSC_MASK) >> SSC_STATUS_SSC_SHIFT;
+ pll = (tmp & SSC_STATUS_PLL_LOCK_MASK) >> SSC_STATUS_PLL_LOCK_SHIFT;
+
+ return ssc && pll ? 0 : -EIO;
+}
+
+/**
+ * brcm_pcie_set_gen() - Limits operation to a specific generation (1, 2 or 3)
+ * @pcie: pointer to the PCIe controller state
+ * @gen: PCIe generation to limit the controller's operation to
+ */
+static void brcm_pcie_set_gen(struct brcm_pcie *pcie, unsigned int gen)
+{
+ void __iomem *cap_base = pcie->base + BRCM_PCIE_CAP_REGS;
+
+ u16 lnkctl2 = readw(cap_base + PCI_EXP_LNKCTL2);
+ u32 lnkcap = readl(cap_base + PCI_EXP_LNKCAP);
+
+ lnkcap = (lnkcap & ~PCI_EXP_LNKCAP_SLS) | gen;
+ writel(lnkcap, cap_base + PCI_EXP_LNKCAP);
+
+ lnkctl2 = (lnkctl2 & ~0xf) | gen;
+ writew(lnkctl2, cap_base + PCI_EXP_LNKCTL2);
+}
+
+static void brcm_pcie_set_outbound_win(struct brcm_pcie *pcie,
+ unsigned int win, u64 phys_addr,
+ u64 pcie_addr, u64 size)
+{
+ void __iomem *base = pcie->base;
+ u32 phys_addr_mb_high, limit_addr_mb_high;
+ phys_addr_t phys_addr_mb, limit_addr_mb;
+ int high_addr_shift;
+ u32 tmp;
+
+ /* Set the base of the pcie_addr window */
+ writel(lower_32_bits(pcie_addr), base + PCIE_MEM_WIN0_LO(win));
+ writel(upper_32_bits(pcie_addr), base + PCIE_MEM_WIN0_HI(win));
+
+ /* Write the addr base & limit lower bits (in MBs) */
+ phys_addr_mb = phys_addr / SZ_1M;
+ limit_addr_mb = (phys_addr + size - 1) / SZ_1M;
+
+ tmp = readl(base + PCIE_MEM_WIN0_BASE_LIMIT(win));
+ u32p_replace_bits(&tmp, phys_addr_mb,
+ MEM_WIN0_BASE_LIMIT_BASE_MASK);
+ u32p_replace_bits(&tmp, limit_addr_mb,
+ MEM_WIN0_BASE_LIMIT_LIMIT_MASK);
+ writel(tmp, base + PCIE_MEM_WIN0_BASE_LIMIT(win));
+
+ /* Write the cpu & limit addr upper bits */
+ high_addr_shift = MEM_WIN0_BASE_LIMIT_BASE_HI_SHIFT;
+ phys_addr_mb_high = phys_addr_mb >> high_addr_shift;
+ tmp = readl(base + PCIE_MEM_WIN0_BASE_HI(win));
+ u32p_replace_bits(&tmp, phys_addr_mb_high,
+ MEM_WIN0_BASE_HI_BASE_MASK);
+ writel(tmp, base + PCIE_MEM_WIN0_BASE_HI(win));
+
+ limit_addr_mb_high = limit_addr_mb >> high_addr_shift;
+ tmp = readl(base + PCIE_MEM_WIN0_LIMIT_HI(win));
+ u32p_replace_bits(&tmp, limit_addr_mb_high,
+ PCIE_MEM_WIN0_LIMIT_HI_LIMIT_MASK);
+ writel(tmp, base + PCIE_MEM_WIN0_LIMIT_HI(win));
+}
+
+static int brcm_pcie_probe(struct udevice *dev)
+{
+ struct udevice *ctlr = pci_get_controller(dev);
+ struct pci_controller *hose = dev_get_uclass_priv(ctlr);
+ struct brcm_pcie *pcie = dev_get_priv(dev);
+ void __iomem *base = pcie->base;
+ bool ssc_good = false;
+ int num_out_wins = 0;
+ u64 rc_bar2_offset, rc_bar2_size;
+ unsigned int scb_size_val;
+ int i, ret;
+ u16 nlw, cls, lnksta;
+ u32 tmp;
+
+ /*
+ * Reset the bridge, assert the fundamental reset. Note for some SoCs,
+ * e.g. BCM7278, the fundamental reset should not be asserted here.
+ * This will need to be changed when support for other SoCs is added.
+ */
+ setbits_le32(base + PCIE_RGR1_SW_INIT_1,
+ RGR1_SW_INIT_1_INIT_MASK | RGR1_SW_INIT_1_PERST_MASK);
+ /*
+ * The delay is a safety precaution to preclude the reset signal
+ * from looking like a glitch.
+ */
+ udelay(100);
+
+ /* Take the bridge out of reset */
+ clrbits_le32(base + PCIE_RGR1_SW_INIT_1, RGR1_SW_INIT_1_INIT_MASK);
+
+ clrbits_le32(base + PCIE_MISC_HARD_PCIE_HARD_DEBUG,
+ PCIE_HARD_DEBUG_SERDES_IDDQ_MASK);
+
+ /* Wait for SerDes to be stable */
+ udelay(100);
+
+ /* Set SCB_MAX_BURST_SIZE, CFG_READ_UR_MODE, SCB_ACCESS_EN */
+ clrsetbits_le32(base + PCIE_MISC_MISC_CTRL,
+ MISC_CTRL_MAX_BURST_SIZE_MASK,
+ MISC_CTRL_SCB_ACCESS_EN_MASK |
+ MISC_CTRL_CFG_READ_UR_MODE_MASK |
+ MISC_CTRL_MAX_BURST_SIZE_128);
+ /*
+ * TODO: When support for other SoCs than BCM2711 is added we may
+ * need to use the base address and size(s) provided in the dma-ranges
+ * property.
+ */
+ rc_bar2_offset = 0;
+ rc_bar2_size = 0xc0000000;
+
+ tmp = lower_32_bits(rc_bar2_offset);
+ u32p_replace_bits(&tmp, brcm_pcie_encode_ibar_size(rc_bar2_size),
+ RC_BAR2_CONFIG_LO_SIZE_MASK);
+ writel(tmp, base + PCIE_MISC_RC_BAR2_CONFIG_LO);
+ writel(upper_32_bits(rc_bar2_offset),
+ base + PCIE_MISC_RC_BAR2_CONFIG_HI);
+
+ scb_size_val = rc_bar2_size ?
+ ilog2(rc_bar2_size) - 15 : 0xf; /* 0xf is 1GB */
+
+ tmp = readl(base + PCIE_MISC_MISC_CTRL);
+ u32p_replace_bits(&tmp, scb_size_val,
+ MISC_CTRL_SCB0_SIZE_MASK);
+ writel(tmp, base + PCIE_MISC_MISC_CTRL);
+
+ /* Disable the PCIe->GISB memory window (RC_BAR1) */
+ clrbits_le32(base + PCIE_MISC_RC_BAR1_CONFIG_LO,
+ RC_BAR1_CONFIG_LO_SIZE_MASK);
+
+ /* Disable the PCIe->SCB memory window (RC_BAR3) */
+ clrbits_le32(base + PCIE_MISC_RC_BAR3_CONFIG_LO,
+ RC_BAR3_CONFIG_LO_SIZE_MASK);
+
+ /* Mask all interrupts since we are not handling any yet */
+ writel(0xffffffff, base + PCIE_MSI_INTR2_MASK_SET);
+
+ /* Clear any interrupts we find on boot */
+ writel(0xffffffff, base + PCIE_MSI_INTR2_CLR);
+
+ if (pcie->gen)
+ brcm_pcie_set_gen(pcie, pcie->gen);
+
+ /* Unassert the fundamental reset */
+ clrbits_le32(pcie->base + PCIE_RGR1_SW_INIT_1,
+ RGR1_SW_INIT_1_PERST_MASK);
+
+ /* Give the RC/EP time to wake up, before trying to configure RC.
+ * Intermittently check status for link-up, up to a total of 100ms.
+ */
+ for (i = 0; i < 100 && !brcm_pcie_link_up(pcie); i += 5)
+ mdelay(5);
+
+ if (!brcm_pcie_link_up(pcie)) {
+ printf("PCIe BRCM: link down\n");
+ return -EINVAL;
+ }
+
+ if (!brcm_pcie_rc_mode(pcie)) {
+ printf("PCIe misconfigured; is in EP mode\n");
+ return -EINVAL;
+ }
+
+ for (i = 0; i < hose->region_count; i++) {
+ struct pci_region *reg = &hose->regions[i];
+
+ if (reg->flags != PCI_REGION_MEM)
+ continue;
+
+ if (num_out_wins >= BRCM_NUM_PCIE_OUT_WINS)
+ return -EINVAL;
+
+ brcm_pcie_set_outbound_win(pcie, num_out_wins, reg->phys_start,
+ reg->bus_start, reg->size);
+
+ num_out_wins++;
+ }
+
+ /*
+ * For config space accesses on the RC, show the right class for
+ * a PCIe-PCIe bridge (the default setting is to be EP mode).
+ */
+ clrsetbits_le32(base + PCIE_RC_CFG_PRIV1_ID_VAL3,
+ CFG_PRIV1_ID_VAL3_CLASS_CODE_MASK, 0x060400);
+
+ if (pcie->ssc) {
+ ret = brcm_pcie_set_ssc(pcie->base);
+ if (!ret)
+ ssc_good = true;
+ else
+ printf("PCIe BRCM: failed attempt to enter SSC mode\n");
+ }
+
+ lnksta = readw(base + BRCM_PCIE_CAP_REGS + PCI_EXP_LNKSTA);
+ cls = lnksta & PCI_EXP_LNKSTA_CLS;
+ nlw = (lnksta & PCI_EXP_LNKSTA_NLW) >> PCI_EXP_LNKSTA_NLW_SHIFT;
+
+ printf("PCIe BRCM: link up, %s Gbps x%u %s\n", link_speed_to_str(cls),
+ nlw, ssc_good ? "(SSC)" : "(!SSC)");
+
+ /* PCIe->SCB endian mode for BAR */
+ clrsetbits_le32(base + PCIE_RC_CFG_VENDOR_SPECIFIC_REG1,
+ VENDOR_SPECIFIC_REG1_ENDIAN_MODE_BAR2_MASK,
+ VENDOR_SPECIFIC_REG1_LITTLE_ENDIAN);
+ /*
+ * Refclk from RC should be gated with CLKREQ# input when ASPM L0s,L1
+ * is enabled => setting the CLKREQ_DEBUG_ENABLE field to 1.
+ */
+ setbits_le32(base + PCIE_MISC_HARD_PCIE_HARD_DEBUG,
+ PCIE_HARD_DEBUG_CLKREQ_DEBUG_ENABLE_MASK);
+
+ return 0;
+}
+
+static int brcm_pcie_ofdata_to_platdata(struct udevice *dev)
+{
+ struct brcm_pcie *pcie = dev_get_priv(dev);
+ ofnode dn = dev_ofnode(dev);
+ u32 max_link_speed;
+ int ret;
+
+ /* Get the controller base address */
+ pcie->base = dev_read_addr_ptr(dev);
+ if (!pcie->base)
+ return -EINVAL;
+
+ pcie->ssc = ofnode_read_bool(dn, "brcm,enable-ssc");
+
+ ret = ofnode_read_u32(dn, "max-link-speed", &max_link_speed);
+ if (ret < 0 || max_link_speed > 4)
+ pcie->gen = 0;
+ else
+ pcie->gen = max_link_speed;
+
+ return 0;
+}
+
+static const struct dm_pci_ops brcm_pcie_ops = {
+ .read_config = brcm_pcie_read_config,
+ .write_config = brcm_pcie_write_config,
+};
+
+static const struct udevice_id brcm_pcie_ids[] = {
+ { .compatible = "brcm,bcm2711-pcie" },
+ { }
+};
+
+U_BOOT_DRIVER(pcie_brcm_base) = {
+ .name = "pcie_brcm",
+ .id = UCLASS_PCI,
+ .ops = &brcm_pcie_ops,
+ .of_match = brcm_pcie_ids,
+ .probe = brcm_pcie_probe,
+ .ofdata_to_platdata = brcm_pcie_ofdata_to_platdata,
+ .priv_auto_alloc_size = sizeof(struct brcm_pcie),
+};
--
2.27.0

View File

@@ -1,102 +0,0 @@
From 66537b5984af81b5add420df9eb64c508268f581 Mon Sep 17 00:00:00 2001
Message-Id: <66537b5984af81b5add420df9eb64c508268f581.1595101389.git.stefan@agner.ch>
In-Reply-To: <040a141f84f2f84bf8be18f85b4cdb34bf066df0.1595101389.git.stefan@agner.ch>
References: <040a141f84f2f84bf8be18f85b4cdb34bf066df0.1595101389.git.stefan@agner.ch>
From: Marek Szyprowski <m.szyprowski@samsung.com>
Date: Mon, 25 May 2020 13:39:59 +0200
Subject: [PATCH 10/20] configs: Enable support for the XHCI controller on RPI4
board (ARM 64-bit)
This requires enabling BRCMSTB PCIe and XHCI_PCI drivers as well as PCI
and USB commands. To get it working one has to call the following commands:
"pci enum; usb start;", thus such commands have been added to the default
"preboot" environment variable. One has to update their environment if it
is already configured to get this feature working out of the box.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
---
configs/rpi_4_defconfig | 9 +++++++++
configs/rpi_arm64_defconfig | 8 +++++++-
2 files changed, 16 insertions(+), 1 deletion(-)
diff --git a/configs/rpi_4_defconfig b/configs/rpi_4_defconfig
index f0301dc8bc..b42efe6072 100644
--- a/configs/rpi_4_defconfig
+++ b/configs/rpi_4_defconfig
@@ -6,6 +6,8 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_ENV_SIZE=0x4000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_OF_BOARD_SETUP=y
+CONFIG_USE_PREBOOT=y
+CONFIG_PREBOOT="pci enum; usb start;"
CONFIG_MISC_INIT_R=y
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
@@ -13,6 +15,8 @@ CONFIG_SYS_PROMPT="U-Boot> "
CONFIG_CMD_DFU=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_USB=y
CONFIG_CMD_FS_UUID=y
CONFIG_OF_BOARD=y
CONFIG_ENV_FAT_DEVICE_AND_PART="0:1"
@@ -26,12 +30,17 @@ CONFIG_MMC_SDHCI_SDMA=y
CONFIG_MMC_SDHCI_BCM2835=y
CONFIG_DM_ETH=y
CONFIG_BCMGENET=y
+CONFIG_PCI=y
+CONFIG_DM_PCI=y
+CONFIG_PCI_BRCMSTB=y
CONFIG_PINCTRL=y
# CONFIG_PINCTRL_GENERIC is not set
# CONFIG_REQUIRE_SERIAL_CONSOLE is not set
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_DM_USB_GADGET=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_PCI=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_MANUFACTURER="FSL"
CONFIG_USB_GADGET_VENDOR_NUM=0x0525
diff --git a/configs/rpi_arm64_defconfig b/configs/rpi_arm64_defconfig
index d16c2388af..0feea7f0be 100644
--- a/configs/rpi_arm64_defconfig
+++ b/configs/rpi_arm64_defconfig
@@ -7,13 +7,14 @@ CONFIG_ENV_SIZE=0x4000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_USE_PREBOOT=y
-CONFIG_PREBOOT="usb start"
+CONFIG_PREBOOT="pci enum; usb start;"
CONFIG_MISC_INIT_R=y
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SYS_PROMPT="U-Boot> "
CONFIG_CMD_GPIO=y
CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_USB=y
CONFIG_CMD_FS_UUID=y
CONFIG_OF_BOARD=y
@@ -26,11 +27,16 @@ CONFIG_MMC_SDHCI_SDMA=y
CONFIG_MMC_SDHCI_BCM2835=y
CONFIG_DM_ETH=y
CONFIG_BCMGENET=y
+CONFIG_PCI=y
+CONFIG_DM_PCI=y
+CONFIG_PCI_BRCMSTB=y
CONFIG_PINCTRL=y
# CONFIG_PINCTRL_GENERIC is not set
# CONFIG_REQUIRE_SERIAL_CONSOLE is not set
CONFIG_USB=y
CONFIG_DM_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_PCI=y
CONFIG_USB_DWC2=y
CONFIG_USB_KEYBOARD=y
CONFIG_USB_HOST_ETHER=y
--
2.27.0

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