Add ODROID-M1 support (#2387)
* Add ODROID-M1 board support * Add Rockchip kernel config for ODROID-M1 Kernel defconfig for Rockchip is based on Armbian kernel defconfig from config/kernel/linux-rk3568-odroid-edge.config (git hash 95c829f9e664). * Add U-Boot/Kernel patches * Add Rockchip blob support Add package which provides Rockchip TPL and ATF firmware binaries. * Use latest U-Boot for ODROID-M1 * Fix Rockchip blob support * Update defconfig * Use GPT by default * Create uboot partition to support non-recovery boot * Enable eMMC boot in U-Boot SPL * Drop unnecessary mmc device selection Distro boot already activates the right mmc device. The extra selection seems to actually cause problems for eMMC boot. * Make sure driver for eMMC is built-in * Use odroid-m1 as Supervisor machine * Add ODROID-M1 to CI pipeline and issue template * Bump to Linux 6.1.16
This commit is contained in:
Stefan Agner
@@ -0,0 +1,455 @@
|
||||
From d388735d551e09b00317a509859fca51776b9826 Mon Sep 17 00:00:00 2001
|
||||
Message-Id: <d388735d551e09b00317a509859fca51776b9826.1678107917.git.stefan@agner.ch>
|
||||
From: Dongjin Kim <tobetter@gmail.com>
|
||||
Date: Fri, 30 Sep 2022 07:12:35 +0200
|
||||
Subject: [PATCH] arm64: dts: rockchip: Add Hardkernel ODROID-M1 board
|
||||
|
||||
This patch is to add a device tree for new board Hardkernel ODROID-M1
|
||||
based on Rockchip RK3568, includes basic peripherals -
|
||||
uart/eMMC/uSD/i2c and on-board ethernet.
|
||||
|
||||
Signed-off-by: Dongjin Kim <tobetter@gmail.com>
|
||||
[aurelien@aurel32.net: addressed issues from initial review]
|
||||
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
|
||||
Tested-by: Dan Johansen <strit@manjaro.org>
|
||||
Link: https://lore.kernel.org/r/20220930051246.391614-3-aurelien@aurel32.net
|
||||
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
|
||||
---
|
||||
arch/arm64/boot/dts/rockchip/Makefile | 1 +
|
||||
.../boot/dts/rockchip/rk3568-odroid-m1.dts | 414 ++++++++++++++++++
|
||||
2 files changed, 415 insertions(+)
|
||||
create mode 100644 arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
|
||||
index 8c15593c0ca4..5dc1607b3ecf 100644
|
||||
--- a/arch/arm64/boot/dts/rockchip/Makefile
|
||||
+++ b/arch/arm64/boot/dts/rockchip/Makefile
|
||||
@@ -71,4 +71,5 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-roc-pc.dtb
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-soquartz-cm4.dtb
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-bpi-r2-pro.dtb
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-evb1-v10.dtb
|
||||
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-odroid-m1.dtb
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-rock-3a.dtb
|
||||
diff --git a/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts b/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
|
||||
new file mode 100644
|
||||
index 000000000000..b3016437640b
|
||||
--- /dev/null
|
||||
+++ b/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
|
||||
@@ -0,0 +1,414 @@
|
||||
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
+/*
|
||||
+ * Copyright (c) 2022 Hardkernel Co., Ltd.
|
||||
+ *
|
||||
+ */
|
||||
+
|
||||
+/dts-v1/;
|
||||
+#include <dt-bindings/gpio/gpio.h>
|
||||
+#include <dt-bindings/leds/common.h>
|
||||
+#include <dt-bindings/pinctrl/rockchip.h>
|
||||
+#include "rk3568.dtsi"
|
||||
+
|
||||
+/ {
|
||||
+ model = "Hardkernel ODROID-M1";
|
||||
+ compatible = "rockchip,rk3568-odroid-m1", "rockchip,rk3568";
|
||||
+
|
||||
+ aliases {
|
||||
+ ethernet0 = &gmac0;
|
||||
+ i2c0 = &i2c3;
|
||||
+ i2c3 = &i2c0;
|
||||
+ mmc0 = &sdhci;
|
||||
+ mmc1 = &sdmmc0;
|
||||
+ serial0 = &uart1;
|
||||
+ serial1 = &uart0;
|
||||
+ };
|
||||
+
|
||||
+ chosen {
|
||||
+ stdout-path = "serial2:1500000n8";
|
||||
+ };
|
||||
+
|
||||
+ dc_12v: dc-12v-regulator {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "dc_12v";
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <12000000>;
|
||||
+ regulator-max-microvolt = <12000000>;
|
||||
+ };
|
||||
+
|
||||
+ leds {
|
||||
+ compatible = "gpio-leds";
|
||||
+
|
||||
+ led_power: led-0 {
|
||||
+ gpios = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>;
|
||||
+ function = LED_FUNCTION_POWER;
|
||||
+ color = <LED_COLOR_ID_RED>;
|
||||
+ default-state = "keep";
|
||||
+ linux,default-trigger = "default-on";
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&led_power_pin>;
|
||||
+ };
|
||||
+ led_work: led-1 {
|
||||
+ gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
|
||||
+ function = LED_FUNCTION_HEARTBEAT;
|
||||
+ color = <LED_COLOR_ID_BLUE>;
|
||||
+ linux,default-trigger = "heartbeat";
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&led_work_pin>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vcc3v3_sys: vcc3v3-sys-regulator {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "vcc3v3_sys";
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <3300000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+ vin-supply = <&dc_12v>;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&cpu0 {
|
||||
+ cpu-supply = <&vdd_cpu>;
|
||||
+};
|
||||
+
|
||||
+&cpu1 {
|
||||
+ cpu-supply = <&vdd_cpu>;
|
||||
+};
|
||||
+
|
||||
+&cpu2 {
|
||||
+ cpu-supply = <&vdd_cpu>;
|
||||
+};
|
||||
+
|
||||
+&cpu3 {
|
||||
+ cpu-supply = <&vdd_cpu>;
|
||||
+};
|
||||
+
|
||||
+&gmac0 {
|
||||
+ assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>;
|
||||
+ assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>;
|
||||
+ assigned-clock-rates = <0>, <125000000>;
|
||||
+ clock_in_out = "output";
|
||||
+ phy-handle = <&rgmii_phy0>;
|
||||
+ phy-mode = "rgmii";
|
||||
+ phy-supply = <&vcc3v3_sys>;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&gmac0_miim
|
||||
+ &gmac0_tx_bus2
|
||||
+ &gmac0_rx_bus2
|
||||
+ &gmac0_rgmii_clk
|
||||
+ &gmac0_rgmii_bus>;
|
||||
+ status = "okay";
|
||||
+
|
||||
+ tx_delay = <0x4f>;
|
||||
+ rx_delay = <0x2d>;
|
||||
+};
|
||||
+
|
||||
+&i2c0 {
|
||||
+ status = "okay";
|
||||
+
|
||||
+ vdd_cpu: regulator@1c {
|
||||
+ compatible = "tcs,tcs4525";
|
||||
+ reg = <0x1c>;
|
||||
+ fcs,suspend-voltage-selector = <1>;
|
||||
+ regulator-name = "vdd_cpu";
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <800000>;
|
||||
+ regulator-max-microvolt = <1150000>;
|
||||
+ regulator-ramp-delay = <2300>;
|
||||
+ vin-supply = <&vcc3v3_sys>;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ rk809: pmic@20 {
|
||||
+ compatible = "rockchip,rk809";
|
||||
+ reg = <0x20>;
|
||||
+ interrupt-parent = <&gpio0>;
|
||||
+ interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>;
|
||||
+ #clock-cells = <1>;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pmic_int_l>;
|
||||
+ rockchip,system-power-controller;
|
||||
+ vcc1-supply = <&vcc3v3_sys>;
|
||||
+ vcc2-supply = <&vcc3v3_sys>;
|
||||
+ vcc3-supply = <&vcc3v3_sys>;
|
||||
+ vcc4-supply = <&vcc3v3_sys>;
|
||||
+ vcc5-supply = <&vcc3v3_sys>;
|
||||
+ vcc6-supply = <&vcc3v3_sys>;
|
||||
+ vcc7-supply = <&vcc3v3_sys>;
|
||||
+ vcc8-supply = <&vcc3v3_sys>;
|
||||
+ vcc9-supply = <&vcc3v3_sys>;
|
||||
+ wakeup-source;
|
||||
+
|
||||
+ regulators {
|
||||
+ vdd_logic: DCDC_REG1 {
|
||||
+ regulator-name = "vdd_logic";
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-init-microvolt = <900000>;
|
||||
+ regulator-initial-mode = <0x2>;
|
||||
+ regulator-min-microvolt = <500000>;
|
||||
+ regulator-max-microvolt = <1350000>;
|
||||
+ regulator-ramp-delay = <6001>;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vdd_gpu: DCDC_REG2 {
|
||||
+ regulator-name = "vdd_gpu";
|
||||
+ regulator-always-on;
|
||||
+ regulator-init-microvolt = <900000>;
|
||||
+ regulator-initial-mode = <0x2>;
|
||||
+ regulator-min-microvolt = <500000>;
|
||||
+ regulator-max-microvolt = <1350000>;
|
||||
+ regulator-ramp-delay = <6001>;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vcc_ddr: DCDC_REG3 {
|
||||
+ regulator-name = "vcc_ddr";
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-initial-mode = <0x2>;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-on-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vdd_npu: DCDC_REG4 {
|
||||
+ regulator-name = "vdd_npu";
|
||||
+ regulator-init-microvolt = <900000>;
|
||||
+ regulator-initial-mode = <0x2>;
|
||||
+ regulator-min-microvolt = <500000>;
|
||||
+ regulator-max-microvolt = <1350000>;
|
||||
+ regulator-ramp-delay = <6001>;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vcc_1v8: DCDC_REG5 {
|
||||
+ regulator-name = "vcc_1v8";
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vdda0v9_image: LDO_REG1 {
|
||||
+ regulator-name = "vdda0v9_image";
|
||||
+ regulator-always-on;
|
||||
+ regulator-min-microvolt = <900000>;
|
||||
+ regulator-max-microvolt = <900000>;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vdda_0v9: LDO_REG2 {
|
||||
+ regulator-name = "vdda_0v9";
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <900000>;
|
||||
+ regulator-max-microvolt = <900000>;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vdda0v9_pmu: LDO_REG3 {
|
||||
+ regulator-name = "vdda0v9_pmu";
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <900000>;
|
||||
+ regulator-max-microvolt = <900000>;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-on-in-suspend;
|
||||
+ regulator-suspend-microvolt = <900000>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vccio_acodec: LDO_REG4 {
|
||||
+ regulator-name = "vccio_acodec";
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <3300000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vccio_sd: LDO_REG5 {
|
||||
+ regulator-name = "vccio_sd";
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vcc3v3_pmu: LDO_REG6 {
|
||||
+ regulator-name = "vcc3v3_pmu";
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <3300000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-on-in-suspend;
|
||||
+ regulator-suspend-microvolt = <3300000>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vcca_1v8: LDO_REG7 {
|
||||
+ regulator-name = "vcca_1v8";
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vcca1v8_pmu: LDO_REG8 {
|
||||
+ regulator-name = "vcca1v8_pmu";
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-on-in-suspend;
|
||||
+ regulator-suspend-microvolt = <1800000>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vcca1v8_image: LDO_REG9 {
|
||||
+ regulator-name = "vcca1v8_image";
|
||||
+ regulator-always-on;
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vcc_3v3: SWITCH_REG1 {
|
||||
+ regulator-name = "vcc_3v3";
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vcc3v3_sd: SWITCH_REG2 {
|
||||
+ regulator-name = "vcc3v3_sd";
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&mdio0 {
|
||||
+ rgmii_phy0: ethernet-phy@0 {
|
||||
+ compatible = "ethernet-phy-ieee802.3-c22";
|
||||
+ reg = <0x0>;
|
||||
+ reset-assert-us = <20000>;
|
||||
+ reset-deassert-us = <100000>;
|
||||
+ reset-gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&pinctrl {
|
||||
+ leds {
|
||||
+ led_power_pin: led-power-pin {
|
||||
+ rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+ };
|
||||
+ led_work_pin: led-work-pin {
|
||||
+ rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ pmic {
|
||||
+ pmic_int_l: pmic-int-l {
|
||||
+ rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&pmu_io_domains {
|
||||
+ pmuio1-supply = <&vcc3v3_pmu>;
|
||||
+ pmuio2-supply = <&vcc3v3_pmu>;
|
||||
+ vccio1-supply = <&vccio_acodec>;
|
||||
+ vccio2-supply = <&vcc_1v8>;
|
||||
+ vccio3-supply = <&vccio_sd>;
|
||||
+ vccio4-supply = <&vcc_1v8>;
|
||||
+ vccio5-supply = <&vcc_3v3>;
|
||||
+ vccio6-supply = <&vcc_3v3>;
|
||||
+ vccio7-supply = <&vcc_3v3>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&saradc {
|
||||
+ vref-supply = <&vcca_1v8>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&sdhci {
|
||||
+ bus-width = <8>;
|
||||
+ max-frequency = <200000000>;
|
||||
+ non-removable;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe &emmc_rstnout>;
|
||||
+ vmmc-supply = <&vcc_3v3>;
|
||||
+ vqmmc-supply = <&vcc_1v8>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&sdmmc0 {
|
||||
+ bus-width = <4>;
|
||||
+ cap-sd-highspeed;
|
||||
+ cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
|
||||
+ disable-wp;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>;
|
||||
+ sd-uhs-sdr50;
|
||||
+ vmmc-supply = <&vcc3v3_sd>;
|
||||
+ vqmmc-supply = <&vccio_sd>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&uart2 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
--
|
||||
2.39.2
|
||||
|
||||
@@ -0,0 +1,38 @@
|
||||
From 24048c1753916bd983746542b16d19d2b399eeb7 Mon Sep 17 00:00:00 2001
|
||||
Message-Id: <24048c1753916bd983746542b16d19d2b399eeb7.1678107917.git.stefan@agner.ch>
|
||||
In-Reply-To: <d388735d551e09b00317a509859fca51776b9826.1678107917.git.stefan@agner.ch>
|
||||
References: <d388735d551e09b00317a509859fca51776b9826.1678107917.git.stefan@agner.ch>
|
||||
From: Aurelien Jarno <aurelien@aurel32.net>
|
||||
Date: Fri, 30 Sep 2022 07:12:36 +0200
|
||||
Subject: [PATCH] arm64: dts: rockchip: add thermal support to ODROID-M1
|
||||
|
||||
Add the thermal nodes for the ODROID-M1.
|
||||
|
||||
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
|
||||
Tested-by: Dan Johansen <strit@manjaro.org>
|
||||
Link: https://lore.kernel.org/r/20220930051246.391614-4-aurelien@aurel32.net
|
||||
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
|
||||
---
|
||||
arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts | 6 ++++++
|
||||
1 file changed, 6 insertions(+)
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts b/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
|
||||
index b3016437640b..112c65af3f55 100644
|
||||
--- a/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
|
||||
+++ b/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
|
||||
@@ -409,6 +409,12 @@ &sdmmc0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
+&tsadc {
|
||||
+ rockchip,hw-tshut-mode = <1>;
|
||||
+ rockchip,hw-tshut-polarity = <0>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
&uart2 {
|
||||
status = "okay";
|
||||
};
|
||||
--
|
||||
2.39.2
|
||||
|
||||
@@ -0,0 +1,103 @@
|
||||
From 982bb2beab8e38a7c0a365770be2ad9c5221a650 Mon Sep 17 00:00:00 2001
|
||||
Message-Id: <982bb2beab8e38a7c0a365770be2ad9c5221a650.1678107917.git.stefan@agner.ch>
|
||||
In-Reply-To: <d388735d551e09b00317a509859fca51776b9826.1678107917.git.stefan@agner.ch>
|
||||
References: <d388735d551e09b00317a509859fca51776b9826.1678107917.git.stefan@agner.ch>
|
||||
From: Aurelien Jarno <aurelien@aurel32.net>
|
||||
Date: Fri, 30 Sep 2022 07:12:37 +0200
|
||||
Subject: [PATCH] arm64: dts: rockchip: Add NOR flash to ODROID-M1
|
||||
|
||||
Enable the Rockchip Serial Flash Controller for the ODROID-M1 and add
|
||||
the corresponding SPI NOR flash entry. The SFC is used in dual I/O mode
|
||||
and not quad I/O mode, as the FSPI_D2 pin is shared with the EMMC_RSTn
|
||||
pin.
|
||||
|
||||
The partitions addresses and sizes are taken from the ODROID-M1
|
||||
Partition Table page on the ODROID wiki.
|
||||
|
||||
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
|
||||
Tested-by: Dan Johansen <strit@manjaro.org>
|
||||
Link: https://lore.kernel.org/r/20220930051246.391614-5-aurelien@aurel32.net
|
||||
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
|
||||
---
|
||||
.../boot/dts/rockchip/rk3568-odroid-m1.dts | 58 +++++++++++++++++++
|
||||
1 file changed, 58 insertions(+)
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts b/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
|
||||
index 112c65af3f55..94e839c9afab 100644
|
||||
--- a/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
|
||||
+++ b/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
|
||||
@@ -351,6 +351,20 @@ rgmii_phy0: ethernet-phy@0 {
|
||||
};
|
||||
|
||||
&pinctrl {
|
||||
+ fspi {
|
||||
+ fspi_dual_io_pins: fspi-dual-io-pins {
|
||||
+ rockchip,pins =
|
||||
+ /* fspi_clk */
|
||||
+ <1 RK_PD0 1 &pcfg_pull_none>,
|
||||
+ /* fspi_cs0n */
|
||||
+ <1 RK_PD3 1 &pcfg_pull_none>,
|
||||
+ /* fspi_d0 */
|
||||
+ <1 RK_PD1 1 &pcfg_pull_none>,
|
||||
+ /* fspi_d1 */
|
||||
+ <1 RK_PD2 1 &pcfg_pull_none>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
leds {
|
||||
led_power_pin: led-power-pin {
|
||||
rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
@@ -409,6 +423,50 @@ &sdmmc0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
+&sfc {
|
||||
+ /* Dual I/O mode as the D2 pin conflicts with the eMMC */
|
||||
+ pinctrl-0 = <&fspi_dual_io_pins>;
|
||||
+ pinctrl-names = "default";
|
||||
+ #address-cells = <1>;
|
||||
+ #size-cells = <0>;
|
||||
+ status = "okay";
|
||||
+
|
||||
+ flash@0 {
|
||||
+ compatible = "jedec,spi-nor";
|
||||
+ reg = <0>;
|
||||
+ spi-max-frequency = <100000000>;
|
||||
+ spi-rx-bus-width = <2>;
|
||||
+ spi-tx-bus-width = <1>;
|
||||
+
|
||||
+ partitions {
|
||||
+ compatible = "fixed-partitions";
|
||||
+ #address-cells = <1>;
|
||||
+ #size-cells = <1>;
|
||||
+
|
||||
+ partition@0 {
|
||||
+ label = "SPL";
|
||||
+ reg = <0x0 0xe0000>;
|
||||
+ };
|
||||
+ partition@e0000 {
|
||||
+ label = "U-Boot Env";
|
||||
+ reg = <0xe0000 0x20000>;
|
||||
+ };
|
||||
+ partition@100000 {
|
||||
+ label = "U-Boot";
|
||||
+ reg = <0x100000 0x200000>;
|
||||
+ };
|
||||
+ partition@300000 {
|
||||
+ label = "splash";
|
||||
+ reg = <0x300000 0x100000>;
|
||||
+ };
|
||||
+ partition@400000 {
|
||||
+ label = "Filesystem";
|
||||
+ reg = <0x400000 0xc00000>;
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
&tsadc {
|
||||
rockchip,hw-tshut-mode = <1>;
|
||||
rockchip,hw-tshut-polarity = <0>;
|
||||
--
|
||||
2.39.2
|
||||
|
||||
@@ -0,0 +1,102 @@
|
||||
From ae25f92a09abb7dd16a9ad3b74e0c105b385f214 Mon Sep 17 00:00:00 2001
|
||||
Message-Id: <ae25f92a09abb7dd16a9ad3b74e0c105b385f214.1678107917.git.stefan@agner.ch>
|
||||
In-Reply-To: <d388735d551e09b00317a509859fca51776b9826.1678107917.git.stefan@agner.ch>
|
||||
References: <d388735d551e09b00317a509859fca51776b9826.1678107917.git.stefan@agner.ch>
|
||||
From: Aurelien Jarno <aurelien@aurel32.net>
|
||||
Date: Fri, 30 Sep 2022 07:12:38 +0200
|
||||
Subject: [PATCH] arm64: dts: rockchip: Add analog audio on ODROID-M1
|
||||
|
||||
On the ODROID-M1, the I2S1 TDM controller is connected to the rk809
|
||||
codec in I2S mode. It is used to provide a stereo headphones output and
|
||||
a mono speaker output. A GPIO with an external pullup is used as an
|
||||
headphone detection input.
|
||||
|
||||
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
|
||||
Tested-by: Dan Johansen <strit@manjaro.org>
|
||||
Link: https://lore.kernel.org/r/20220930051246.391614-6-aurelien@aurel32.net
|
||||
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
|
||||
---
|
||||
.../boot/dts/rockchip/rk3568-odroid-m1.dts | 43 ++++++++++++++++++-
|
||||
1 file changed, 42 insertions(+), 1 deletion(-)
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts b/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
|
||||
index 94e839c9afab..634c1bd80b4e 100644
|
||||
--- a/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
|
||||
+++ b/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
|
||||
@@ -59,6 +59,31 @@ led_work: led-1 {
|
||||
};
|
||||
};
|
||||
|
||||
+ rk809-sound {
|
||||
+ compatible = "simple-audio-card";
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&hp_det_pin>;
|
||||
+ simple-audio-card,name = "Analog RK817";
|
||||
+ simple-audio-card,format = "i2s";
|
||||
+ simple-audio-card,hp-det-gpio = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>;
|
||||
+ simple-audio-card,mclk-fs = <256>;
|
||||
+ simple-audio-card,widgets =
|
||||
+ "Headphone", "Headphones",
|
||||
+ "Speaker", "Speaker";
|
||||
+ simple-audio-card,routing =
|
||||
+ "Headphones", "HPOL",
|
||||
+ "Headphones", "HPOR",
|
||||
+ "Speaker", "SPKO";
|
||||
+
|
||||
+ simple-audio-card,cpu {
|
||||
+ sound-dai = <&i2s1_8ch>;
|
||||
+ };
|
||||
+
|
||||
+ simple-audio-card,codec {
|
||||
+ sound-dai = <&rk809>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
vcc3v3_sys: vcc3v3-sys-regulator {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vcc3v3_sys";
|
||||
@@ -131,10 +156,15 @@ rk809: pmic@20 {
|
||||
reg = <0x20>;
|
||||
interrupt-parent = <&gpio0>;
|
||||
interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>;
|
||||
+ assigned-clocks = <&cru I2S1_MCLKOUT_TX>;
|
||||
+ assigned-clock-parents = <&cru CLK_I2S1_8CH_TX>;
|
||||
#clock-cells = <1>;
|
||||
+ clock-names = "mclk";
|
||||
+ clocks = <&cru I2S1_MCLKOUT_TX>;
|
||||
pinctrl-names = "default";
|
||||
- pinctrl-0 = <&pmic_int_l>;
|
||||
+ pinctrl-0 = <&pmic_int_l>, <&i2s1m0_mclk>;
|
||||
rockchip,system-power-controller;
|
||||
+ #sound-dai-cells = <0>;
|
||||
vcc1-supply = <&vcc3v3_sys>;
|
||||
vcc2-supply = <&vcc3v3_sys>;
|
||||
vcc3-supply = <&vcc3v3_sys>;
|
||||
@@ -340,6 +370,11 @@ regulator-state-mem {
|
||||
};
|
||||
};
|
||||
|
||||
+&i2s1_8ch {
|
||||
+ rockchip,trcm-sync-tx-only;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
&mdio0 {
|
||||
rgmii_phy0: ethernet-phy@0 {
|
||||
compatible = "ethernet-phy-ieee802.3-c22";
|
||||
@@ -379,6 +414,12 @@ pmic_int_l: pmic-int-l {
|
||||
rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
|
||||
};
|
||||
};
|
||||
+
|
||||
+ rk809 {
|
||||
+ hp_det_pin: hp-det-pin {
|
||||
+ rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+ };
|
||||
+ };
|
||||
};
|
||||
|
||||
&pmu_io_domains {
|
||||
--
|
||||
2.39.2
|
||||
|
||||
@@ -0,0 +1,97 @@
|
||||
From 3a1be3d8719ef6335385d4e5e456371e7bf7383f Mon Sep 17 00:00:00 2001
|
||||
Message-Id: <3a1be3d8719ef6335385d4e5e456371e7bf7383f.1678107917.git.stefan@agner.ch>
|
||||
In-Reply-To: <d388735d551e09b00317a509859fca51776b9826.1678107917.git.stefan@agner.ch>
|
||||
References: <d388735d551e09b00317a509859fca51776b9826.1678107917.git.stefan@agner.ch>
|
||||
From: Aurelien Jarno <aurelien@aurel32.net>
|
||||
Date: Fri, 30 Sep 2022 07:12:39 +0200
|
||||
Subject: [PATCH] arm64: dts: rockchip: Enable vop2 and hdmi tx on ODROID-M1
|
||||
|
||||
Enable the RK356x Video Output Processor (VOP) 2 on ODROID M1.
|
||||
|
||||
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
|
||||
Tested-by: Dan Johansen <strit@manjaro.org>
|
||||
Link: https://lore.kernel.org/r/20220930051246.391614-7-aurelien@aurel32.net
|
||||
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
|
||||
---
|
||||
.../boot/dts/rockchip/rk3568-odroid-m1.dts | 47 +++++++++++++++++++
|
||||
1 file changed, 47 insertions(+)
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts b/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
|
||||
index 634c1bd80b4e..126b893048fe 100644
|
||||
--- a/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
|
||||
+++ b/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
|
||||
@@ -8,6 +8,7 @@
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/leds/common.h>
|
||||
#include <dt-bindings/pinctrl/rockchip.h>
|
||||
+#include <dt-bindings/soc/rockchip,vop2.h>
|
||||
#include "rk3568.dtsi"
|
||||
|
||||
/ {
|
||||
@@ -37,6 +38,17 @@ dc_12v: dc-12v-regulator {
|
||||
regulator-max-microvolt = <12000000>;
|
||||
};
|
||||
|
||||
+ hdmi-con {
|
||||
+ compatible = "hdmi-connector";
|
||||
+ type = "a";
|
||||
+
|
||||
+ port {
|
||||
+ hdmi_con_in: endpoint {
|
||||
+ remote-endpoint = <&hdmi_out_con>;
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
|
||||
@@ -131,6 +143,24 @@ &gmac0_rgmii_clk
|
||||
rx_delay = <0x2d>;
|
||||
};
|
||||
|
||||
+&hdmi {
|
||||
+ avdd-0v9-supply = <&vdda0v9_image>;
|
||||
+ avdd-1v8-supply = <&vcca1v8_image>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&hdmi_in {
|
||||
+ hdmi_in_vp0: endpoint {
|
||||
+ remote-endpoint = <&vp0_out_hdmi>;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&hdmi_out {
|
||||
+ hdmi_out_con: endpoint {
|
||||
+ remote-endpoint = <&hdmi_con_in>;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
&i2c0 {
|
||||
status = "okay";
|
||||
|
||||
@@ -517,3 +547,20 @@ &tsadc {
|
||||
&uart2 {
|
||||
status = "okay";
|
||||
};
|
||||
+
|
||||
+&vop {
|
||||
+ assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
|
||||
+ assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&vop_mmu {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&vp0 {
|
||||
+ vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
|
||||
+ reg = <ROCKCHIP_VOP2_EP_HDMI0>;
|
||||
+ remote-endpoint = <&hdmi_in_vp0>;
|
||||
+ };
|
||||
+};
|
||||
--
|
||||
2.39.2
|
||||
|
||||
@@ -0,0 +1,48 @@
|
||||
From ded87dc761951205b8b9ba8ee4081e28a850a3db Mon Sep 17 00:00:00 2001
|
||||
Message-Id: <ded87dc761951205b8b9ba8ee4081e28a850a3db.1678107917.git.stefan@agner.ch>
|
||||
In-Reply-To: <d388735d551e09b00317a509859fca51776b9826.1678107917.git.stefan@agner.ch>
|
||||
References: <d388735d551e09b00317a509859fca51776b9826.1678107917.git.stefan@agner.ch>
|
||||
From: Aurelien Jarno <aurelien@aurel32.net>
|
||||
Date: Fri, 30 Sep 2022 07:12:40 +0200
|
||||
Subject: [PATCH] arm64: dts: rockchip: Enable HDMI audio on ODROID-M1.
|
||||
|
||||
This enables the i2s0 controller and the hdmi-sound node on the
|
||||
ODROID-M1.
|
||||
|
||||
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
|
||||
Tested-by: Dan Johansen <strit@manjaro.org>
|
||||
Link: https://lore.kernel.org/r/20220930051246.391614-8-aurelien@aurel32.net
|
||||
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
|
||||
---
|
||||
arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts | 8 ++++++++
|
||||
1 file changed, 8 insertions(+)
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts b/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
|
||||
index 126b893048fe..ac4e94d18feb 100644
|
||||
--- a/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
|
||||
+++ b/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
|
||||
@@ -161,6 +161,10 @@ hdmi_out_con: endpoint {
|
||||
};
|
||||
};
|
||||
|
||||
+&hdmi_sound {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
&i2c0 {
|
||||
status = "okay";
|
||||
|
||||
@@ -400,6 +404,10 @@ regulator-state-mem {
|
||||
};
|
||||
};
|
||||
|
||||
+&i2s0_8ch {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
&i2s1_8ch {
|
||||
rockchip,trcm-sync-tx-only;
|
||||
status = "okay";
|
||||
--
|
||||
2.39.2
|
||||
|
||||
@@ -0,0 +1,37 @@
|
||||
From 13438a717627cae086cc3a1126552cffa2f4bd16 Mon Sep 17 00:00:00 2001
|
||||
Message-Id: <13438a717627cae086cc3a1126552cffa2f4bd16.1678107917.git.stefan@agner.ch>
|
||||
In-Reply-To: <d388735d551e09b00317a509859fca51776b9826.1678107917.git.stefan@agner.ch>
|
||||
References: <d388735d551e09b00317a509859fca51776b9826.1678107917.git.stefan@agner.ch>
|
||||
From: Aurelien Jarno <aurelien@aurel32.net>
|
||||
Date: Fri, 30 Sep 2022 07:12:41 +0200
|
||||
Subject: [PATCH] arm64: dts: rockchip: Enable the GPU on ODROID-M1
|
||||
|
||||
Enable the GPU core on the Rockchip RK3568 ODROID-M1.
|
||||
|
||||
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
|
||||
Tested-by: Dan Johansen <strit@manjaro.org>
|
||||
Link: https://lore.kernel.org/r/20220930051246.391614-9-aurelien@aurel32.net
|
||||
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
|
||||
---
|
||||
arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts | 5 +++++
|
||||
1 file changed, 5 insertions(+)
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts b/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
|
||||
index ac4e94d18feb..e4b7699d3eea 100644
|
||||
--- a/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
|
||||
+++ b/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
|
||||
@@ -143,6 +143,11 @@ &gmac0_rgmii_clk
|
||||
rx_delay = <0x2d>;
|
||||
};
|
||||
|
||||
+&gpu {
|
||||
+ mali-supply = <&vdd_gpu>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
&hdmi {
|
||||
avdd-0v9-supply = <&vdda0v9_image>;
|
||||
avdd-1v8-supply = <&vcca1v8_image>;
|
||||
--
|
||||
2.39.2
|
||||
|
||||
@@ -0,0 +1,111 @@
|
||||
From 0f0a85a289b4d0fbd5c39eb5ddbb681a37ad490c Mon Sep 17 00:00:00 2001
|
||||
Message-Id: <0f0a85a289b4d0fbd5c39eb5ddbb681a37ad490c.1678107917.git.stefan@agner.ch>
|
||||
In-Reply-To: <d388735d551e09b00317a509859fca51776b9826.1678107917.git.stefan@agner.ch>
|
||||
References: <d388735d551e09b00317a509859fca51776b9826.1678107917.git.stefan@agner.ch>
|
||||
From: Aurelien Jarno <aurelien@aurel32.net>
|
||||
Date: Fri, 30 Sep 2022 07:12:42 +0200
|
||||
Subject: [PATCH] arm64: dts: rockchip: Enable the USB 2.0 ports on ODROID-M1
|
||||
|
||||
The Rockchip RK3568 has two USB OHCI/EHCI controllers connected to a PHY
|
||||
providing one host-only port and one OTG port. On the ODROID-M1, they
|
||||
are both used in host mode. The USB ports are powered by a DC/DC
|
||||
converter providing 5V and named VCC5V0_SYS on the schematics, followed
|
||||
by a power switch.
|
||||
|
||||
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
|
||||
Tested-by: Dan Johansen <strit@manjaro.org>
|
||||
Link: https://lore.kernel.org/r/20220930051246.391614-10-aurelien@aurel32.net
|
||||
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
|
||||
---
|
||||
.../boot/dts/rockchip/rk3568-odroid-m1.dts | 61 +++++++++++++++++++
|
||||
1 file changed, 61 insertions(+)
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts b/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
|
||||
index e4b7699d3eea..2e4cc20bd676 100644
|
||||
--- a/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
|
||||
+++ b/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
|
||||
@@ -105,6 +105,28 @@ vcc3v3_sys: vcc3v3-sys-regulator {
|
||||
regulator-max-microvolt = <3300000>;
|
||||
vin-supply = <&dc_12v>;
|
||||
};
|
||||
+
|
||||
+ vcc5v0_sys: vcc5v0-sys-regulator {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "vcc5v0_sys";
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <5000000>;
|
||||
+ regulator-max-microvolt = <5000000>;
|
||||
+ vin-supply = <&dc_12v>;
|
||||
+ };
|
||||
+
|
||||
+ vcc5v0_usb_host: vcc5v0-usb-host-regulator {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "vcc5v0_usb_host";
|
||||
+ enable-active-high;
|
||||
+ gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&vcc5v0_usb_host_en_pin>;
|
||||
+ regulator-min-microvolt = <5000000>;
|
||||
+ regulator-max-microvolt = <5000000>;
|
||||
+ vin-supply = <&vcc5v0_sys>;
|
||||
+ };
|
||||
};
|
||||
|
||||
&cpu0 {
|
||||
@@ -463,6 +485,15 @@ hp_det_pin: hp-det-pin {
|
||||
rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
+
|
||||
+ usb {
|
||||
+ vcc5v0_usb_host_en_pin: vcc5v0-usb-host-en-pin {
|
||||
+ rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+ };
|
||||
+ vcc5v0_usb_otg_en_pin: vcc5v0-usb-otg-en-pin {
|
||||
+ rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+ };
|
||||
+ };
|
||||
};
|
||||
|
||||
&pmu_io_domains {
|
||||
@@ -561,6 +592,36 @@ &uart2 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
+&usb_host0_ehci {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usb_host0_ohci {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usb_host1_ehci {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usb_host1_ohci {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usb2phy1 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usb2phy1_host {
|
||||
+ phy-supply = <&vcc5v0_usb_host>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usb2phy1_otg {
|
||||
+ phy-supply = <&vcc5v0_usb_host>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
&vop {
|
||||
assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
|
||||
assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
|
||||
--
|
||||
2.39.2
|
||||
|
||||
@@ -0,0 +1,114 @@
|
||||
From d8abc451c669a8fd36b31db5cb96ec49da819124 Mon Sep 17 00:00:00 2001
|
||||
Message-Id: <d8abc451c669a8fd36b31db5cb96ec49da819124.1678107917.git.stefan@agner.ch>
|
||||
In-Reply-To: <d388735d551e09b00317a509859fca51776b9826.1678107917.git.stefan@agner.ch>
|
||||
References: <d388735d551e09b00317a509859fca51776b9826.1678107917.git.stefan@agner.ch>
|
||||
From: Aurelien Jarno <aurelien@aurel32.net>
|
||||
Date: Fri, 30 Sep 2022 07:12:43 +0200
|
||||
Subject: [PATCH] arm64: dts: rockchip: Enable the USB 3.0 ports on ODROID-M1
|
||||
|
||||
The Rockchip RK3568 has two USB XHCI controllers. The USB 2.0 signals
|
||||
are connected to a PHY providing one host-only port and one OTG port.
|
||||
The USB 3.0 signals are connected to two USB3.0/PCIE/SATA combo PHY.
|
||||
|
||||
The ODROID M1 has 2 type A USB 3.0 connectors, with the USB 3.0 signals
|
||||
connected to the two combo PHYs. For the USB 2.0 signals, one connector
|
||||
is connected to the host-only PHY and uses the same power switch as the
|
||||
USB 2.0 ports. The other connector has its own power switch and is
|
||||
connected to the OTG PHY, which is also connected to a device only
|
||||
micro-USB connector. The purpose of this micro-USB connector is for
|
||||
firmware update using the Rockusb vendor specific USB class. Therefore
|
||||
it does not make sense to enable this port on Linux, and the PHY is
|
||||
forced to host mode.
|
||||
|
||||
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
|
||||
Tested-by: Dan Johansen <strit@manjaro.org>
|
||||
Link: https://lore.kernel.org/r/20220930051246.391614-11-aurelien@aurel32.net
|
||||
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
|
||||
---
|
||||
.../boot/dts/rockchip/rk3568-odroid-m1.dts | 49 ++++++++++++++++++-
|
||||
1 file changed, 48 insertions(+), 1 deletion(-)
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts b/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
|
||||
index 2e4cc20bd676..9a84a7e76d7a 100644
|
||||
--- a/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
|
||||
+++ b/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
|
||||
@@ -127,6 +127,30 @@ vcc5v0_usb_host: vcc5v0-usb-host-regulator {
|
||||
regulator-max-microvolt = <5000000>;
|
||||
vin-supply = <&vcc5v0_sys>;
|
||||
};
|
||||
+
|
||||
+ vcc5v0_usb_otg: vcc5v0-usb-otg-regulator {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "vcc5v0_usb_otg";
|
||||
+ enable-active-high;
|
||||
+ gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&vcc5v0_usb_otg_en_pin>;
|
||||
+ regulator-min-microvolt = <5000000>;
|
||||
+ regulator-max-microvolt = <5000000>;
|
||||
+ vin-supply = <&vcc5v0_sys>;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&combphy0 {
|
||||
+ /* Used for USB3 */
|
||||
+ phy-supply = <&vcc5v0_usb_host>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&combphy1 {
|
||||
+ /* Used for USB3 */
|
||||
+ phy-supply = <&vcc5v0_usb_otg>;
|
||||
+ status = "okay";
|
||||
};
|
||||
|
||||
&cpu0 {
|
||||
@@ -490,7 +514,7 @@ usb {
|
||||
vcc5v0_usb_host_en_pin: vcc5v0-usb-host-en-pin {
|
||||
rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
- vcc5v0_usb_otg_en_pin: vcc5v0-usb-otg-en-pin {
|
||||
+ vcc5v0_usb_otg_en_pin: vcc5v0-usb-dr-en-pin {
|
||||
rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
@@ -600,6 +624,11 @@ &usb_host0_ohci {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
+&usb_host0_xhci {
|
||||
+ dr_mode = "host";
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
&usb_host1_ehci {
|
||||
status = "okay";
|
||||
};
|
||||
@@ -608,6 +637,24 @@ &usb_host1_ohci {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
+&usb_host1_xhci {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usb2phy0 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usb2phy0_host {
|
||||
+ phy-supply = <&vcc5v0_usb_host>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usb2phy0_otg {
|
||||
+ phy-supply = <&vcc5v0_usb_otg>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
&usb2phy1 {
|
||||
status = "okay";
|
||||
};
|
||||
--
|
||||
2.39.2
|
||||
|
||||
@@ -0,0 +1,48 @@
|
||||
From 2f6d4521403932ca22cb4dabef9033f1d52232ba Mon Sep 17 00:00:00 2001
|
||||
Message-Id: <2f6d4521403932ca22cb4dabef9033f1d52232ba.1678107917.git.stefan@agner.ch>
|
||||
In-Reply-To: <d388735d551e09b00317a509859fca51776b9826.1678107917.git.stefan@agner.ch>
|
||||
References: <d388735d551e09b00317a509859fca51776b9826.1678107917.git.stefan@agner.ch>
|
||||
From: Aurelien Jarno <aurelien@aurel32.net>
|
||||
Date: Fri, 30 Sep 2022 07:12:44 +0200
|
||||
Subject: [PATCH] arm64: dts: rockchip: Add SATA support to ODROID-M1
|
||||
|
||||
Enable the Combo PHY and SATA nodes in ODROID-M1.
|
||||
|
||||
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
|
||||
Tested-by: Dan Johansen <strit@manjaro.org>
|
||||
Link: https://lore.kernel.org/r/20220930051246.391614-12-aurelien@aurel32.net
|
||||
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
|
||||
---
|
||||
arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts | 9 +++++++++
|
||||
1 file changed, 9 insertions(+)
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts b/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
|
||||
index 9a84a7e76d7a..bd24ccf94e76 100644
|
||||
--- a/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
|
||||
+++ b/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
|
||||
@@ -153,6 +153,11 @@ &combphy1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
+&combphy2 {
|
||||
+ /* used for SATA */
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
&cpu0 {
|
||||
cpu-supply = <&vdd_cpu>;
|
||||
};
|
||||
@@ -538,6 +543,10 @@ &saradc {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
+&sata2 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
&sdhci {
|
||||
bus-width = <8>;
|
||||
max-frequency = <200000000>;
|
||||
--
|
||||
2.39.2
|
||||
|
||||
@@ -0,0 +1,80 @@
|
||||
From 1572a9c5d9fa9f654fbc1909528ae5940ad34aa3 Mon Sep 17 00:00:00 2001
|
||||
Message-Id: <1572a9c5d9fa9f654fbc1909528ae5940ad34aa3.1678107917.git.stefan@agner.ch>
|
||||
In-Reply-To: <d388735d551e09b00317a509859fca51776b9826.1678107917.git.stefan@agner.ch>
|
||||
References: <d388735d551e09b00317a509859fca51776b9826.1678107917.git.stefan@agner.ch>
|
||||
From: Aurelien Jarno <aurelien@aurel32.net>
|
||||
Date: Fri, 30 Sep 2022 07:12:45 +0200
|
||||
Subject: [PATCH] arm64: dts: rockchip: Add PCIEe v3 nodes to ODROID-M1
|
||||
|
||||
Add nodes to ODROID-M1 to support PCIe v3 on the M2 slot.
|
||||
|
||||
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
|
||||
Tested-by: Dan Johansen <strit@manjaro.org>
|
||||
Link: https://lore.kernel.org/r/20220930051246.391614-13-aurelien@aurel32.net
|
||||
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
|
||||
---
|
||||
.../boot/dts/rockchip/rk3568-odroid-m1.dts | 34 +++++++++++++++++++
|
||||
1 file changed, 34 insertions(+)
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts b/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
|
||||
index bd24ccf94e76..2f685c606bb9 100644
|
||||
--- a/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
|
||||
+++ b/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
|
||||
@@ -96,6 +96,19 @@ simple-audio-card,codec {
|
||||
};
|
||||
};
|
||||
|
||||
+ vcc3v3_pcie: vcc3v3-pcie-regulator {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "vcc3v3_pcie";
|
||||
+ enable-active-high;
|
||||
+ gpio = <&gpio4 RK_PA7 GPIO_ACTIVE_HIGH>;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&vcc3v3_pcie_en_pin>;
|
||||
+ regulator-min-microvolt = <3300000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+ startup-delay-us = <5000>;
|
||||
+ vin-supply = <&vcc3v3_sys>;
|
||||
+ };
|
||||
+
|
||||
vcc3v3_sys: vcc3v3-sys-regulator {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vcc3v3_sys";
|
||||
@@ -479,6 +492,18 @@ rgmii_phy0: ethernet-phy@0 {
|
||||
};
|
||||
};
|
||||
|
||||
+&pcie30phy {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&pcie3x2 {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pcie_reset_pin>;
|
||||
+ reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
|
||||
+ vpcie3v3-supply = <&vcc3v3_pcie>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
&pinctrl {
|
||||
fspi {
|
||||
fspi_dual_io_pins: fspi-dual-io-pins {
|
||||
@@ -503,6 +528,15 @@ led_work_pin: led-work-pin {
|
||||
};
|
||||
};
|
||||
|
||||
+ pcie {
|
||||
+ pcie_reset_pin: pcie-reset-pin {
|
||||
+ rockchip,pins = <2 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+ };
|
||||
+ vcc3v3_pcie_en_pin: vcc3v3-pcie-en-pin {
|
||||
+ rockchip,pins = <4 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
pmic {
|
||||
pmic_int_l: pmic-int-l {
|
||||
rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
|
||||
--
|
||||
2.39.2
|
||||
|
||||
@@ -0,0 +1,54 @@
|
||||
From b2eae73eeb32dd9383571de6af18fc8bd39aac3a Mon Sep 17 00:00:00 2001
|
||||
Message-Id: <b2eae73eeb32dd9383571de6af18fc8bd39aac3a.1678107917.git.stefan@agner.ch>
|
||||
In-Reply-To: <d388735d551e09b00317a509859fca51776b9826.1678107917.git.stefan@agner.ch>
|
||||
References: <d388735d551e09b00317a509859fca51776b9826.1678107917.git.stefan@agner.ch>
|
||||
From: Aurelien Jarno <aurelien@aurel32.net>
|
||||
Date: Fri, 30 Sep 2022 07:12:46 +0200
|
||||
Subject: [PATCH] arm64: dts: rockchip: Add IR receiver node to ODROID-M1
|
||||
|
||||
Add the infrared receiver and its associated pinctrl entry. Note that
|
||||
there is an external pullup to VCC3V3_SYS.
|
||||
|
||||
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
|
||||
Tested-by: Dan Johansen <strit@manjaro.org>
|
||||
Link: https://lore.kernel.org/r/20220930051246.391614-14-aurelien@aurel32.net
|
||||
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
|
||||
---
|
||||
arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts | 14 ++++++++++++++
|
||||
1 file changed, 14 insertions(+)
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts b/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
|
||||
index 2f685c606bb9..59ecf868dbd0 100644
|
||||
--- a/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
|
||||
+++ b/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
|
||||
@@ -49,6 +49,13 @@ hdmi_con_in: endpoint {
|
||||
};
|
||||
};
|
||||
|
||||
+ ir-receiver {
|
||||
+ compatible = "gpio-ir-receiver";
|
||||
+ gpios = <&gpio0 RK_PC2 GPIO_ACTIVE_LOW>;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&ir_receiver_pin>;
|
||||
+ };
|
||||
+
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
|
||||
@@ -519,6 +526,13 @@ fspi_dual_io_pins: fspi-dual-io-pins {
|
||||
};
|
||||
};
|
||||
|
||||
+ ir-receiver {
|
||||
+ ir_receiver_pin: ir-receiver-pin {
|
||||
+ /* external pullup to VCC3V3_SYS */
|
||||
+ rockchip,pins = <0 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
leds {
|
||||
led_power_pin: led-power-pin {
|
||||
rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
--
|
||||
2.39.2
|
||||
|
||||
Reference in New Issue
Block a user