Files
operating-system/buildroot-external/board/hardkernel/odroid-m1/patches/linux/0008-arm64-dts-rockchip-Enable-the-USB-2.0-ports-on-ODROI.patch
Stefan Agner b0d9496595 Add ODROID-M1 support (#2387)
* Add ODROID-M1 board support

* Add Rockchip kernel config for ODROID-M1

Kernel defconfig for Rockchip is based on Armbian kernel defconfig
from config/kernel/linux-rk3568-odroid-edge.config (git hash
95c829f9e664).

* Add U-Boot/Kernel patches

* Add Rockchip blob support

Add package which provides Rockchip TPL and ATF firmware binaries.

* Use latest U-Boot for ODROID-M1

* Fix Rockchip blob support

* Update defconfig

* Use GPT by default

* Create uboot partition to support non-recovery boot

* Enable eMMC boot in U-Boot SPL

* Drop unnecessary mmc device selection

Distro boot already activates the right mmc device. The extra selection
seems to actually cause problems for eMMC boot.

* Make sure driver for eMMC is built-in

* Use odroid-m1 as Supervisor machine

* Add ODROID-M1 to CI pipeline and issue template

* Bump to Linux 6.1.16
2023-03-10 19:44:50 +01:00

112 lines
3.1 KiB
Diff

From 0f0a85a289b4d0fbd5c39eb5ddbb681a37ad490c Mon Sep 17 00:00:00 2001
Message-Id: <0f0a85a289b4d0fbd5c39eb5ddbb681a37ad490c.1678107917.git.stefan@agner.ch>
In-Reply-To: <d388735d551e09b00317a509859fca51776b9826.1678107917.git.stefan@agner.ch>
References: <d388735d551e09b00317a509859fca51776b9826.1678107917.git.stefan@agner.ch>
From: Aurelien Jarno <aurelien@aurel32.net>
Date: Fri, 30 Sep 2022 07:12:42 +0200
Subject: [PATCH] arm64: dts: rockchip: Enable the USB 2.0 ports on ODROID-M1
The Rockchip RK3568 has two USB OHCI/EHCI controllers connected to a PHY
providing one host-only port and one OTG port. On the ODROID-M1, they
are both used in host mode. The USB ports are powered by a DC/DC
converter providing 5V and named VCC5V0_SYS on the schematics, followed
by a power switch.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Tested-by: Dan Johansen <strit@manjaro.org>
Link: https://lore.kernel.org/r/20220930051246.391614-10-aurelien@aurel32.net
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
.../boot/dts/rockchip/rk3568-odroid-m1.dts | 61 +++++++++++++++++++
1 file changed, 61 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts b/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
index e4b7699d3eea..2e4cc20bd676 100644
--- a/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
@@ -105,6 +105,28 @@ vcc3v3_sys: vcc3v3-sys-regulator {
regulator-max-microvolt = <3300000>;
vin-supply = <&dc_12v>;
};
+
+ vcc5v0_sys: vcc5v0-sys-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc5v0_sys";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ vin-supply = <&dc_12v>;
+ };
+
+ vcc5v0_usb_host: vcc5v0-usb-host-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc5v0_usb_host";
+ enable-active-high;
+ gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&vcc5v0_usb_host_en_pin>;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ vin-supply = <&vcc5v0_sys>;
+ };
};
&cpu0 {
@@ -463,6 +485,15 @@ hp_det_pin: hp-det-pin {
rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
+
+ usb {
+ vcc5v0_usb_host_en_pin: vcc5v0-usb-host-en-pin {
+ rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ vcc5v0_usb_otg_en_pin: vcc5v0-usb-otg-en-pin {
+ rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
};
&pmu_io_domains {
@@ -561,6 +592,36 @@ &uart2 {
status = "okay";
};
+&usb_host0_ehci {
+ status = "okay";
+};
+
+&usb_host0_ohci {
+ status = "okay";
+};
+
+&usb_host1_ehci {
+ status = "okay";
+};
+
+&usb_host1_ohci {
+ status = "okay";
+};
+
+&usb2phy1 {
+ status = "okay";
+};
+
+&usb2phy1_host {
+ phy-supply = <&vcc5v0_usb_host>;
+ status = "okay";
+};
+
+&usb2phy1_otg {
+ phy-supply = <&vcc5v0_usb_host>;
+ status = "okay";
+};
+
&vop {
assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
--
2.39.2