b0d9496595
* Add ODROID-M1 board support * Add Rockchip kernel config for ODROID-M1 Kernel defconfig for Rockchip is based on Armbian kernel defconfig from config/kernel/linux-rk3568-odroid-edge.config (git hash 95c829f9e664). * Add U-Boot/Kernel patches * Add Rockchip blob support Add package which provides Rockchip TPL and ATF firmware binaries. * Use latest U-Boot for ODROID-M1 * Fix Rockchip blob support * Update defconfig * Use GPT by default * Create uboot partition to support non-recovery boot * Enable eMMC boot in U-Boot SPL * Drop unnecessary mmc device selection Distro boot already activates the right mmc device. The extra selection seems to actually cause problems for eMMC boot. * Make sure driver for eMMC is built-in * Use odroid-m1 as Supervisor machine * Add ODROID-M1 to CI pipeline and issue template * Bump to Linux 6.1.16
115 lines
3.4 KiB
Diff
115 lines
3.4 KiB
Diff
From d8abc451c669a8fd36b31db5cb96ec49da819124 Mon Sep 17 00:00:00 2001
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Message-Id: <d8abc451c669a8fd36b31db5cb96ec49da819124.1678107917.git.stefan@agner.ch>
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In-Reply-To: <d388735d551e09b00317a509859fca51776b9826.1678107917.git.stefan@agner.ch>
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References: <d388735d551e09b00317a509859fca51776b9826.1678107917.git.stefan@agner.ch>
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From: Aurelien Jarno <aurelien@aurel32.net>
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Date: Fri, 30 Sep 2022 07:12:43 +0200
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Subject: [PATCH] arm64: dts: rockchip: Enable the USB 3.0 ports on ODROID-M1
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The Rockchip RK3568 has two USB XHCI controllers. The USB 2.0 signals
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are connected to a PHY providing one host-only port and one OTG port.
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The USB 3.0 signals are connected to two USB3.0/PCIE/SATA combo PHY.
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The ODROID M1 has 2 type A USB 3.0 connectors, with the USB 3.0 signals
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connected to the two combo PHYs. For the USB 2.0 signals, one connector
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is connected to the host-only PHY and uses the same power switch as the
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USB 2.0 ports. The other connector has its own power switch and is
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connected to the OTG PHY, which is also connected to a device only
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micro-USB connector. The purpose of this micro-USB connector is for
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firmware update using the Rockusb vendor specific USB class. Therefore
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it does not make sense to enable this port on Linux, and the PHY is
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forced to host mode.
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Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
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Tested-by: Dan Johansen <strit@manjaro.org>
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Link: https://lore.kernel.org/r/20220930051246.391614-11-aurelien@aurel32.net
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Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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---
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.../boot/dts/rockchip/rk3568-odroid-m1.dts | 49 ++++++++++++++++++-
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1 file changed, 48 insertions(+), 1 deletion(-)
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diff --git a/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts b/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
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index 2e4cc20bd676..9a84a7e76d7a 100644
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--- a/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
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+++ b/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
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@@ -127,6 +127,30 @@ vcc5v0_usb_host: vcc5v0-usb-host-regulator {
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regulator-max-microvolt = <5000000>;
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vin-supply = <&vcc5v0_sys>;
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};
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+
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+ vcc5v0_usb_otg: vcc5v0-usb-otg-regulator {
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+ compatible = "regulator-fixed";
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+ regulator-name = "vcc5v0_usb_otg";
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+ enable-active-high;
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+ gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&vcc5v0_usb_otg_en_pin>;
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+ regulator-min-microvolt = <5000000>;
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+ regulator-max-microvolt = <5000000>;
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+ vin-supply = <&vcc5v0_sys>;
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+ };
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+};
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+
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+&combphy0 {
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+ /* Used for USB3 */
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+ phy-supply = <&vcc5v0_usb_host>;
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+ status = "okay";
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+};
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+
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+&combphy1 {
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+ /* Used for USB3 */
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+ phy-supply = <&vcc5v0_usb_otg>;
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+ status = "okay";
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};
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&cpu0 {
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@@ -490,7 +514,7 @@ usb {
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vcc5v0_usb_host_en_pin: vcc5v0-usb-host-en-pin {
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rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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- vcc5v0_usb_otg_en_pin: vcc5v0-usb-otg-en-pin {
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+ vcc5v0_usb_otg_en_pin: vcc5v0-usb-dr-en-pin {
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rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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@@ -600,6 +624,11 @@ &usb_host0_ohci {
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status = "okay";
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};
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+&usb_host0_xhci {
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+ dr_mode = "host";
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+ status = "okay";
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+};
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+
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&usb_host1_ehci {
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status = "okay";
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};
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@@ -608,6 +637,24 @@ &usb_host1_ohci {
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status = "okay";
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};
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+&usb_host1_xhci {
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+ status = "okay";
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+};
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+
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+&usb2phy0 {
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+ status = "okay";
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+};
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+
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+&usb2phy0_host {
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+ phy-supply = <&vcc5v0_usb_host>;
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+ status = "okay";
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+};
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+
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+&usb2phy0_otg {
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+ phy-supply = <&vcc5v0_usb_otg>;
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+ status = "okay";
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+};
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+
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&usb2phy1 {
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status = "okay";
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};
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--
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2.39.2
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