Merge pull request #980 from home-assistant/dev

Pre-Release 5.5

.gitignore

@@ -1,2 +1,3 @@
+.DS_Store
 /release
 *.pem

Dockerfile

@@ -38,6 +38,8 @@ RUN apt-get update && apt-get install -y --no-install-recommends \
         unzip \
         wget \
         qemu-utils \
+        openssh-client \
+        vim \
     && rm -rf /var/lib/apt/lists/*
 
 # Init entry

Documentation/boards/README.md

@@ -14,6 +14,7 @@ The following boards/devices are supported:
   - Pi (not recommended)
 - Hardkernel
   - Odroid-C2
+  - Odroid-C4 (_experimental_)
   - Odroid-N2
   - Odroid-XU4
 - Intel NUC
@@ -46,6 +47,7 @@ Notes:
 |Pi Zero     |`make rpi0_w`    |[rpi0_w](../../buildroot-external/configs/rpi0_w_defconfig)|[raspberrypi](./raspberrypi/)|
 |Pi          |`make rpi`       |[rpi](../../buildroot-external/configs/rpi_defconfig)|[raspberrypi](./raspberrypi/)|
 |Odroid-C2   |`make odroid_c2` |[odroid_c2](../../buildroot-external/configs/odroid_c2_defconfig)|[hardkernel](./hardkernel/)|
+|Odroid-C4   |`make odroid_c4` |[odroid_c4](../../buildroot-external/configs/odroid_c4_defconfig)|[hardkernel](./hardkernel/)|
 |Odroid-N2   |`make odroid_n2` |[odroid_n2](../../buildroot-external/configs/odroid_n2_defconfig)|[hardkernel](./hardkernel/)|
 |Odroid-XU4  |`make odroid_xu4`|[odroid_xu4](../../buildroot-external/configs/odroid_xu4_defconfig)|[hardkernel](./hardkernel/)|
 |NUC         |`make intel_nuc` |[intel_nuc](../../buildroot-external/configs/intel_nuc_defconfig)|[intel](./intel/)|

Documentation/boards/hardkernel/README.md

@@ -2,10 +2,11 @@
 
 ## Supported Hardware
 
-| Device         | Release Date  | Support | Config    |
-|----------------|---------------|---------|-----------|
-| ODROID-XU4     | 2015          | yes     | [odroid_xu4](../../../buildroot-external/configs/odroid_xu4_defconfig)|
-| ODROID-C2      | 2016          | yes     | [odroid_c2](../../../buildroot-external/configs/odroid_c2_defconfig) |
-| ODROID-N2      | 2019          | yes     | [odroid_n2](../../../buildroot-external/configs/odroid_n2_defconfig) |
+| Device         | Release Date  | Support      | Config    |
+|----------------|---------------|--------------|-----------|
+| ODROID-XU4     | 2015          | yes          | [odroid_xu4](../../../buildroot-external/configs/odroid_xu4_defconfig)|
+| ODROID-C2      | 2016          | yes          | [odroid_c2](../../../buildroot-external/configs/odroid_c2_defconfig) |
+| ODROID-C4      | 2020          | experimental | [odroid_c4](../../../buildroot-external/configs/odroid_c4_defconfig) |
+| ODROID-N2      | 2019          | yes          | [odroid_n2](../../../buildroot-external/configs/odroid_n2_defconfig) |
 
 See separate documentation for each board.

Documentation/boards/hardkernel/odroid-c4.md

@@ -0,0 +1,16 @@
+# Odroid-C4
+
+## Experimental
+
+Odroid-C4 support is based heavily on the Odroid-C2 and N2 configurations. Given the similarity of the SoCs, as well as the comparable level of support in the Linux kernel, the C4 should hopefully present few surprises. However, Home Assistant support should be regarded as experimental.
+
+Please also refer to the documentation pages for the [Odroid-C2](./odroid-c2.md) and [Odroid-N2](./odroid-n2.md), as some of that information may apply to the C4 as well.
+
+Common C4 issues that have been specifically tested and appear to be working:
+- boot from SD
+- boot from eMMC
+- MAC address obtained from eFuse
+
+## GPIO
+
+Refer to [the odroid wiki](https://wiki.odroid.com/odroid-c4/hardware/expansion_connectors).

Documentation/boards/raspberrypi/README.md

@@ -53,4 +53,4 @@ For more information see [RaspberryPi](https://www.raspberrypi.org/documentation
 
 If you don't need bluetooth, disabled it with add `dtoverlay=pi3-disable-bt` into `config.txt`.
 
-[config]: ../configuration.md#automatic
+[config]: ../../configuration.md#automatic

Documentation/development.md

@@ -36,6 +36,7 @@ Default 2. That is the size of end image in GB.
 
 - intel-nuc
 - odroid-c2
+- odroid-c4
 - odroid-n2
 - odroid-xu
 - qemuarm

Documentation/kernel.md

@@ -12,7 +12,8 @@ Default Kernel tree: 5.4
 | Raspberry Pi 3 | 4.19.127 |
 | Raspberry Pi 4 | 4.19.127 |
 | Tinker Board | 5.4.63 |
-| Odroid-C2 | 5.7.19 |
-| Odroid-N2 | 5.7.19 |
-| Odroid-XU4 | 5.7.19 |
+| Odroid-C2 | 5.9.6 |
+| Odroid-C4 | 5.9.6 |
+| Odroid-N2 | 5.9.6 |
+| Odroid-XU4 | 5.9.6 |
 | Intel NUC | 5.4.63 |

Documentation/network.md

@@ -10,6 +10,8 @@ Only a manual configuration using NetworkManager connection files is supported.
 
 You can read the [NetworkManager manual][nm-manual] or find many configuration examples across the internet. Keep in mind that the system is read-only. If you don't want the IP address to change on every boot, you should modify the UUID property to a generic [UUID4][uuid]. Inside the `\CONFIG\network\` directory on the USB drive or SD card, create a file called `my-network` and add the appropriate contents below:
 
+**NOTE: Please make sure to save this file with UNIX line endings (LF, and not Windows' default CRLF endings). You can do this using Notepad these days!**
+
 ### Default
 
 A preinstalled connection profile is provided by default:

Documentation/partition.md

@@ -1,8 +1,8 @@
 # Partition
 
-The partition layout is a bit different than for regular setups. We prefer GPT, if possible. With SoCs which don't support GPT, we use the hybrid GPT. For more details about this topic, please refer to the [development](development.md) documentation.
+The partition layout is a bit different than the typical setup. We prefer GPT, if possible. With SoCs which don't support GPT, we use a hybrid GPT. For more details about this topic, please refer to the [development](development.md) documentation.
 
-The system is designed to have as less as possible write operations on the storage media. Which means that we have basically only write during the OTA update and 5-6 times per week on the overlay part. The data partition is having I/O. This is the reason which is should be run on a different drive.
+The system is designed to have as few write operations to the storage media as possible. This means that we only write during the OTA updates and 5-6 times per week on the overlay partition. The data partition receives the main I/O operations and for this reason is ideal for placing on a different drive.
 
 A visual representation looks like this:
 
@@ -51,15 +51,7 @@ Log in as `root` to get to the Home Assistant CLI and then enter `login` to cont
 
 Confirm your USB SSD/HD is connected and recognized using `fdisk -l`.
 
-It is recommended to use fdisk to remove the existing partition(s) before proceeding.
-
-- Type `fdisk /dev/XXX` (replacing XXX with your drive)
-- Type `d` to delete a partition.
-- Continue if needed, then write the changes.
-
-Creating a new partition is not necessary.
-
-With the drive now prepared, use the below command (again, replacing XXX with your drive)
+Make sure the drive has no partition named `hassos-data` (or no partition at all). With the drive, use the below command (again, replacing XXX with your drive)
 
 ```sh
 $ datactl move /dev/xxx

README.md

@@ -20,7 +20,7 @@ Home Assistant Operating System uses Docker as Container engine. It by default d
 - Asus Tinker Board
 - Virtual appliances
 
-See full list and specific models [here](./Documentation/boards/README.md)
+See the full list and specific models [here](./Documentation/boards/README.md)
 
 ## Getting Started
 
@@ -45,7 +45,7 @@ If you're interested in finding out more about Home Assistant Operating System a
 - **Security:**
   - [AppArmor](https://apparmor.net/) Linux kernel security module
 
-If you don't have experience with these, embedded systems, buildroot or the build process for Linux distributions, then please read up on these topics. The rest of the documentation in this project is for developers and assumes you have experience of embedded systems or a strong understanding of the internal workings of operating systems.
+If you don't have experience with these, embedded systems, buildroot or the build process for Linux distributions, then please read up on these topics. The rest of the documentation in this project is for developers and assumes you have experience with embedded systems or a strong understanding of the internal workings of operating systems.
 
 ## Developer Documentation
 

azure-pipelines-release.yml

@@ -46,6 +46,8 @@ jobs:
         board: 'intel_nuc'
       OdroidC2:
         board: 'odroid_c2'
+      OdroidC4:
+        board: 'odroid_c4'
       OdroidN2:
         board: 'odroid_n2'
       OdroidXU4:

buildroot-external/board/asus/tinker/patches/uboot/0001-SPL-modify-load-address-of-U-Boot.patch

@@ -1,8 +1,8 @@
-From 74e929bc4713b76f58a8df82019d74078b4b8d0c Mon Sep 17 00:00:00 2001
-Message-Id: <74e929bc4713b76f58a8df82019d74078b4b8d0c.1599227174.git.stefan@agner.ch>
+From cd1aac268ff58eea28153bbabfb33abc2df52b1f Mon Sep 17 00:00:00 2001
+Message-Id: <cd1aac268ff58eea28153bbabfb33abc2df52b1f.1602103621.git.stefan@agner.ch>
 From: Pascal Vizeli <pvizeli@syshack.ch>
 Date: Fri, 24 Apr 2020 12:41:50 +0000
-Subject: [PATCH 1/3] SPL: modify load address of U-Boot
+Subject: [PATCH 1/4] SPL: modify load address of U-Boot
 
 Default load address of U-Boot is at sector 16384, which is where HAOS
 has its first partition. Use 0x2000 (8192) instead.
@@ -15,16 +15,16 @@ Signed-off-by: Stefan Agner <stefan@agner.ch>
  2 files changed, 2 insertions(+)
 
 diff --git a/configs/tinker-rk3288_defconfig b/configs/tinker-rk3288_defconfig
-index 83c3450839..574a711a32 100644
+index d459c7f50d..e0682ed479 100644
 --- a/configs/tinker-rk3288_defconfig
 +++ b/configs/tinker-rk3288_defconfig
-@@ -84,3 +84,4 @@ CONFIG_USB_ETHER_ASIX=y
- CONFIG_USB_ETHER_SMSC95XX=y
+@@ -88,3 +88,4 @@ CONFIG_VIDEO_ROCKCHIP=y
+ CONFIG_DISPLAY_ROCKCHIP_HDMI=y
  CONFIG_CMD_DHRYSTONE=y
  CONFIG_ERRNO_STR=y
 +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x2000
 diff --git a/configs/tinker-s-rk3288_defconfig b/configs/tinker-s-rk3288_defconfig
-index 4925b14821..df047785ea 100644
+index 68411d863b..1a285baf73 100644
 --- a/configs/tinker-s-rk3288_defconfig
 +++ b/configs/tinker-s-rk3288_defconfig
 @@ -90,3 +90,4 @@ CONFIG_DISPLAY_ROCKCHIP_HDMI=y

buildroot-external/board/asus/tinker/patches/uboot/0002-rockchip-dts-tinker-move-i2c-node-to-shared-device-t.patch

@@ -1,10 +1,10 @@
-From 683783c7253981c0d4c3b772aeb1f9bda833e2be Mon Sep 17 00:00:00 2001
-Message-Id: <683783c7253981c0d4c3b772aeb1f9bda833e2be.1599227174.git.stefan@agner.ch>
-In-Reply-To: <74e929bc4713b76f58a8df82019d74078b4b8d0c.1599227174.git.stefan@agner.ch>
-References: <74e929bc4713b76f58a8df82019d74078b4b8d0c.1599227174.git.stefan@agner.ch>
+From d49ad12ee89d0d64f1f594bcad7de0e4f9631add Mon Sep 17 00:00:00 2001
+Message-Id: <d49ad12ee89d0d64f1f594bcad7de0e4f9631add.1602103621.git.stefan@agner.ch>
+In-Reply-To: <cd1aac268ff58eea28153bbabfb33abc2df52b1f.1602103621.git.stefan@agner.ch>
+References: <cd1aac268ff58eea28153bbabfb33abc2df52b1f.1602103621.git.stefan@agner.ch>
 From: Stefan Agner <stefan@agner.ch>
 Date: Fri, 4 Sep 2020 15:40:55 +0200
-Subject: [PATCH 2/3] rockchip: dts: tinker: move i2c node to shared device
+Subject: [PATCH 2/4] rockchip: dts: tinker: move i2c node to shared device
  tree
 
 The I2C EEPROM is present on Tinker Board S as well. Move the i2c node

buildroot-external/board/asus/tinker/patches/uboot/0003-rockchip-dts-tinker-remove-unnecessary-node.patch

@@ -1,10 +1,10 @@
-From 2af46619bb66af62bbfd2a880fe57d6dd0ec43fe Mon Sep 17 00:00:00 2001
-Message-Id: <2af46619bb66af62bbfd2a880fe57d6dd0ec43fe.1599227174.git.stefan@agner.ch>
-In-Reply-To: <74e929bc4713b76f58a8df82019d74078b4b8d0c.1599227174.git.stefan@agner.ch>
-References: <74e929bc4713b76f58a8df82019d74078b4b8d0c.1599227174.git.stefan@agner.ch>
+From 07a02625ba95f68ba670b4c1cc98567acb390195 Mon Sep 17 00:00:00 2001
+Message-Id: <07a02625ba95f68ba670b4c1cc98567acb390195.1602103621.git.stefan@agner.ch>
+In-Reply-To: <cd1aac268ff58eea28153bbabfb33abc2df52b1f.1602103621.git.stefan@agner.ch>
+References: <cd1aac268ff58eea28153bbabfb33abc2df52b1f.1602103621.git.stefan@agner.ch>
 From: Stefan Agner <stefan@agner.ch>
 Date: Fri, 4 Sep 2020 15:44:38 +0200
-Subject: [PATCH 3/3] rockchip: dts: tinker: remove unnecessary node
+Subject: [PATCH 3/4] rockchip: dts: tinker: remove unnecessary node
 
 The property reg-shift with the same value is present in the base
 device tree already. Remove unnecessary node from rk3288-tinker.dts.

buildroot-external/board/asus/tinker/patches/uboot/0004-pmic-enable-LDO2-vcc33_mipi-at-bootup.patch

@@ -1,7 +1,10 @@
-From 4147d34a63f74f78a8ff9a3dcf2f4c9cd8d6be3a Mon Sep 17 00:00:00 2001
+From 549d98c233b2a8b7cd4b0d4eb9652ad60a8a0f75 Mon Sep 17 00:00:00 2001
+Message-Id: <549d98c233b2a8b7cd4b0d4eb9652ad60a8a0f75.1602103621.git.stefan@agner.ch>
+In-Reply-To: <cd1aac268ff58eea28153bbabfb33abc2df52b1f.1602103621.git.stefan@agner.ch>
+References: <cd1aac268ff58eea28153bbabfb33abc2df52b1f.1602103621.git.stefan@agner.ch>
 From: Pascal Vizeli <pvizeli@syshack.ch>
 Date: Fri, 24 Apr 2020 11:37:55 +0000
-Subject: [PATCH 1/1] pmic: enable LDO2 vcc33_mipi at bootup
+Subject: [PATCH 4/4] pmic: enable LDO2 vcc33_mipi at bootup
 
 Signed-off-by: Pascal Vizeli <pvizeli@syshack.ch>
 ---
@@ -9,10 +12,10 @@ Signed-off-by: Pascal Vizeli <pvizeli@syshack.ch>
  1 file changed, 37 insertions(+)
 
 diff --git a/board/rockchip/tinker_rk3288/tinker-rk3288.c b/board/rockchip/tinker_rk3288/tinker-rk3288.c
-index 7af39e10cd..f12409933d 100644
+index f85209c649..6fa1bb0c66 100644
 --- a/board/rockchip/tinker_rk3288/tinker-rk3288.c
 +++ b/board/rockchip/tinker_rk3288/tinker-rk3288.c
-@@ -12,6 +12,7 @@
+@@ -13,6 +13,7 @@
  #include <netdev.h>
  #include <asm/arch-rockchip/bootrom.h>
  #include <asm/io.h>
@@ -20,7 +23,7 @@ index 7af39e10cd..f12409933d 100644
  
  static int get_ethaddr_from_eeprom(u8 *addr)
  {
-@@ -47,3 +48,39 @@ int mmc_get_env_dev(void)
+@@ -48,3 +49,39 @@ int mmc_get_env_dev(void)
  
  	return 1;
  }
@@ -61,5 +64,5 @@ index 7af39e10cd..f12409933d 100644
 +}
 +#endif
 -- 
-2.17.1
+2.28.0
 

buildroot-external/board/asus/tinker/uboot-boot.ush

@@ -17,7 +17,7 @@ test -n "${BOOT_A_LEFT}" || setenv BOOT_A_LEFT 3
 test -n "${BOOT_B_LEFT}" || setenv BOOT_B_LEFT 3
 
 # HassOS bootargs
-setenv bootargs_hassos "zram.enabled=1 zram.num_devices=3 apparmor=1 security=apparmor systemd.machine_id=${MACHINE_ID} cgroup_enable=memory"
+setenv bootargs_hassos "zram.enabled=1 zram.num_devices=3 apparmor=1 security=apparmor systemd.machine_id=${MACHINE_ID} cgroup_enable=memory fsck.repair=yes"
 
 # HassOS system A/B
 setenv bootargs_a "root=PARTUUID=8d3d53e3-6d49-4c38-8349-aff6859e82fd rootfstype=squashfs ro rootwait"

buildroot-external/board/hardkernel/odroid-c2/uboot-boot.ush

@@ -19,7 +19,7 @@ test -n "${BOOT_A_LEFT}" || setenv BOOT_A_LEFT 3
 test -n "${BOOT_B_LEFT}" || setenv BOOT_B_LEFT 3
 
 # HassOS bootargs
-setenv bootargs_hassos "zram.enabled=1 zram.num_devices=3 apparmor=1 security=apparmor systemd.machine_id=${MACHINE_ID} cgroup_enable=memory"
+setenv bootargs_hassos "zram.enabled=1 zram.num_devices=3 apparmor=1 security=apparmor systemd.machine_id=${MACHINE_ID} cgroup_enable=memory fsck.repair=yes"
 
 # HassOS system A/B
 setenv bootargs_a "root=PARTUUID=48617373-06 rootfstype=squashfs ro rootwait"

buildroot-external/board/hardkernel/odroid-c4/hassos-hook.sh

@@ -0,0 +1,23 @@
+#!/bin/bash
+# shellcheck disable=SC2155
+
+function hassos_pre_image() {
+    local BOOT_DATA="$(path_boot_dir)"
+    local UBOOT_SM1="${BINARIES_DIR}/u-boot.sm1"
+    local SPL_IMG="$(path_spl_img)"
+
+    cp "${BINARIES_DIR}/boot.scr" "${BOOT_DATA}/boot.scr"
+    cp "${BINARIES_DIR}/meson-sm1-odroid-c4.dtb" "${BOOT_DATA}/meson-sm1-odroid-c4.dtb"
+
+    echo "console=tty0 console=ttyAML0,115200n8" > "${BOOT_DATA}/cmdline.txt"
+
+    # SPL
+    create_spl_image
+
+    dd if="${UBOOT_SM1}" of="${SPL_IMG}" conv=notrunc bs=512 seek=1
+}
+
+
+function hassos_post_image() {
+    convert_disk_image_gz
+}

buildroot-external/board/hardkernel/odroid-c4/meta

@@ -0,0 +1,10 @@
+BOARD_ID=odroid-c4
+BOARD_NAME="Hardkernel Odroid-C4"
+CHASSIS=embedded
+BOOTLOADER=uboot
+KERNEL_FILE=Image
+BOOT_SYS=mbr
+BOOT_SPL=true
+BOOT_ENV_SIZE=0x2000
+SUPERVISOR_MACHINE=odroid-c4
+SUPERVISOR_ARCH=aarch64

buildroot-external/board/hardkernel/odroid-c4/patches/uboot/0001-HACK-mmc-meson-gx-limit-to-24MHz.patch

@@ -0,0 +1,25 @@
+From 64017a2cc9e501329016d50b701c5e9a9488991d Mon Sep 17 00:00:00 2001
+From: Neil Armstrong <narmstrong@baylibre.com>
+Date: Mon, 2 Sep 2019 15:42:04 +0200
+Subject: [PATCH 3/3] HACK: mmc: meson-gx: limit to 24MHz
+
+Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
+---
+ drivers/mmc/meson_gx_mmc.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/drivers/mmc/meson_gx_mmc.c b/drivers/mmc/meson_gx_mmc.c
+index b5f5122b..00bfa324 100644
+--- a/drivers/mmc/meson_gx_mmc.c
++++ b/drivers/mmc/meson_gx_mmc.c
+@@ -252,7 +252,7 @@ static int meson_mmc_probe(struct udevice *dev)
+ 	cfg->host_caps = MMC_MODE_8BIT | MMC_MODE_4BIT |
+ 			MMC_MODE_HS_52MHz | MMC_MODE_HS;
+ 	cfg->f_min = DIV_ROUND_UP(SD_EMMC_CLKSRC_24M, CLK_MAX_DIV);
+-	cfg->f_max = 100000000; /* 100 MHz */
++	cfg->f_max = SD_EMMC_CLKSRC_24M;
+ 	cfg->b_max = 511; /* max 512 - 1 blocks */
+ 	cfg->name = dev->name;
+
+--
+2.22.0

buildroot-external/board/hardkernel/odroid-c4/uboot-boot.ush

@@ -0,0 +1,83 @@
+
+###########################################
+
+part start mmc ${devnum} 9 mmc_env
+mmc dev ${devnum}
+setenv loadbootstate " \
+    echo 'loading env...'; \
+    mmc read ${ramdisk_addr_r} ${mmc_env} 0x10; \
+    env import -c ${ramdisk_addr_r} 0x2000;"
+
+setenv storebootstate " \
+    echo 'storing env...'; \
+    env export -c -s 0x2000 ${ramdisk_addr_r} BOOT_ORDER BOOT_A_LEFT BOOT_B_LEFT MACHINE_ID; \
+    mmc write ${ramdisk_addr_r} ${mmc_env} 0x10;"
+
+run loadbootstate
+test -n "${BOOT_ORDER}" || setenv BOOT_ORDER "A B"
+test -n "${BOOT_A_LEFT}" || setenv BOOT_A_LEFT 3
+test -n "${BOOT_B_LEFT}" || setenv BOOT_B_LEFT 3
+
+# HassOS bootargs
+setenv bootargs_hassos "zram.enabled=1 zram.num_devices=3 apparmor=1 security=apparmor systemd.machine_id=${MACHINE_ID} cgroup_enable=memory clk_ignore_unused usb-storage.quirks=0x2537:0x1066:u,0x2537:0x1068:u"
+
+# HassOS system A/B
+setenv bootargs_a "root=PARTUUID=48617373-06 rootfstype=squashfs ro rootwait"
+setenv bootargs_b "root=PARTUUID=48617373-08 rootfstype=squashfs ro rootwait"
+
+usb start
+
+# Load extraargs
+fileenv mmc ${devnum}:1 ${ramdisk_addr_r} cmdline.txt cmdline
+fatload mmc ${devnum}:1 ${fdt_addr_r} meson-sm1-odroid-c4.dtb
+
+# logical volumes get numbered after physical ones.
+# 1. boot
+# 2. Extended partition
+# 3. Overlay
+# 4. Data
+# 5. KernelA
+# 6. SystemA
+# 7. KernelB
+# 8. SystemB
+# 9. BootInfo
+setenv bootargs
+for BOOT_SLOT in "${BOOT_ORDER}"; do
+  if test "x${bootargs}" != "x"; then
+    # skip remaining slots
+  elif test "x${BOOT_SLOT}" = "xA"; then
+    if test ${BOOT_A_LEFT} -gt 0; then
+      setexpr BOOT_A_LEFT ${BOOT_A_LEFT} - 1
+      echo "Found valid slot A, ${BOOT_A_LEFT} attempts remaining"
+      setenv load_kernel "ext4load mmc ${devnum}:5 ${kernel_addr_r} Image"
+      setenv bootargs "${bootargs_hassos} ${bootargs_a} rauc.slot=A ${cmdline}"
+    fi
+  elif test "x${BOOT_SLOT}" = "xB"; then
+    if test ${BOOT_B_LEFT} -gt 0; then
+      setexpr BOOT_B_LEFT ${BOOT_B_LEFT} - 1
+      echo "Found valid slot B, ${BOOT_B_LEFT} attempts remaining"
+      setenv load_kernel "ext4load mmc ${devnum}:7 ${kernel_addr_r} Image"
+      setenv bootargs "${bootargs_hassos} ${bootargs_b} rauc.slot=B ${cmdline}"
+    fi
+  fi
+done
+
+if test -n "${bootargs}"; then
+  run storebootstate
+else
+  echo "No valid slot found, resetting tries to 3"
+  setenv BOOT_A_LEFT 3
+  setenv BOOT_B_LEFT 3
+  run storebootstate
+  reset
+fi
+
+echo "Loading kernel"
+run load_kernel
+echo " Starting kernel"
+printenv load_kernel
+printenv bootargs
+booti ${kernel_addr_r} - ${fdt_addr_r}
+
+echo "Fails on boot"
+reset

buildroot-external/board/hardkernel/odroid-c4/uboot.config

@@ -0,0 +1,4 @@
+CONFIG_DOS_PARTITION=y
+# CONFIG_EFI_PARTITION is not set
+# CONFIG_USB_STORAGE is not set
+CONFIG_DISPLAY_BOARDINFO=y

buildroot-external/board/hardkernel/odroid-n2/kernel.config

@@ -0,0 +1 @@
+CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y

buildroot-external/board/hardkernel/odroid-n2/uboot-boot.ush

@@ -19,7 +19,7 @@ test -n "${BOOT_A_LEFT}" || setenv BOOT_A_LEFT 3
 test -n "${BOOT_B_LEFT}" || setenv BOOT_B_LEFT 3
 
 # HassOS bootargs
-setenv bootargs_hassos "zram.enabled=1 zram.num_devices=3 apparmor=1 security=apparmor systemd.machine_id=${MACHINE_ID} cgroup_enable=memory"
+setenv bootargs_hassos "zram.enabled=1 zram.num_devices=3 apparmor=1 security=apparmor systemd.machine_id=${MACHINE_ID} cgroup_enable=memory fsck.repair=yes"
 
 # HassOS system A/B
 setenv bootargs_a "root=PARTUUID=48617373-06 rootfstype=squashfs ro rootwait"

buildroot-external/board/hardkernel/odroid-xu4/uboot-boot.ush

@@ -21,7 +21,7 @@ test -n "${BOOT_A_LEFT}" || setenv BOOT_A_LEFT 3
 test -n "${BOOT_B_LEFT}" || setenv BOOT_B_LEFT 3
 
 # HassOS bootargs
-setenv bootargs_hassos "zram.enabled=1 zram.num_devices=3 apparmor=1 security=apparmor systemd.machine_id=${MACHINE_ID} cgroup_enable=memory"
+setenv bootargs_hassos "zram.enabled=1 zram.num_devices=3 apparmor=1 security=apparmor systemd.machine_id=${MACHINE_ID} cgroup_enable=memory fsck.repair=yes"
 
 # HassOS system A/B
 setenv bootargs_a "root=PARTUUID=48617373-06 rootfstype=squashfs ro rootwait"

buildroot-external/board/hardkernel/patches/linux/0001-arm64-defconfig-enable-meson-gx-audio-as-module.patch

@@ -1,43 +0,0 @@
-From e2b93751cfd0722801b65b4603b588ab9df4c12b Mon Sep 17 00:00:00 2001
-From: Jerome Brunet <jbrunet@baylibre.com>
-Date: Tue, 21 Apr 2020 18:39:30 +0200
-Subject: [PATCH 2/8] arm64: defconfig: enable meson gx audio as module
-
-Enable the module config for the Amlogic GX audio card.
-This module will imply the internal components usually associated
-with it to make a functional sound card on these platforms.
-
-Also enable the simple amplifier module which often used on the
-output stage of those cards.
-
-Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
-Signed-off-by: Kevin Hilman <khilman@baylibre.com>
-Tested-by: Christian Hewitt <christianshewitt@gmail.com>
-Link: https://lore.kernel.org/r/20200421163935.775935-2-jbrunet@baylibre.com
----
- arch/arm64/configs/defconfig | 2 ++
- 1 file changed, 2 insertions(+)
-
-diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
-index 03d0189f7d68..ceb60ee9c340 100644
---- a/arch/arm64/configs/defconfig
-+++ b/arch/arm64/configs/defconfig
-@@ -644,6 +644,7 @@ CONFIG_SND_HDA_CODEC_HDMI=m
- CONFIG_SND_SOC=y
- CONFIG_SND_BCM2835_SOC_I2S=m
- CONFIG_SND_MESON_AXG_SOUND_CARD=m
-+CONFIG_SND_MESON_GX_SOUND_CARD=m
- CONFIG_SND_SOC_SDM845=m
- CONFIG_SND_SOC_ROCKCHIP=m
- CONFIG_SND_SOC_ROCKCHIP_SPDIF=m
-@@ -656,6 +657,7 @@ CONFIG_SND_SOC_AK4613=m
- CONFIG_SND_SOC_ES7134=m
- CONFIG_SND_SOC_ES7241=m
- CONFIG_SND_SOC_PCM3168A_I2C=m
-+CONFIG_SND_SOC_SIMPLE_AMPLIFIER=m
- CONFIG_SND_SOC_TAS571X=m
- CONFIG_SND_SOC_WCD934X=m
- CONFIG_SND_SOC_WSA881X=m
--- 
-2.17.1
-

buildroot-external/board/hardkernel/patches/linux/0001-arm64-dts-meson-convert-ODROID-N2-to-dtsi.patch

@@ -1,32 +1,32 @@
-From 9443f2cd21a8ebd08f0fb64f5b3a8ccb6cd77d8e Mon Sep 17 00:00:00 2001
-Message-Id: <9443f2cd21a8ebd08f0fb64f5b3a8ccb6cd77d8e.1596660075.git.stefan@agner.ch>
-In-Reply-To: <f72fc1866396fed30036e0f06007c15217e47f22.1596660075.git.stefan@agner.ch>
-References: <f72fc1866396fed30036e0f06007c15217e47f22.1596660075.git.stefan@agner.ch>
+From 734f52f38625ce29c964517255538b3b0b546e8d Mon Sep 17 00:00:00 2001
+Message-Id: <734f52f38625ce29c964517255538b3b0b546e8d.1603528796.git.stefan@agner.ch>
 From: Christian Hewitt <christianshewitt@gmail.com>
-Date: Sun, 19 Jul 2020 14:10:32 +0000
-Subject: [PATCH 08/10] arm64: dts: meson: convert ODROID-N2 to dtsi
+Date: Tue, 15 Sep 2020 17:24:30 +0200
+Subject: [PATCH 1/7] arm64: dts: meson: convert ODROID-N2 to dtsi
 
 Convert the current ODROID-N2 dts into a common dtsi in preparation
 for adding ODROID-N2+ support.
 
 Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
-[rebased ontop of sound patches]
-Signed-off-by: Stefan Agner <stefan@agner.ch>
+Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
+Signed-off-by: Kevin Hilman <khilman@baylibre.com>
+Acked-by: Neil Armstrong <narmstrong@baylibre.com>
+Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
+Link: https://lore.kernel.org/r/20200915152432.30616-2-narmstrong@baylibre.com
 ---
- .../boot/dts/amlogic/meson-g12b-odroid-n2.dts | 619 +----------------
- .../dts/amlogic/meson-g12b-odroid-n2.dtsi     | 626 ++++++++++++++++++
- 2 files changed, 627 insertions(+), 618 deletions(-)
+ .../boot/dts/amlogic/meson-g12b-odroid-n2.dts | 618 +----------------
+ .../dts/amlogic/meson-g12b-odroid-n2.dtsi     | 625 ++++++++++++++++++
+ 2 files changed, 626 insertions(+), 617 deletions(-)
  create mode 100644 arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi
 
 diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts
-index 34fffa6d859d..5fd51a87ae9b 100644
+index 34fffa6d859d..a198a91259ec 100644
 --- a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts
 +++ b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts
-@@ -6,626 +6,9 @@
- 
+@@ -7,625 +7,9 @@
  /dts-v1/;
  
--#include "meson-g12b-s922x.dtsi"
+ #include "meson-g12b-s922x.dtsi"
 -#include <dt-bindings/input/input.h>
 -#include <dt-bindings/gpio/meson-g12a-gpio.h>
 -#include <dt-bindings/sound/meson-g12a-toacodec.h>
@@ -652,17 +652,16 @@ index 34fffa6d859d..5fd51a87ae9b 100644
  };
 diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi
 new file mode 100644
-index 000000000000..e5bc132ce7d5
+index 000000000000..6982632ae646
 --- /dev/null
 +++ b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi
-@@ -0,0 +1,626 @@
+@@ -0,0 +1,625 @@
 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
 +/*
 + * Copyright (c) 2019 BayLibre, SAS
 + * Author: Neil Armstrong <narmstrong@baylibre.com>
 + */
 +
-+#include "meson-g12b-s922x.dtsi"
 +#include <dt-bindings/input/input.h>
 +#include <dt-bindings/gpio/meson-g12a-gpio.h>
 +#include <dt-bindings/sound/meson-g12a-toacodec.h>
@@ -1067,7 +1066,7 @@ index 000000000000..e5bc132ce7d5
 +
 +&ext_mdio {
 +	external_phy: ethernet-phy@0 {
-+		/* Realtek RTL8211F (0x001cc916) */
++		/* Realtek RTL8211F (0x001cc916) */	
 +		reg = <0>;
 +		max-speed = <1000>;
 +
@@ -1283,5 +1282,5 @@ index 000000000000..e5bc132ce7d5
 +	phy-supply = <&hub_5v>;
 +};
 -- 
-2.27.0
+2.28.0
 

buildroot-external/board/hardkernel/patches/linux/0002-ASoC-meson-imply-acodec-glue-on-axg-sound-card.patch

@@ -1,28 +0,0 @@
-From 821b8ac21b1675910423ee69d37cb1977b8f271e Mon Sep 17 00:00:00 2001
-From: Jerome Brunet <jbrunet@baylibre.com>
-Date: Mon, 30 Mar 2020 17:39:04 +0200
-Subject: [PATCH 3/8] ASoC: meson: imply acodec glue on axg sound card
-
-When axg card driver support is enabled, lets enable the related
-internal DAC glue by default.
-
-Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
----
- sound/soc/meson/Kconfig | 1 +
- 1 file changed, 1 insertion(+)
-
-diff --git a/sound/soc/meson/Kconfig b/sound/soc/meson/Kconfig
-index 8b6295283989..363dc3b1bbe4 100644
---- a/sound/soc/meson/Kconfig
-+++ b/sound/soc/meson/Kconfig
-@@ -68,6 +68,7 @@ config SND_MESON_AXG_SOUND_CARD
- 	imply SND_MESON_AXG_SPDIFOUT
- 	imply SND_MESON_AXG_SPDIFIN
- 	imply SND_MESON_AXG_PDM
-+	imply SND_MESON_G12A_TOACODEC
- 	imply SND_MESON_G12A_TOHDMITX if DRM_MESON_DW_HDMI
- 	help
- 	  Select Y or M to add support for the AXG SoC sound card
--- 
-2.17.1
-

buildroot-external/board/hardkernel/patches/linux/0002-dt-bindings-arm-amlogic-add-support-for-the-ODROID-N.patch

@@ -0,0 +1,36 @@
+From 75f1e8330dac46a0bef8a360be0ae4566d9a470c Mon Sep 17 00:00:00 2001
+Message-Id: <75f1e8330dac46a0bef8a360be0ae4566d9a470c.1603528796.git.stefan@agner.ch>
+In-Reply-To: <734f52f38625ce29c964517255538b3b0b546e8d.1603528796.git.stefan@agner.ch>
+References: <734f52f38625ce29c964517255538b3b0b546e8d.1603528796.git.stefan@agner.ch>
+From: Christian Hewitt <christianshewitt@gmail.com>
+Date: Tue, 15 Sep 2020 17:24:31 +0200
+Subject: [PATCH 2/7] dt-bindings: arm: amlogic: add support for the ODROID-N2+
+
+HardKernel ODROID-N2+ uses a revised Amlogic S922X v2 chip that supports
+higher cpu clock speeds than the original ODROID-N2.
+
+Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
+Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
+Signed-off-by: Kevin Hilman <khilman@baylibre.com>
+Acked-by: Rob Herring <robh@kernel.org>
+Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
+Link: https://lore.kernel.org/r/20200915152432.30616-3-narmstrong@baylibre.com
+---
+ Documentation/devicetree/bindings/arm/amlogic.yaml | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/Documentation/devicetree/bindings/arm/amlogic.yaml b/Documentation/devicetree/bindings/arm/amlogic.yaml
+index 5eba9f48823e..12ba8d074370 100644
+--- a/Documentation/devicetree/bindings/arm/amlogic.yaml
++++ b/Documentation/devicetree/bindings/arm/amlogic.yaml
+@@ -153,6 +153,7 @@ properties:
+               - azw,gtking
+               - azw,gtking-pro
+               - hardkernel,odroid-n2
++              - hardkernel,odroid-n2-plus
+               - khadas,vim3
+               - ugoos,am6
+           - const: amlogic,s922x
+-- 
+2.28.0
+

buildroot-external/board/hardkernel/patches/linux/0003-ASoC-meson-gx-card-fix-sound-dai-dt-schema.patch

@@ -1,47 +0,0 @@
-From 60164df03c6314d8f5f3afef56b0bf97962ec9ee Mon Sep 17 00:00:00 2001
-From: Jerome Brunet <jbrunet@baylibre.com>
-Date: Mon, 24 Feb 2020 14:35:17 +0100
-Subject: [PATCH 4/8] ASoC: meson: gx-card: fix sound-dai dt schema
-
-There is a fair amount of warnings when running 'make dtbs_check' with
-amlogic,gx-sound-card.yaml.
-
-Ex:
-arch/arm64/boot/dts/amlogic/meson-gxm-q200.dt.yaml: sound: dai-link-0:sound-dai:0:1: missing phandle tag in 0
-arch/arm64/boot/dts/amlogic/meson-gxm-q200.dt.yaml: sound: dai-link-0:sound-dai:0:2: missing phandle tag in 0
-arch/arm64/boot/dts/amlogic/meson-gxm-q200.dt.yaml: sound: dai-link-0:sound-dai:0: [66, 0, 0] is too long
-
-The reason is that the sound-dai phandle provided has cells, and in such
-case the schema should use 'phandle-array' instead of 'phandle'.
-
-Fixes: fd00366b8e41 ("ASoC: meson: gx: add sound card dt-binding documentation")
-Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
----
- .../devicetree/bindings/sound/amlogic,gx-sound-card.yaml      | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
-diff --git a/Documentation/devicetree/bindings/sound/amlogic,gx-sound-card.yaml b/Documentation/devicetree/bindings/sound/amlogic,gx-sound-card.yaml
-index fb374c659be1..a48222e8cd08 100644
---- a/Documentation/devicetree/bindings/sound/amlogic,gx-sound-card.yaml
-+++ b/Documentation/devicetree/bindings/sound/amlogic,gx-sound-card.yaml
-@@ -57,7 +57,7 @@ patternProperties:
-           rate
- 
-       sound-dai:
--        $ref: /schemas/types.yaml#/definitions/phandle
-+        $ref: /schemas/types.yaml#/definitions/phandle-array
-         description: phandle of the CPU DAI
- 
-     patternProperties:
-@@ -71,7 +71,7 @@ patternProperties:
- 
-         properties:
-           sound-dai:
--            $ref: /schemas/types.yaml#/definitions/phandle
-+            $ref: /schemas/types.yaml#/definitions/phandle-array
-             description: phandle of the codec DAI
- 
-         required:
--- 
-2.17.1
-

buildroot-external/board/hardkernel/patches/linux/0003-arm64-dts-meson-add-support-for-the-ODROID-N2.patch

@@ -1,31 +1,34 @@
-From 188bc924b34b7d845324eb2e0e7493a9eaeb2cb5 Mon Sep 17 00:00:00 2001
-Message-Id: <188bc924b34b7d845324eb2e0e7493a9eaeb2cb5.1595882680.git.stefan@agner.ch>
-In-Reply-To: <d83d79b085486a605462fa91e3c6746e4ff0b263.1595882680.git.stefan@agner.ch>
-References: <d83d79b085486a605462fa91e3c6746e4ff0b263.1595882680.git.stefan@agner.ch>
+From c714cb26fcb59f5201f7aac68dfd9883319881b2 Mon Sep 17 00:00:00 2001
+Message-Id: <c714cb26fcb59f5201f7aac68dfd9883319881b2.1603528796.git.stefan@agner.ch>
+In-Reply-To: <734f52f38625ce29c964517255538b3b0b546e8d.1603528796.git.stefan@agner.ch>
+References: <734f52f38625ce29c964517255538b3b0b546e8d.1603528796.git.stefan@agner.ch>
 From: Christian Hewitt <christianshewitt@gmail.com>
-Date: Sun, 19 Jul 2020 14:10:34 +0000
-Subject: [PATCH 10/10] arm64: dts: meson: add support for the ODROID-N2+
+Date: Tue, 15 Sep 2020 17:24:32 +0200
+Subject: [PATCH 3/7] arm64: dts: meson: add support for the ODROID-N2+
 
 HardKernel ODROID-N2+ uses an Amlogic S922X rev. C chip capable of higher
-clock speeds than the original ODROID-N2. Hardkernel supports the big cpu
-cluster at 2.4GHz and the little cpu cluster at 2.0GHz. Opp points and
-regulator changess are from the HardKernel Linux kernel sources.
+clock speeds than the original ODROID-N2.
+
+The rev. C support a slighly higher VDDCPU_A & VDDCPU_B voltages and supports
+the same OPPs as the Amlogic A311D SoC from the same G12B family.
 
 Suggested-by: Dongjin Kim <tobetter@hardkernel.com>
 Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
-[Integrated Neil Armstrong's feedback from mailing list]
-Signed-off-by: Stefan Agner <stefan@agner.ch>
+Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
+Signed-off-by: Kevin Hilman <khilman@baylibre.com>
+Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
+Link: https://lore.kernel.org/r/20200915152432.30616-4-narmstrong@baylibre.com
 ---
  arch/arm64/boot/dts/amlogic/Makefile          |  1 +
- .../dts/amlogic/meson-g12b-odroid-n2-plus.dts | 53 +++++++++++++++++++
- 2 files changed, 54 insertions(+)
+ .../dts/amlogic/meson-g12b-odroid-n2-plus.dts | 31 +++++++++++++++++++
+ 2 files changed, 32 insertions(+)
  create mode 100644 arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2-plus.dts
 
 diff --git a/arch/arm64/boot/dts/amlogic/Makefile b/arch/arm64/boot/dts/amlogic/Makefile
-index eef0045320f2..7524cf9680f5 100644
+index 4e2239ffcaa5..b0b3d6791499 100644
 --- a/arch/arm64/boot/dts/amlogic/Makefile
 +++ b/arch/arm64/boot/dts/amlogic/Makefile
-@@ -6,6 +6,7 @@ dtb-$(CONFIG_ARCH_MESON) += meson-g12a-x96-max.dtb
+@@ -8,6 +8,7 @@ dtb-$(CONFIG_ARCH_MESON) += meson-g12b-gtking-pro.dtb
  dtb-$(CONFIG_ARCH_MESON) += meson-g12b-a311d-khadas-vim3.dtb
  dtb-$(CONFIG_ARCH_MESON) += meson-g12b-s922x-khadas-vim3.dtb
  dtb-$(CONFIG_ARCH_MESON) += meson-g12b-odroid-n2.dtb
@@ -35,10 +38,10 @@ index eef0045320f2..7524cf9680f5 100644
  dtb-$(CONFIG_ARCH_MESON) += meson-gxbb-nanopi-k2.dtb
 diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2-plus.dts b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2-plus.dts
 new file mode 100644
-index 000000000000..4ebb448d233f
+index 000000000000..5de2815ba99d
 --- /dev/null
 +++ b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2-plus.dts
-@@ -0,0 +1,53 @@
+@@ -0,0 +1,31 @@
 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
 +/*
 + * Copyright (c) 2019 BayLibre, SAS
@@ -47,18 +50,20 @@ index 000000000000..4ebb448d233f
 +
 +/dts-v1/;
 +
++/* The Amlogic S922X Rev. C supports the same OPPs as the A311D variant */
++#include "meson-g12b-a311d.dtsi"
 +#include "meson-g12b-odroid-n2.dtsi"
 +
 +/ {
 +	compatible = "hardkernel,odroid-n2-plus", "amlogic,s922x", "amlogic,g12b";
-+	model = "Hardkernel ODROID-N2+";
++	model = "Hardkernel ODROID-N2Plus";
 +};
 +
 +&vddcpu_a {
 +	regulator-min-microvolt = <680000>;
 +	regulator-max-microvolt = <1040000>;
 +
-+	pwms = <&pwm_ab 0 1500 0>;
++	pwms = <&pwm_AO_cd 1 1500 0>;
 +};
 +
 +&vddcpu_b {
@@ -68,30 +73,6 @@ index 000000000000..4ebb448d233f
 +	pwms = <&pwm_AO_cd 1 1500 0>;
 +};
 +
-+&cpu_opp_table_0 {
-+	opp-1908000000 {
-+		opp-hz = /bits/ 64 <1908000000>;
-+		opp-microvolt = <1030000>;
-+	};
-+
-+	opp-2016000000 {
-+		opp-hz = /bits/ 64 <2016000000>;
-+		opp-microvolt = <1040000>;
-+	};
-+};
-+
-+&cpub_opp_table_1 {
-+	opp-2304000000 {
-+		opp-hz = /bits/ 64 <2304000000>;
-+		opp-microvolt = <1030000>;
-+	};
-+
-+	opp-2400000000 {
-+		opp-hz = /bits/ 64 <2400000000>;
-+		opp-microvolt = <1040000>;
-+	};
-+};
-+
 -- 
-2.27.0
+2.28.0
 

buildroot-external/board/hardkernel/patches/linux/0004-arm64-dts-meson-add-missing-g12-rng-clock.patch

@@ -0,0 +1,38 @@
+From f2eead311d9dd9ff7ee0846914147250d7711f98 Mon Sep 17 00:00:00 2001
+Message-Id: <f2eead311d9dd9ff7ee0846914147250d7711f98.1603528796.git.stefan@agner.ch>
+In-Reply-To: <734f52f38625ce29c964517255538b3b0b546e8d.1603528796.git.stefan@agner.ch>
+References: <734f52f38625ce29c964517255538b3b0b546e8d.1603528796.git.stefan@agner.ch>
+From: Scott K Logan <logans@cottsay.net>
+Date: Fri, 25 Sep 2020 01:43:53 -0700
+Subject: [PATCH 4/7] arm64: dts: meson: add missing g12 rng clock
+
+This adds the missing perpheral clock for the RNG for Amlogic G12. As
+stated in amlogic,meson-rng.yaml, this isn't always necessary for the
+RNG to function, but is better to have in case the clock is disabled for
+some reason prior to loading.
+
+Signed-off-by: Scott K Logan <logans@cottsay.net>
+Suggested-by: Neil Armstrong <narmstrong@baylibre.com>
+Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
+Signed-off-by: Kevin Hilman <khilman@baylibre.com>
+Link: https://lore.kernel.org/r/520a1a8ec7a958b3d918d89563ec7e93a4100a45.camel@cottsay.net
+---
+ arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi | 2 ++
+ 1 file changed, 2 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
+index 1e83ec5b8c91..81f490e404ca 100644
+--- a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
++++ b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
+@@ -282,6 +282,8 @@ apb_efuse: bus@30000 {
+ 				hwrng: rng@218 {
+ 					compatible = "amlogic,meson-rng";
+ 					reg = <0x0 0x218 0x0 0x4>;
++					clocks = <&clkc CLKID_RNG0>;
++					clock-names = "core";
+ 				};
+ 			};
+ 
+-- 
+2.28.0
+

buildroot-external/board/hardkernel/patches/linux/0004-arm64-dts-meson-g12-add-internal-DAC.patch

@@ -1,39 +0,0 @@
-From e128dd1ca079c5ee558ab100387d9f81bd4f3980 Mon Sep 17 00:00:00 2001
-From: Jerome Brunet <jbrunet@baylibre.com>
-Date: Thu, 7 May 2020 00:16:55 +0200
-Subject: [PATCH 5/8] arm64: dts: meson: g12: add internal DAC
-
-add internal audio DAC support on the g12 and sm1 SoC family
-
-Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
-Signed-off-by: Kevin Hilman <khilman@baylibre.com>
-Link: https://lore.kernel.org/r/20200506221656.477379-7-jbrunet@baylibre.com
----
- arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi | 11 +++++++++++
- 1 file changed, 11 insertions(+)
-
-diff --git a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
-index c0aef7d69117..593a006f4b7b 100644
---- a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
-+++ b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
-@@ -250,6 +250,17 @@
- 				};
- 			};
- 
-+			acodec: audio-controller@32000 {
-+				compatible = "amlogic,t9015";
-+				reg = <0x0 0x32000 0x0 0x14>;
-+				#sound-dai-cells = <0>;
-+				sound-name-prefix = "ACODEC";
-+				clocks = <&clkc CLKID_AUDIO_CODEC>;
-+				clock-names = "pclk";
-+				resets = <&reset RESET_AUDIO_CODEC>;
-+				status = "disabled";
-+			};
-+
- 			periphs: bus@34400 {
- 				compatible = "simple-bus";
- 				reg = <0x0 0x34400 0x0 0x400>;
--- 
-2.17.1
-

buildroot-external/board/hardkernel/patches/linux/0005-arm64-dts-meson-g12-add-internal-DAC-glue.patch

@@ -1,39 +0,0 @@
-From 5ea4085da165fd3f3aa211cb3664dd166d0d5fd7 Mon Sep 17 00:00:00 2001
-From: Jerome Brunet <jbrunet@baylibre.com>
-Date: Thu, 7 May 2020 00:16:56 +0200
-Subject: [PATCH 6/8] arm64: dts: meson: g12: add internal DAC glue
-
-add the internal DAC glue support on the g12 and sm1 family
-This glue connects the different TDM interfaces of the SoC to
-the internal audio DAC codec.
-
-Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
-Signed-off-by: Kevin Hilman <khilman@baylibre.com>
-Link: https://lore.kernel.org/r/20200506221656.477379-8-jbrunet@baylibre.com
----
- arch/arm64/boot/dts/amlogic/meson-g12.dtsi | 9 +++++++++
- 1 file changed, 9 insertions(+)
-
-diff --git a/arch/arm64/boot/dts/amlogic/meson-g12.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12.dtsi
-index 55d39020ec72..0d14409f509c 100644
---- a/arch/arm64/boot/dts/amlogic/meson-g12.dtsi
-+++ b/arch/arm64/boot/dts/amlogic/meson-g12.dtsi
-@@ -343,6 +343,15 @@
- 			status = "disabled";
- 		};
- 
-+		toacodec: audio-controller@740 {
-+			compatible = "amlogic,g12a-toacodec";
-+			reg = <0x0 0x740 0x0 0x4>;
-+			#sound-dai-cells = <1>;
-+			sound-name-prefix = "TOACODEC";
-+			resets = <&clkc_audio AUD_RESET_TOACODEC>;
-+			status = "disabled";
-+		};
-+
- 		tohdmitx: audio-controller@744 {
- 			compatible = "amlogic,g12a-tohdmitx";
- 			reg = <0x0 0x744 0x0 0x4>;
--- 
-2.17.1
-

buildroot-external/board/hardkernel/patches/linux/0005-arm64-dts-meson-odroid-n2-plus-fix-vddcpu_a-pwm.patch

@@ -0,0 +1,42 @@
+From 0a3a45efeefaf65c170df265126a07da3236e178 Mon Sep 17 00:00:00 2001
+Message-Id: <0a3a45efeefaf65c170df265126a07da3236e178.1603528796.git.stefan@agner.ch>
+In-Reply-To: <734f52f38625ce29c964517255538b3b0b546e8d.1603528796.git.stefan@agner.ch>
+References: <734f52f38625ce29c964517255538b3b0b546e8d.1603528796.git.stefan@agner.ch>
+From: Jerome Brunet <jbrunet@baylibre.com>
+Date: Fri, 23 Oct 2020 11:41:39 +0200
+Subject: [PATCH 5/7] arm64: dts: meson: odroid-n2 plus: fix vddcpu_a pwm
+
+On the odroid N2 plus, cpufreq is not available due to an error on the cpu
+regulators. vddcpu a and b get the same PWM. The one provided to vddcpu A
+is incorrect. Because vddcpu B PWM is busy the regulator cannot register:
+
+> pwm-regulator regulator-vddcpu-b: Failed to get PWM: -16
+
+Like on the odroid n2, use PWM A out of GPIOE_2 for vddcpu A to fix the
+problem
+
+Fixes: 98d24896ee11 ("arm64: dts: meson: add support for the ODROID-N2+")
+Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
+Acked-by: Neil Armstrong <narmstrong@baylibre.com>
+Signed-off-by: Kevin Hilman <khilman@baylibre.com>
+Link: https://lore.kernel.org/r/20201023094139.809379-1-jbrunet@baylibre.com
+---
+ arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2-plus.dts | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2-plus.dts b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2-plus.dts
+index 5de2815ba99d..ce1198ad34e4 100644
+--- a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2-plus.dts
++++ b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2-plus.dts
+@@ -19,7 +19,7 @@ &vddcpu_a {
+ 	regulator-min-microvolt = <680000>;
+ 	regulator-max-microvolt = <1040000>;
+ 
+-	pwms = <&pwm_AO_cd 1 1500 0>;
++	pwms = <&pwm_ab 0 1500 0>;
+ };
+ 
+ &vddcpu_b {
+-- 
+2.28.0
+

buildroot-external/board/hardkernel/patches/linux/0006-arm64-dts-meson-g12b-odroid-n2-enable-audio-loopback.patch

@@ -1,123 +0,0 @@
-From 15b3cef2ea75c4d81cb067264be1cf49c49f81b1 Mon Sep 17 00:00:00 2001
-From: Jerome Brunet <jbrunet@baylibre.com>
-Date: Mon, 15 Jun 2020 15:38:44 +0200
-Subject: [PATCH 7/8] arm64: dts: meson-g12b: odroid-n2: enable audio loopback
-
-Add capture pcm interfaces and loopback routes to the odroid-n2
-
-Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
----
- .../boot/dts/amlogic/meson-g12b-odroid-n2.dts | 65 +++++++++++++++++--
- 1 file changed, 61 insertions(+), 4 deletions(-)
-
-diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts
-index 169ea283d4ee..d4421ad164bd 100644
---- a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts
-+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts
-@@ -209,11 +209,28 @@
- 	sound {
- 		compatible = "amlogic,axg-sound-card";
- 		model = "G12B-ODROID-N2";
--		audio-aux-devs = <&tdmout_b>;
-+		audio-aux-devs = <&tdmout_b>, <&tdmin_a>, <&tdmin_b>,
-+				 <&tdmin_c>, <&tdmin_lb>;
- 		audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1",
- 				"TDMOUT_B IN 1", "FRDDR_B OUT 1",
- 				"TDMOUT_B IN 2", "FRDDR_C OUT 1",
--				"TDM_B Playback", "TDMOUT_B OUT";
-+				"TDM_B Playback", "TDMOUT_B OUT",
-+				"TDMIN_A IN 4", "TDM_B Loopback",
-+				"TDMIN_B IN 4", "TDM_B Loopback",
-+				"TDMIN_C IN 4", "TDM_B Loopback",
-+				"TDMIN_LB IN 1", "TDM_B Loopback",
-+				"TODDR_A IN 0", "TDMIN_A OUT",
-+				"TODDR_B IN 0", "TDMIN_A OUT",
-+				"TODDR_C IN 0", "TDMIN_A OUT",
-+				"TODDR_A IN 1", "TDMIN_B OUT",
-+				"TODDR_B IN 1", "TDMIN_B OUT",
-+				"TODDR_C IN 1", "TDMIN_B OUT",
-+				"TODDR_A IN 2", "TDMIN_C OUT",
-+				"TODDR_B IN 2", "TDMIN_C OUT",
-+				"TODDR_C IN 2", "TDMIN_C OUT",
-+				"TODDR_A IN 6", "TDMIN_LB OUT",
-+				"TODDR_B IN 6", "TDMIN_LB OUT",
-+				"TODDR_C IN 6", "TDMIN_LB OUT";
- 
- 		assigned-clocks = <&clkc CLKID_MPLL2>,
- 				  <&clkc CLKID_MPLL0>,
-@@ -236,8 +253,20 @@
- 			sound-dai = <&frddr_c>;
- 		};
- 
--		/* 8ch hdmi interface */
- 		dai-link-3 {
-+			sound-dai = <&toddr_a>;
-+		};
-+
-+		dai-link-4 {
-+			sound-dai = <&toddr_b>;
-+		};
-+
-+		dai-link-5 {
-+			sound-dai = <&toddr_c>;
-+		};
-+
-+		/* 8ch hdmi interface */
-+		dai-link-6 {
- 			sound-dai = <&tdmif_b>;
- 			dai-format = "i2s";
- 			dai-tdm-slot-tx-mask-0 = <1 1>;
-@@ -252,7 +281,7 @@
- 		};
- 
- 		/* hdmi glue */
--		dai-link-4 {
-+		dai-link-7 {
- 			sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>;
- 
- 			codec {
-@@ -476,6 +505,22 @@
- 	status = "okay";
- };
- 
-+&tdmin_a {
-+	status = "okay";
-+};
-+
-+&tdmin_b {
-+	status = "okay";
-+};
-+
-+&tdmin_c {
-+	status = "okay";
-+};
-+
-+&tdmin_lb {
-+	status = "okay";
-+};
-+
- &tdmout_b {
- 	status = "okay";
- };
-@@ -484,6 +529,18 @@
- 	status = "okay";
- };
- 
-+&toddr_a {
-+	status = "okay";
-+};
-+
-+&toddr_b {
-+	status = "okay";
-+};
-+
-+&toddr_c {
-+	status = "okay";
-+};
-+
- &uart_AO {
- 	status = "okay";
- 	pinctrl-0 = <&uart_ao_a_pins>;
--- 
-2.17.1
-

buildroot-external/board/hardkernel/patches/linux/0006-clk-meson-g12a-mark-fclk_div2-as-critical.patch

@@ -1,10 +1,10 @@
-From c33df0ebe8be16b56741ce7f873221ab9087a0a6 Mon Sep 17 00:00:00 2001
-Message-Id: <c33df0ebe8be16b56741ce7f873221ab9087a0a6.1598564789.git.stefan@agner.ch>
-In-Reply-To: <f72fc1866396fed30036e0f06007c15217e47f22.1598564789.git.stefan@agner.ch>
-References: <f72fc1866396fed30036e0f06007c15217e47f22.1598564789.git.stefan@agner.ch>
+From 03041630d824a775b71f6008067955a51d069845 Mon Sep 17 00:00:00 2001
+Message-Id: <03041630d824a775b71f6008067955a51d069845.1603528796.git.stefan@agner.ch>
+In-Reply-To: <734f52f38625ce29c964517255538b3b0b546e8d.1603528796.git.stefan@agner.ch>
+References: <734f52f38625ce29c964517255538b3b0b546e8d.1603528796.git.stefan@agner.ch>
 From: Stefan Agner <stefan@agner.ch>
 Date: Thu, 27 Aug 2020 23:29:57 +0200
-Subject: [PATCH 11/11] clk: meson: g12a: mark fclk_div2 as critical
+Subject: [PATCH 6/7] clk: meson: g12a: mark fclk_div2 as critical
 
 On Amlogic Meson G12b platform, similar to fclk_div3, the fclk_div2
 seems to be necessary for the system to operate correctly as well.
@@ -22,7 +22,7 @@ Signed-off-by: Stefan Agner <stefan@agner.ch>
  1 file changed, 1 insertion(+)
 
 diff --git a/drivers/clk/meson/g12a.c b/drivers/clk/meson/g12a.c
-index fad616cac01e..2214b974f748 100644
+index 9803d44bb157..9a6722a1dc19 100644
 --- a/drivers/clk/meson/g12a.c
 +++ b/drivers/clk/meson/g12a.c
 @@ -298,6 +298,7 @@ static struct clk_regmap g12a_fclk_div2 = {

buildroot-external/board/hardkernel/patches/linux/0007-arm64-dts-meson-odroid-n2-add-jack-audio-output-supp.patch

@@ -1,168 +0,0 @@
-From 978cc250574b7f1ab45f494cc2a094e3c9fd1fa4 Mon Sep 17 00:00:00 2001
-From: Jerome Brunet <jbrunet@baylibre.com>
-Date: Mon, 15 Jun 2020 16:34:37 +0200
-Subject: [PATCH 8/8] arm64: dts: meson: odroid-n2: add jack audio output
- support
-
-Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
----
- .../boot/dts/amlogic/meson-g12b-odroid-n2.dts | 79 +++++++++++++++++--
- 1 file changed, 74 insertions(+), 5 deletions(-)
-
-diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts
-index d4421ad164bd..34fffa6d859d 100644
---- a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts
-+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts
-@@ -9,6 +9,7 @@
- #include "meson-g12b-s922x.dtsi"
- #include <dt-bindings/input/input.h>
- #include <dt-bindings/gpio/meson-g12a-gpio.h>
-+#include <dt-bindings/sound/meson-g12a-toacodec.h>
- #include <dt-bindings/sound/meson-g12a-tohdmitx.h>
- 
- / {
-@@ -20,6 +21,14 @@
- 		ethernet0 = &ethmac;
- 	};
- 
-+	dioo2133: audio-amplifier-0 {
-+		compatible = "simple-audio-amplifier";
-+		enable-gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_HIGH>;
-+		VCC-supply = <&vcc_5v>;
-+		sound-name-prefix = "U19";
-+		status = "okay";
-+	};
-+
- 	chosen {
- 		stdout-path = "serial0:115200n8";
- 	};
-@@ -209,16 +218,26 @@
- 	sound {
- 		compatible = "amlogic,axg-sound-card";
- 		model = "G12B-ODROID-N2";
--		audio-aux-devs = <&tdmout_b>, <&tdmin_a>, <&tdmin_b>,
--				 <&tdmin_c>, <&tdmin_lb>;
-+		audio-widgets = "Line", "Lineout";
-+		audio-aux-devs = <&tdmout_b>, <&tdmout_c>, <&tdmin_a>,
-+				 <&tdmin_b>, <&tdmin_c>, <&tdmin_lb>,
-+				 <&dioo2133>;
- 		audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1",
- 				"TDMOUT_B IN 1", "FRDDR_B OUT 1",
- 				"TDMOUT_B IN 2", "FRDDR_C OUT 1",
- 				"TDM_B Playback", "TDMOUT_B OUT",
-+				"TDMOUT_C IN 0", "FRDDR_A OUT 2",
-+				"TDMOUT_C IN 1", "FRDDR_B OUT 2",
-+				"TDMOUT_C IN 2", "FRDDR_C OUT 2",
-+				"TDM_C Playback", "TDMOUT_C OUT",
- 				"TDMIN_A IN 4", "TDM_B Loopback",
- 				"TDMIN_B IN 4", "TDM_B Loopback",
- 				"TDMIN_C IN 4", "TDM_B Loopback",
- 				"TDMIN_LB IN 1", "TDM_B Loopback",
-+				"TDMIN_A IN 5", "TDM_C Loopback",
-+				"TDMIN_B IN 5", "TDM_C Loopback",
-+				"TDMIN_C IN 5", "TDM_C Loopback",
-+				"TDMIN_LB IN 2", "TDM_C Loopback",
- 				"TODDR_A IN 0", "TDMIN_A OUT",
- 				"TODDR_B IN 0", "TDMIN_A OUT",
- 				"TODDR_C IN 0", "TDMIN_A OUT",
-@@ -230,7 +249,11 @@
- 				"TODDR_C IN 2", "TDMIN_C OUT",
- 				"TODDR_A IN 6", "TDMIN_LB OUT",
- 				"TODDR_B IN 6", "TDMIN_LB OUT",
--				"TODDR_C IN 6", "TDMIN_LB OUT";
-+				"TODDR_C IN 6", "TDMIN_LB OUT",
-+				"U19 INL", "ACODEC LOLP",
-+				"U19 INR", "ACODEC LORP",
-+				"Lineout", "U19 OUTL",
-+				"Lineout", "U19 OUTR";
- 
- 		assigned-clocks = <&clkc CLKID_MPLL2>,
- 				  <&clkc CLKID_MPLL0>,
-@@ -275,22 +298,56 @@
- 			dai-tdm-slot-tx-mask-3 = <1 1>;
- 			mclk-fs = <256>;
- 
--			codec {
-+			codec-0 {
- 				sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>;
- 			};
-+
-+			codec-1 {
-+				sound-dai = <&toacodec TOACODEC_IN_B>;
-+			};
- 		};
- 
--		/* hdmi glue */
-+		/* i2s jack output interface */
- 		dai-link-7 {
-+			sound-dai = <&tdmif_c>;
-+			dai-format = "i2s";
-+			dai-tdm-slot-tx-mask-0 = <1 1>;
-+			mclk-fs = <256>;
-+
-+			codec-0 {
-+				sound-dai = <&tohdmitx TOHDMITX_I2S_IN_C>;
-+			};
-+
-+			codec-1 {
-+				sound-dai = <&toacodec TOACODEC_IN_C>;
-+			};
-+		};
-+
-+		/* hdmi glue */
-+		dai-link-8 {
- 			sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>;
- 
- 			codec {
- 				sound-dai = <&hdmi_tx>;
- 			};
- 		};
-+
-+		/* acodec glue */
-+		dai-link-9 {
-+			sound-dai = <&toacodec TOACODEC_OUT>;
-+
-+			codec {
-+				sound-dai = <&acodec>;
-+			};
-+		};
- 	};
- };
- 
-+&acodec {
-+	AVDD-supply = <&vddao_1v8>;
-+	status = "okay";
-+};
-+
- &arb {
- 	status = "okay";
- };
-@@ -505,6 +562,10 @@
- 	status = "okay";
- };
- 
-+&tdmif_c {
-+	status = "okay";
-+};
-+
- &tdmin_a {
- 	status = "okay";
- };
-@@ -525,6 +586,14 @@
- 	status = "okay";
- };
- 
-+&tdmout_c {
-+	status = "okay";
-+};
-+
-+&toacodec {
-+	status = "okay";
-+};
-+
- &tohdmitx {
- 	status = "okay";
- };
--- 
-2.17.1
-

buildroot-external/board/hardkernel/patches/linux/0009-dt-bindings-arm-amlogic-add-support-for-the-ODROID-N.patch

@@ -1,32 +0,0 @@
-From 54d8ae2ae7a10dab6998b2d4ac507aec96c6f1da Mon Sep 17 00:00:00 2001
-Message-Id: <54d8ae2ae7a10dab6998b2d4ac507aec96c6f1da.1595882680.git.stefan@agner.ch>
-In-Reply-To: <d83d79b085486a605462fa91e3c6746e4ff0b263.1595882680.git.stefan@agner.ch>
-References: <d83d79b085486a605462fa91e3c6746e4ff0b263.1595882680.git.stefan@agner.ch>
-From: Christian Hewitt <christianshewitt@gmail.com>
-Date: Sun, 19 Jul 2020 14:10:33 +0000
-Subject: [PATCH 09/10] dt-bindings: arm: amlogic: add support for the
- ODROID-N2+
-
-HardKernel ODROID-N2+ uses a revised Amlogic S922X v2 chip that supports
-higher cpu clock speeds than the original ODROID-N2.
-
-Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
----
- Documentation/devicetree/bindings/arm/amlogic.yaml | 1 +
- 1 file changed, 1 insertion(+)
-
-diff --git a/Documentation/devicetree/bindings/arm/amlogic.yaml b/Documentation/devicetree/bindings/arm/amlogic.yaml
-index f74aba48cec1..915ef4f355ad 100644
---- a/Documentation/devicetree/bindings/arm/amlogic.yaml
-+++ b/Documentation/devicetree/bindings/arm/amlogic.yaml
-@@ -149,6 +149,7 @@ properties:
-         items:
-           - enum:
-               - hardkernel,odroid-n2
-+              - hardkernel,odroid-n2-plus
-               - khadas,vim3
-               - ugoos,am6
-           - const: amlogic,s922x
--- 
-2.27.0
-

buildroot-external/board/hardkernel/patches/uboot/0001-ARM-meson-isolate-loading-of-socinfo.patch

@@ -1,10 +1,8 @@
-From fb41bcaf0e61e78bc40addb1312040a2bc6a69b7 Mon Sep 17 00:00:00 2001
-Message-Id: <fb41bcaf0e61e78bc40addb1312040a2bc6a69b7.1598875349.git.stefan@agner.ch>
-In-Reply-To: <c12338d22649e46aed12ebe60d897112f045fda9.1598875349.git.stefan@agner.ch>
-References: <c12338d22649e46aed12ebe60d897112f045fda9.1598875349.git.stefan@agner.ch>
+From 698972869afda7095e31892c48051350788aa0a1 Mon Sep 17 00:00:00 2001
+Message-Id: <698972869afda7095e31892c48051350788aa0a1.1603550330.git.stefan@agner.ch>
 From: Stefan Agner <stefan@agner.ch>
 Date: Mon, 31 Aug 2020 13:40:18 +0200
-Subject: [PATCH 2/4] ARM: meson: isolate loading of socinfo
+Subject: [PATCH 1/2] ARM: meson: isolate loading of socinfo
 
 Move loading of socinfo into a separate function so the value can be
 reused later.
@@ -15,10 +13,10 @@ Signed-off-by: Stefan Agner <stefan@agner.ch>
  1 file changed, 18 insertions(+), 2 deletions(-)
 
 diff --git a/arch/arm/mach-meson/board-info.c b/arch/arm/mach-meson/board-info.c
-index 0d3b40a249..e305d60dca 100644
+index 3abb27e03b..cfcd5bbd3b 100644
 --- a/arch/arm/mach-meson/board-info.c
 +++ b/arch/arm/mach-meson/board-info.c
-@@ -123,12 +123,16 @@ static void print_board_model(void)
+@@ -126,12 +126,16 @@ static void print_board_model(void)
  	printf("Model: %s\n", model ? model : "Unknown");
  }
  
@@ -37,7 +35,7 @@ index 0d3b40a249..e305d60dca 100644
  
  	/* find the offset of compatible node */
  	nodeoffset = fdt_node_offset_by_compatible(gd->fdt_blob, -1,
-@@ -155,8 +159,20 @@ int show_board_info(void)
+@@ -158,8 +162,20 @@ int show_board_info(void)
  		return 0;
  	}
  
@@ -59,5 +57,5 @@ index 0d3b40a249..e305d60dca 100644
  	       socinfo_to_soc_id(socinfo),
  	       socinfo_to_package_id(socinfo),
 -- 
-2.28.0
+2.29.1
 

buildroot-external/board/hardkernel/patches/uboot/0001-Amlogic-w400-read-ethaddr-from-efuse.patch

@@ -1,55 +0,0 @@
-From b93c598b1acfe59ffac342d114483af8a45a78ac Mon Sep 17 00:00:00 2001
-From: Pascal Vizeli <pvizeli@syshack.ch>
-Date: Sat, 1 Feb 2020 20:55:39 +0000
-Subject: [PATCH 1/1] Amlogic w400: read ethaddr from efuse
-
-Signed-off-by: Pascal Vizeli <pvizeli@syshack.ch>
----
- board/amlogic/w400/w400.c | 25 ++++++++++++++++++++++++-
- 1 file changed, 24 insertions(+), 1 deletion(-)
-
-diff --git a/board/amlogic/w400/w400.c b/board/amlogic/w400/w400.c
-index e60dc3a622..d4028c6a39 100644
---- a/board/amlogic/w400/w400.c
-+++ b/board/amlogic/w400/w400.c
-@@ -6,13 +6,36 @@
- 
- #include <common.h>
- #include <dm.h>
--#include <env_internal.h>
-+#include <env.h>
- #include <asm/io.h>
-+#include <asm/arch/sm.h>
- #include <asm/arch/eth.h>
- 
-+#define EFUSE_MAC_OFFSET	20
-+#define EFUSE_MAC_SIZE		12
-+
- int misc_init_r(void)
- {
-+	u8 mac_addr[6];
-+	char efuse_mac_addr[EFUSE_MAC_SIZE], buff[3];
-+	ssize_t len;
-+
- 	meson_eth_init(PHY_INTERFACE_MODE_RGMII, 0);
- 
-+	if (!eth_env_get_enetaddr("ethaddr", mac_addr)) {
-+		len = meson_sm_read_efuse(EFUSE_MAC_OFFSET,
-+					  efuse_mac_addr, EFUSE_MAC_SIZE);
-+		if (len != EFUSE_MAC_SIZE)
-+			return 0;
-+
-+		for (int i = 0; i < 6; i++){
-+			buff[0] = efuse_mac_addr[i * 2];
-+			buff[1] = efuse_mac_addr[i * 2 + 1];
-+			mac_addr[i] = simple_strtoul(buff, NULL, 16);
-+		}
-+		if(is_valid_ethaddr(mac_addr))
-+			eth_env_set_enetaddr("ethaddr", mac_addr);
-+	}
-+
- 	return 0;
- }
--- 
-2.17.1
-

buildroot-external/board/hardkernel/patches/uboot/0002-meson-Add-board_rev-to-env.patch

@@ -1,17 +1,17 @@
-From 15ce807d420324bc209772b843d4004619e0cdaf Mon Sep 17 00:00:00 2001
-Message-Id: <15ce807d420324bc209772b843d4004619e0cdaf.1598875349.git.stefan@agner.ch>
-In-Reply-To: <c12338d22649e46aed12ebe60d897112f045fda9.1598875349.git.stefan@agner.ch>
-References: <c12338d22649e46aed12ebe60d897112f045fda9.1598875349.git.stefan@agner.ch>
+From 439e2a240062c4be21ac7879b130ef590106cdd8 Mon Sep 17 00:00:00 2001
+Message-Id: <439e2a240062c4be21ac7879b130ef590106cdd8.1603550497.git.stefan@agner.ch>
+In-Reply-To: <698972869afda7095e31892c48051350788aa0a1.1603550497.git.stefan@agner.ch>
+References: <698972869afda7095e31892c48051350788aa0a1.1603550497.git.stefan@agner.ch>
 From: Pascal Vizeli <pvizeli@syshack.ch>
 Date: Tue, 4 Aug 2020 13:50:57 +0000
-Subject: [PATCH 3/4] meson: Add board_rev to env
+Subject: [PATCH 2/2] meson: Add board_rev to env
 
 Signed-off-by: Pascal Vizeli <pvizeli@syshack.ch>
 Signed-off-by: Stefan Agner <stefan@agner.ch>
 ---
  arch/arm/include/asm/arch-meson/boot.h |  4 ++++
  arch/arm/mach-meson/board-info.c       | 12 ++++++++++++
- board/amlogic/w400/w400.c              |  5 +++++
+ board/amlogic/odroid-n2/odroid-n2.c    |  5 +++++
  3 files changed, 21 insertions(+)
 
 diff --git a/arch/arm/include/asm/arch-meson/boot.h b/arch/arm/include/asm/arch-meson/boot.h
@@ -35,10 +35,10 @@ index a90fe55081..c67d12d06c 100644
 +
  #endif /* __MESON_BOOT_H__ */
 diff --git a/arch/arm/mach-meson/board-info.c b/arch/arm/mach-meson/board-info.c
-index e305d60dca..3c40d6cd27 100644
+index cfcd5bbd3b..3ea7eb7251 100644
 --- a/arch/arm/mach-meson/board-info.c
 +++ b/arch/arm/mach-meson/board-info.c
-@@ -183,3 +183,15 @@ int show_board_info(void)
+@@ -186,3 +186,15 @@ int show_board_info(void)
  
  	return 0;
  }
@@ -54,11 +54,11 @@ index e305d60dca..3c40d6cd27 100644
 +	/* Write SoC info */
 +	return snprintf(buff, buff_len, "%x", socinfo_to_minor(socinfo));
 +}
-diff --git a/board/amlogic/w400/w400.c b/board/amlogic/w400/w400.c
-index d74aab899a..cb2e5edf5e 100644
---- a/board/amlogic/w400/w400.c
-+++ b/board/amlogic/w400/w400.c
-@@ -10,6 +10,7 @@
+diff --git a/board/amlogic/odroid-n2/odroid-n2.c b/board/amlogic/odroid-n2/odroid-n2.c
+index caf7fd6810..c2a191ba6a 100644
+--- a/board/amlogic/odroid-n2/odroid-n2.c
++++ b/board/amlogic/odroid-n2/odroid-n2.c
+@@ -12,6 +12,7 @@
  #include <asm/io.h>
  #include <asm/arch/sm.h>
  #include <asm/arch/eth.h>
@@ -66,17 +66,17 @@ index d74aab899a..cb2e5edf5e 100644
  
  #define EFUSE_MAC_OFFSET	20
  #define EFUSE_MAC_SIZE		12
-@@ -20,6 +21,10 @@ int misc_init_r(void)
- 	char efuse_mac_addr[EFUSE_MAC_SIZE], buff[3];
+@@ -23,6 +24,10 @@ int misc_init_r(void)
+ 	char efuse_mac_addr[EFUSE_MAC_SIZE], tmp[3];
  	ssize_t len;
  
-+	if (meson_get_soc_rev(buff, sizeof(buff))) {
-+		env_set("board_rev", buff);
++	if (meson_get_soc_rev(tmp, sizeof(tmp)) > 0) {
++		env_set("board_rev", tmp);
 +	}
 +
  	meson_eth_init(PHY_INTERFACE_MODE_RGMII, 0);
  
  	if (!eth_env_get_enetaddr("ethaddr", mac_addr)) {
 -- 
-2.28.0
+2.29.1
 

buildroot-external/board/intel/ova/kernel.config

@@ -37,4 +37,10 @@ CONFIG_HYPERV_KEYBOARD=m
 CONFIG_HYPERV_STORAGE=y
 CONFIG_HYPERV_NET=y
 CONFIG_HYPERV_VSOCKETS=m
+CONFIG_PCI_HYPERV=m
+CONFIG_PCI_HYPERV_INTERFACE=m
 CONFIG_FB_HYPERV=y
+
+CONFIG_IGBVF=m
+CONFIG_IXGBEVF=m
+CONFIG_I40EVF=m

buildroot-external/board/raspberrypi/boot-env.txt

@@ -9,6 +9,9 @@ kernel=u-boot.bin
 # uncomment for aarch64 bit support
 #arm_64bit=1
 
+# uncomment to enable primary UART console
+#enable_uart=1
+
 # uncomment if you get no picture on HDMI for a default "safe" mode
 #hdmi_safe=1
 
@@ -46,8 +49,8 @@ kernel=u-boot.bin
 # uncomment for composite PAL
 #sdtv_mode=2
 
-#uncomment to overclock the arm. 700 MHz is the default.
-#arm_freq=800
+# Uncomment to disable continous SD-card poll (for USB SSD)
+#dtparam=sd_poll_once=on
 
 # Uncomment some or all of these to enable the optional hardware interfaces
 #dtparam=i2c_arm=on

buildroot-external/board/raspberrypi/patches/linux/0001-brcmfmac-add-FT-based-AKMs-in-brcmf_set_key_mgmt-for.patch

@@ -1,50 +0,0 @@
-From d6fc5f89ac905cb3efc9c61ce79dbfad5d91883b Mon Sep 17 00:00:00 2001
-Message-Id: <d6fc5f89ac905cb3efc9c61ce79dbfad5d91883b.1597690408.git.stefan@agner.ch>
-From: Chung-Hsien Hsu <stanley.hsu@cypress.com>
-Date: Wed, 15 Aug 2018 05:32:39 -0500
-Subject: [PATCH] brcmfmac: add FT-based AKMs in brcmf_set_key_mgmt() for FT
- support
-
-Add WLAN_AKM_SUITE_FT_8021X and WLAN_AKM_SUITE_FT_PSK in
-brcmf_set_key_mgmt() for FT support.
-
-Signed-off-by: Chung-Hsien Hsu <stanley.hsu@cypress.com>
-Signed-off-by: Chi-Hsien Lin <chi-hsien.lin@cypress.com>
-Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
----
- drivers/net/wireless/broadcom/brcm80211/brcmfmac/cfg80211.c | 6 ++++++
- .../net/wireless/broadcom/brcm80211/include/brcmu_wifi.h    | 1 +
- 2 files changed, 7 insertions(+)
-
-diff --git a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/cfg80211.c b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/cfg80211.c
-index 71b7e5c19434..c312626c0a27 100644
---- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/cfg80211.c
-+++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/cfg80211.c
-@@ -1649,6 +1649,12 @@ brcmf_set_key_mgmt(struct net_device *ndev, struct cfg80211_connect_params *sme)
- 		case WLAN_AKM_SUITE_PSK:
- 			val = WPA2_AUTH_PSK;
- 			break;
-+		case WLAN_AKM_SUITE_FT_8021X:
-+			val = WPA2_AUTH_UNSPECIFIED | WPA2_AUTH_FT;
-+			break;
-+		case WLAN_AKM_SUITE_FT_PSK:
-+			val = WPA2_AUTH_PSK | WPA2_AUTH_FT;
-+			break;
- 		default:
- 			brcmf_err("invalid cipher group (%d)\n",
- 				  sme->crypto.cipher_group);
-diff --git a/drivers/net/wireless/broadcom/brcm80211/include/brcmu_wifi.h b/drivers/net/wireless/broadcom/brcm80211/include/brcmu_wifi.h
-index 75b2a0438cfa..dddebaa60352 100644
---- a/drivers/net/wireless/broadcom/brcm80211/include/brcmu_wifi.h
-+++ b/drivers/net/wireless/broadcom/brcm80211/include/brcmu_wifi.h
-@@ -239,6 +239,7 @@ static inline bool ac_bitmap_tst(u8 bitmap, int prec)
- #define WPA2_AUTH_RESERVED4	0x0400
- #define WPA2_AUTH_RESERVED5	0x0800
- #define WPA2_AUTH_1X_SHA256	0x1000  /* 1X with SHA256 key derivation */
-+#define WPA2_AUTH_FT		0x4000	/* Fast BSS Transition */
- #define WPA2_AUTH_PSK_SHA256	0x8000	/* PSK with SHA256 key derivation */
- 
- #define DOT11_DEFAULT_RTS_LEN		2347
--- 
-2.28.0
-

buildroot-external/board/raspberrypi/patches/linux/0001-dt-bindings-arm-bcm-Convert-BCM2835-firmware-binding.patch

@@ -0,0 +1,87 @@
+From 3651b4af52d63d4e37f40c7a6d0809b0a6c9dd73 Mon Sep 17 00:00:00 2001
+Message-Id: <3651b4af52d63d4e37f40c7a6d0809b0a6c9dd73.1604762912.git.stefan@agner.ch>
+From: Florian Fainelli <f.fainelli@gmail.com>
+Date: Mon, 15 Jun 2020 10:40:41 +0200
+Subject: [PATCH 1/8] dt-bindings: arm: bcm: Convert BCM2835 firmware binding
+ to YAML
+
+Convert the Raspberry Pi BCM2835 firmware binding document to YAML.
+Verified with dt_binding_check and dtbs_check.
+
+Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
+Tested-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
+Signed-off-by: Maxime Ripard <maxime@cerno.tech>
+Link: https://lore.kernel.org/r/5bc0b9be8544b07300fccab4d4f26e5e5d8e62b2.1592210452.git-series.maxime@cerno.tech
+Signed-off-by: Stephen Boyd <sboyd@kernel.org>
+(cherry picked from commit d4c708c032df3d95de297232e20041737e99d126)
+---
+ .../arm/bcm/raspberrypi,bcm2835-firmware.txt  | 14 --------
+ .../arm/bcm/raspberrypi,bcm2835-firmware.yaml | 35 +++++++++++++++++++
+ 2 files changed, 35 insertions(+), 14 deletions(-)
+ delete mode 100644 Documentation/devicetree/bindings/arm/bcm/raspberrypi,bcm2835-firmware.txt
+ create mode 100644 Documentation/devicetree/bindings/arm/bcm/raspberrypi,bcm2835-firmware.yaml
+
+diff --git a/Documentation/devicetree/bindings/arm/bcm/raspberrypi,bcm2835-firmware.txt b/Documentation/devicetree/bindings/arm/bcm/raspberrypi,bcm2835-firmware.txt
+deleted file mode 100644
+index 6824b3180ffb..000000000000
+--- a/Documentation/devicetree/bindings/arm/bcm/raspberrypi,bcm2835-firmware.txt
++++ /dev/null
+@@ -1,14 +0,0 @@
+-Raspberry Pi VideoCore firmware driver
+-
+-Required properties:
+-
+-- compatible:		Should be "raspberrypi,bcm2835-firmware"
+-- mboxes:		Phandle to the firmware device's Mailbox.
+-			  (See: ../mailbox/mailbox.txt for more information)
+-
+-Example:
+-
+-firmware {
+-	compatible = "raspberrypi,bcm2835-firmware";
+-	mboxes = <&mailbox>;
+-};
+diff --git a/Documentation/devicetree/bindings/arm/bcm/raspberrypi,bcm2835-firmware.yaml b/Documentation/devicetree/bindings/arm/bcm/raspberrypi,bcm2835-firmware.yaml
+new file mode 100644
+index 000000000000..cec540c052b6
+--- /dev/null
++++ b/Documentation/devicetree/bindings/arm/bcm/raspberrypi,bcm2835-firmware.yaml
+@@ -0,0 +1,35 @@
++# SPDX-License-Identifier: GPL-2.0
++%YAML 1.2
++---
++$id: http://devicetree.org/schemas/arm/bcm/raspberrypi,bcm2835-firmware.yaml#
++$schema: http://devicetree.org/meta-schemas/core.yaml#
++
++title: Raspberry Pi VideoCore firmware driver
++
++maintainers:
++  - Eric Anholt <eric@anholt.net>
++  - Stefan Wahren <wahrenst@gmx.net>
++
++properties:
++  compatible:
++    items:
++      - const: raspberrypi,bcm2835-firmware
++      - const: simple-bus
++
++  mboxes:
++    $ref: '/schemas/types.yaml#/definitions/phandle'
++    description: |
++      Phandle to the firmware device's Mailbox.
++      (See: ../mailbox/mailbox.txt for more information)
++
++required:
++  - compatible
++  - mboxes
++
++examples:
++  - |
++    firmware {
++        compatible = "raspberrypi,bcm2835-firmware", "simple-bus";
++        mboxes = <&mailbox>;
++    };
++...
+-- 
+2.29.1
+

buildroot-external/board/raspberrypi/patches/linux/0001-dt-bindings-reset-Add-a-binding-for-the-RPi-Firmware.patch

@@ -1,41 +0,0 @@
-From a9f92163e6c07e5c6f57f00f4931098e0e1ee826 Mon Sep 17 00:00:00 2001
-Message-Id: <a9f92163e6c07e5c6f57f00f4931098e0e1ee826.1595152741.git.stefan@agner.ch>
-From: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
-Date: Mon, 29 Jun 2020 18:18:37 +0200
-Subject: [PATCH 1/4] dt-bindings: reset: Add a binding for the RPi Firmware
- reset controller
-
-The firmware running on the RPi VideoCore can be used to reset and
-initialize HW controlled by the firmware.
-
-Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
-Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
-[backport for RPi 4.19 kernel]
-Signed-off-by: Stefan Agner <stefan@agner.ch>
----
- .../dt-bindings/reset/raspberrypi,firmware-reset.h  | 13 +++++++++++++
- 1 file changed, 13 insertions(+)
- create mode 100644 include/dt-bindings/reset/raspberrypi,firmware-reset.h
-
-diff --git a/include/dt-bindings/reset/raspberrypi,firmware-reset.h b/include/dt-bindings/reset/raspberrypi,firmware-reset.h
-new file mode 100644
-index 000000000000..1a4f4c792723
---- /dev/null
-+++ b/include/dt-bindings/reset/raspberrypi,firmware-reset.h
-@@ -0,0 +1,13 @@
-+/* SPDX-License-Identifier: GPL-2.0 */
-+/*
-+ * Copyright (c) 2020 Nicolas Saenz Julienne
-+ * Author: Nicolas Saenz Julienne <nsaenzjulienne@suse.com>
-+ */
-+
-+#ifndef _DT_BINDINGS_RASPBERRYPI_FIRMWARE_RESET_H
-+#define _DT_BINDINGS_RASPBERRYPI_FIRMWARE_RESET_H
-+
-+#define RASPBERRYPI_FIRMWARE_RESET_ID_USB	0
-+#define RASPBERRYPI_FIRMWARE_RESET_NUM_IDS	1
-+
-+#endif
--- 
-2.27.0
-

buildroot-external/board/raspberrypi/patches/linux/0002-dt-bindings-clock-Add-a-binding-for-the-RPi-Firmware.patch

@@ -0,0 +1,71 @@
+From 3ad7fb9329eabd1d7f692f612742ca5ac38854a5 Mon Sep 17 00:00:00 2001
+Message-Id: <3ad7fb9329eabd1d7f692f612742ca5ac38854a5.1604762912.git.stefan@agner.ch>
+In-Reply-To: <3651b4af52d63d4e37f40c7a6d0809b0a6c9dd73.1604762912.git.stefan@agner.ch>
+References: <3651b4af52d63d4e37f40c7a6d0809b0a6c9dd73.1604762912.git.stefan@agner.ch>
+From: Maxime Ripard <maxime@cerno.tech>
+Date: Mon, 15 Jun 2020 10:40:42 +0200
+Subject: [PATCH 2/8] dt-bindings: clock: Add a binding for the RPi Firmware
+ clocks
+
+The firmware running on the RPi VideoCore can be used to discover and
+change the various clocks running in the BCM2711. Since devices will
+need to use them through the DT, let's add a pretty simple binding.
+
+Cc: Michael Turquette <mturquette@baylibre.com>
+Cc: linux-clk@vger.kernel.org
+Cc: devicetree@vger.kernel.org
+Reviewed-by: Stephen Boyd <sboyd@kernel.org>
+Reviewed-by: Rob Herring <robh+dt@kernel.org>
+Tested-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
+Signed-off-by: Maxime Ripard <maxime@cerno.tech>
+Link: https://lore.kernel.org/r/f6105207e7ef5a5ea8d7a1774faf989d341a25f5.1592210452.git-series.maxime@cerno.tech
+Signed-off-by: Stephen Boyd <sboyd@kernel.org>
+(cherry picked from commit 74a0caa5ef1c25905c4409b350ed9a8e0d9a3b74)
+---
+ .../arm/bcm/raspberrypi,bcm2835-firmware.yaml | 24 +++++++++++++++++++
+ 1 file changed, 24 insertions(+)
+
+diff --git a/Documentation/devicetree/bindings/arm/bcm/raspberrypi,bcm2835-firmware.yaml b/Documentation/devicetree/bindings/arm/bcm/raspberrypi,bcm2835-firmware.yaml
+index cec540c052b6..b48ed875eb8e 100644
+--- a/Documentation/devicetree/bindings/arm/bcm/raspberrypi,bcm2835-firmware.yaml
++++ b/Documentation/devicetree/bindings/arm/bcm/raspberrypi,bcm2835-firmware.yaml
+@@ -22,6 +22,25 @@ properties:
+       Phandle to the firmware device's Mailbox.
+       (See: ../mailbox/mailbox.txt for more information)
+ 
++  clocks:
++    type: object
++
++    properties:
++      compatible:
++        const: raspberrypi,firmware-clocks
++
++      "#clock-cells":
++        const: 1
++        description: >
++          The argument is the ID of the clocks contained by the
++          firmware messages.
++
++    required:
++      - compatible
++      - "#clock-cells"
++
++    additionalProperties: false
++
+ required:
+   - compatible
+   - mboxes
+@@ -31,5 +50,10 @@ examples:
+     firmware {
+         compatible = "raspberrypi,bcm2835-firmware", "simple-bus";
+         mboxes = <&mailbox>;
++
++        firmware_clocks: clocks {
++            compatible = "raspberrypi,firmware-clocks";
++            #clock-cells = <1>;
++        };
+     };
+ ...
+-- 
+2.29.1
+

buildroot-external/board/raspberrypi/patches/linux/0003-dt-bindings-arm-bcm-Add-a-select-to-the-RPI-Firmware.patch

@@ -0,0 +1,50 @@
+From 305aeb868929695699e04e26dd590e64ad3c42dd Mon Sep 17 00:00:00 2001
+Message-Id: <305aeb868929695699e04e26dd590e64ad3c42dd.1604762912.git.stefan@agner.ch>
+In-Reply-To: <3651b4af52d63d4e37f40c7a6d0809b0a6c9dd73.1604762912.git.stefan@agner.ch>
+References: <3651b4af52d63d4e37f40c7a6d0809b0a6c9dd73.1604762912.git.stefan@agner.ch>
+From: Maxime Ripard <maxime@cerno.tech>
+Date: Fri, 26 Jun 2020 13:54:33 +0200
+Subject: [PATCH 3/8] dt-bindings: arm: bcm: Add a select to the RPI Firmware
+ binding
+
+The RaspberryPi firmware binding uses two compatible, include simple-bus.
+The select statement generated by default will thus select any node that
+has simple-bus, not all of them being the raspberrypi firmware node.
+
+This results in warnings being wrongfully reported. Let's add a custom
+select statement to fix that.
+
+Fixes: d4c708c032df ("dt-bindings: arm: bcm: Convert BCM2835 firmware binding to YAML")
+Signed-off-by: Maxime Ripard <maxime@cerno.tech>
+Link: https://lore.kernel.org/r/20200626115433.125735-1-maxime@cerno.tech
+Acked-by: Florian Fainelli <f.fainelli@gmail.com>
+Acked-by: Rob Herring <robh@kernel.org>
+Signed-off-by: Stephen Boyd <sboyd@kernel.org>
+(cherry picked from commit 2a08a9232ba2e6103843870e68edae8e381eb02a)
+---
+ .../bindings/arm/bcm/raspberrypi,bcm2835-firmware.yaml   | 9 +++++++++
+ 1 file changed, 9 insertions(+)
+
+diff --git a/Documentation/devicetree/bindings/arm/bcm/raspberrypi,bcm2835-firmware.yaml b/Documentation/devicetree/bindings/arm/bcm/raspberrypi,bcm2835-firmware.yaml
+index b48ed875eb8e..17e4f20c8d39 100644
+--- a/Documentation/devicetree/bindings/arm/bcm/raspberrypi,bcm2835-firmware.yaml
++++ b/Documentation/devicetree/bindings/arm/bcm/raspberrypi,bcm2835-firmware.yaml
+@@ -10,6 +10,15 @@ maintainers:
+   - Eric Anholt <eric@anholt.net>
+   - Stefan Wahren <wahrenst@gmx.net>
+ 
++select:
++  properties:
++    compatible:
++      contains:
++        const: raspberrypi,bcm2835-firmware
++
++  required:
++    - compatible
++
+ properties:
+   compatible:
+     items:
+-- 
+2.29.1
+

buildroot-external/board/raspberrypi/patches/linux/0004-ARM-dts-bcm2838-add-upstream-property-to-enable-PCIe.patch

@@ -1,44 +0,0 @@
-From dcfb930f9c271ad303a888ce94227d2d78974e39 Mon Sep 17 00:00:00 2001
-Message-Id: <dcfb930f9c271ad303a888ce94227d2d78974e39.1595152741.git.stefan@agner.ch>
-In-Reply-To: <a9f92163e6c07e5c6f57f00f4931098e0e1ee826.1595152741.git.stefan@agner.ch>
-References: <a9f92163e6c07e5c6f57f00f4931098e0e1ee826.1595152741.git.stefan@agner.ch>
-From: Stefan Agner <stefan@agner.ch>
-Date: Sun, 19 Jul 2020 11:49:45 +0200
-Subject: [PATCH 4/4] ARM: dts: bcm2838: add upstream property to enable PCIe
- spread-spectrum
-
-Add the upstream device tree property brcm,enable-ssc to enable
-spread-spectrum for PCIe. This is used by the upstream U-Boot.
-
-Signed-off-by: Stefan Agner <stefan@agner.ch>
----
- arch/arm/boot/dts/bcm2838.dtsi | 13 ++++++++-----
- 1 file changed, 8 insertions(+), 5 deletions(-)
-
-diff --git a/arch/arm/boot/dts/bcm2838.dtsi b/arch/arm/boot/dts/bcm2838.dtsi
-index 36d250d7053b..d6cc876bc720 100644
---- a/arch/arm/boot/dts/bcm2838.dtsi
-+++ b/arch/arm/boot/dts/bcm2838.dtsi
-@@ -353,11 +353,14 @@
- 			 */
- 			ranges = <0x02000000 0x0 0xf8000000  0x6 0x00000000
- 				  0x0 0x04000000>;
--			/* Map inbound accesses from pci:0x0_00000000..ffffffff
--			 * to scb:0x0_00000000-ffffffff
--			 */
--			dma-ranges = <0x02000000 0x0 0x00000000  0x0 0x00000000
--				      0x1 0x00000000>;
-+                        /*
-+                         * The wrapper around the PCIe block has a bug
-+                         * preventing it from accessing beyond the first 3GB of
-+                         * memory.
-+                         */
-+                        dma-ranges = <0x02000000 0x0 0x00000000 0x0 0x00000000
-+                                      0x0 0xc0000000>;
-+			brcm,enable-ssc;
- 			status = "okay";
- 		};
- 
--- 
-2.27.0
-

buildroot-external/board/raspberrypi/patches/linux/0004-dt-bindings-reset-Add-a-binding-for-the-RPi-Firmware.patch

@@ -0,0 +1,83 @@
+From 33743cfcff296b1011e46168ecab185a00e0f00d Mon Sep 17 00:00:00 2001
+Message-Id: <33743cfcff296b1011e46168ecab185a00e0f00d.1604762912.git.stefan@agner.ch>
+In-Reply-To: <3651b4af52d63d4e37f40c7a6d0809b0a6c9dd73.1604762912.git.stefan@agner.ch>
+References: <3651b4af52d63d4e37f40c7a6d0809b0a6c9dd73.1604762912.git.stefan@agner.ch>
+From: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
+Date: Mon, 29 Jun 2020 18:18:37 +0200
+Subject: [PATCH 4/8] dt-bindings: reset: Add a binding for the RPi Firmware
+ reset controller
+
+The firmware running on the RPi VideoCore can be used to reset and
+initialize HW controlled by the firmware.
+
+Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
+Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
+Link: https://lore.kernel.org/r/20200629161845.6021-2-nsaenzjulienne@suse.de
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+(cherry picked from commit 242841992ae6f22bd761add2f380b2ef3271ba9a)
+---
+ .../arm/bcm/raspberrypi,bcm2835-firmware.yaml | 21 +++++++++++++++++++
+ .../reset/raspberrypi,firmware-reset.h        | 13 ++++++++++++
+ 2 files changed, 34 insertions(+)
+ create mode 100644 include/dt-bindings/reset/raspberrypi,firmware-reset.h
+
+diff --git a/Documentation/devicetree/bindings/arm/bcm/raspberrypi,bcm2835-firmware.yaml b/Documentation/devicetree/bindings/arm/bcm/raspberrypi,bcm2835-firmware.yaml
+index 17e4f20c8d39..c78499a41c72 100644
+--- a/Documentation/devicetree/bindings/arm/bcm/raspberrypi,bcm2835-firmware.yaml
++++ b/Documentation/devicetree/bindings/arm/bcm/raspberrypi,bcm2835-firmware.yaml
+@@ -48,6 +48,22 @@ properties:
+       - compatible
+       - "#clock-cells"
+ 
++  reset:
++    type: object
++
++    properties:
++      compatible:
++        const: raspberrypi,firmware-reset
++
++      "#reset-cells":
++        const: 1
++        description: >
++          The argument is the ID of the firmware reset line to affect.
++
++    required:
++      - compatible
++      - "#reset-cells"
++
+     additionalProperties: false
+ 
+ required:
+@@ -64,5 +80,10 @@ examples:
+             compatible = "raspberrypi,firmware-clocks";
+             #clock-cells = <1>;
+         };
++
++        reset: reset {
++            compatible = "raspberrypi,firmware-reset";
++            #reset-cells = <1>;
++        };
+     };
+ ...
+diff --git a/include/dt-bindings/reset/raspberrypi,firmware-reset.h b/include/dt-bindings/reset/raspberrypi,firmware-reset.h
+new file mode 100644
+index 000000000000..1a4f4c792723
+--- /dev/null
++++ b/include/dt-bindings/reset/raspberrypi,firmware-reset.h
+@@ -0,0 +1,13 @@
++/* SPDX-License-Identifier: GPL-2.0 */
++/*
++ * Copyright (c) 2020 Nicolas Saenz Julienne
++ * Author: Nicolas Saenz Julienne <nsaenzjulienne@suse.com>
++ */
++
++#ifndef _DT_BINDINGS_RASPBERRYPI_FIRMWARE_RESET_H
++#define _DT_BINDINGS_RASPBERRYPI_FIRMWARE_RESET_H
++
++#define RASPBERRYPI_FIRMWARE_RESET_ID_USB	0
++#define RASPBERRYPI_FIRMWARE_RESET_NUM_IDS	1
++
++#endif
+-- 
+2.29.1
+

buildroot-external/board/raspberrypi/patches/linux/0005-ARM-dts-bcm2711-Add-firmware-usb-reset-node.patch

@@ -1,28 +1,29 @@
-From b15414057bc9a023fc865242f499807d82933e58 Mon Sep 17 00:00:00 2001
-Message-Id: <b15414057bc9a023fc865242f499807d82933e58.1595152741.git.stefan@agner.ch>
-In-Reply-To: <a9f92163e6c07e5c6f57f00f4931098e0e1ee826.1595152741.git.stefan@agner.ch>
-References: <a9f92163e6c07e5c6f57f00f4931098e0e1ee826.1595152741.git.stefan@agner.ch>
+From fecb02cc3664de0d1c43ce566ff95c1b68fca51e Mon Sep 17 00:00:00 2001
+Message-Id: <fecb02cc3664de0d1c43ce566ff95c1b68fca51e.1604762912.git.stefan@agner.ch>
+In-Reply-To: <3651b4af52d63d4e37f40c7a6d0809b0a6c9dd73.1604762912.git.stefan@agner.ch>
+References: <3651b4af52d63d4e37f40c7a6d0809b0a6c9dd73.1604762912.git.stefan@agner.ch>
 From: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
 Date: Mon, 29 Jun 2020 18:18:39 +0200
-Subject: [PATCH 2/4] ARM: dts: bcm2711: Add firmware usb reset node
+Subject: [PATCH 5/8] ARM: dts: bcm2711: Add firmware usb reset node
 
 Now that the reset driver exposing Raspberry Pi 4's firmware based USB
 reset routine is available, let's add the device tree node exposing it.
 
-Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
 Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
-[backport for RPi 4.19 kernel]
-Signed-off-by: Stefan Agner <stefan@agner.ch>
+Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
+Link: https://lore.kernel.org/r/20200629161845.6021-4-nsaenzjulienne@suse.de
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+(cherry picked from commit b03300db06bed1997a1eecc4c26f3a2895c57726)
 ---
  arch/arm/boot/dts/bcm2711-rpi-4-b.dts | 5 +++++
  1 file changed, 5 insertions(+)
 
 diff --git a/arch/arm/boot/dts/bcm2711-rpi-4-b.dts b/arch/arm/boot/dts/bcm2711-rpi-4-b.dts
-index 42259dbf3919..ec0b3bb64de8 100644
+index 21b20e334b1a..d77d61d41bbc 100644
 --- a/arch/arm/boot/dts/bcm2711-rpi-4-b.dts
 +++ b/arch/arm/boot/dts/bcm2711-rpi-4-b.dts
-@@ -80,6 +80,11 @@
- 				  "";
+@@ -72,6 +72,11 @@
+ 				  "SD_OC_N";
  		status = "okay";
  	};
 +
@@ -32,7 +33,7 @@ index 42259dbf3919..ec0b3bb64de8 100644
 +	};
  };
  
- &uart0 {
+ &gpio {
 -- 
-2.27.0
+2.29.1
 

buildroot-external/board/raspberrypi/patches/linux/0006-ARM-dts-bcm2711-Add-reset-controller-to-xHCI-node.patch

@@ -1,41 +1,43 @@
-From 08558575c0f3d1437994590ad418d6c2cf18d96b Mon Sep 17 00:00:00 2001
-Message-Id: <08558575c0f3d1437994590ad418d6c2cf18d96b.1595152741.git.stefan@agner.ch>
-In-Reply-To: <a9f92163e6c07e5c6f57f00f4931098e0e1ee826.1595152741.git.stefan@agner.ch>
-References: <a9f92163e6c07e5c6f57f00f4931098e0e1ee826.1595152741.git.stefan@agner.ch>
+From e0231cd65d8c13be1cebae1e6b5fbef61be6be0d Mon Sep 17 00:00:00 2001
+Message-Id: <e0231cd65d8c13be1cebae1e6b5fbef61be6be0d.1604762912.git.stefan@agner.ch>
+In-Reply-To: <3651b4af52d63d4e37f40c7a6d0809b0a6c9dd73.1604762912.git.stefan@agner.ch>
+References: <3651b4af52d63d4e37f40c7a6d0809b0a6c9dd73.1604762912.git.stefan@agner.ch>
 From: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
 Date: Mon, 29 Jun 2020 18:18:40 +0200
-Subject: [PATCH 3/4] ARM: dts: bcm2711: Add reset controller to xHCI node
+Subject: [PATCH 6/8] ARM: dts: bcm2711: Add reset controller to xHCI node
 
 The chip is hardwired to the board's PCIe bus and needs to be properly
 setup trough a firmware routine after a PCI fundamental reset. Pass the
 reset controller phandle that takes care of triggering the
 initialization to the relevant PCI device.
 
+Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
 Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
-[backport for RPi 4.19 kernel]
-Signed-off-by: Stefan Agner <stefan@agner.ch>
+Link: https://lore.kernel.org/r/20200629161845.6021-5-nsaenzjulienne@suse.de
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+(cherry picked from commit 258f92d2f840b6ea62c0b33f04eb4d9270935bba)
 ---
  arch/arm/boot/dts/bcm2711-rpi-4-b.dts | 17 +++++++++++++++++
  1 file changed, 17 insertions(+)
 
 diff --git a/arch/arm/boot/dts/bcm2711-rpi-4-b.dts b/arch/arm/boot/dts/bcm2711-rpi-4-b.dts
-index ec0b3bb64de8..2c6aa1933600 100644
+index d77d61d41bbc..513cae21e64c 100644
 --- a/arch/arm/boot/dts/bcm2711-rpi-4-b.dts
 +++ b/arch/arm/boot/dts/bcm2711-rpi-4-b.dts
-@@ -4,6 +4,8 @@
- #include "bcm2711-rpi.dtsi"
- #include "bcm283x-rpi-csi1-2lane.dtsi"
+@@ -3,6 +3,8 @@
+ #include "bcm2711.dtsi"
+ #include "bcm2835-rpi.dtsi"
  
 +#include <dt-bindings/reset/raspberrypi,firmware-reset.h>
 +
  / {
  	compatible = "raspberrypi,4-model-b", "brcm,bcm2711";
  	model = "Raspberry Pi 4 Model B";
-@@ -87,6 +89,21 @@
+@@ -195,6 +197,21 @@
  	};
  };
  
-+&pcie_0 {
++&pcie0 {
 +	pci@1,0 {
 +		#address-cells = <3>;
 +		#size-cells = <2>;
@@ -50,9 +52,9 @@ index ec0b3bb64de8..2c6aa1933600 100644
 +	};
 +};
 +
+ /* uart0 communicates with the BT module */
  &uart0 {
  	pinctrl-names = "default";
- 	pinctrl-0 = <&uart0_pins &bt_pins>;
 -- 
-2.27.0
+2.29.1
 

buildroot-external/board/raspberrypi/patches/linux/0007-mm-zsmalloc-include-sparsemem.h-for-MAX_PHYSMEM_BITS.patch

@@ -0,0 +1,76 @@
+From 635706b878ef1263c4d495947a51c70c88707bbf Mon Sep 17 00:00:00 2001
+Message-Id: <635706b878ef1263c4d495947a51c70c88707bbf.1604762912.git.stefan@agner.ch>
+In-Reply-To: <3651b4af52d63d4e37f40c7a6d0809b0a6c9dd73.1604762912.git.stefan@agner.ch>
+References: <3651b4af52d63d4e37f40c7a6d0809b0a6c9dd73.1604762912.git.stefan@agner.ch>
+From: Stefan Agner <stefan@agner.ch>
+Date: Sat, 7 Nov 2020 16:00:09 +0100
+Subject: [PATCH 7/8] mm/zsmalloc: include sparsemem.h for MAX_PHYSMEM_BITS
+
+Most architectures define MAX_PHYSMEM_BITS in asm/sparsemem.h and don't
+include it in asm/pgtable.h. Include asm/sparsemem.h directly to get
+the MAX_PHYSMEM_BITS define on all architectures.
+
+This fixes a crash when accessing zram on 32-bit ARM platform with LPAE and
+more than 4GB of memory:
+  Unable to handle kernel NULL pointer dereference at virtual address 00000000
+  pgd = a27bd01c
+  [00000000] *pgd=236a0003, *pmd=1ffa64003
+  Internal error: Oops: 207 [#1] SMP ARM
+  Modules linked in: mdio_bcm_unimac(+) brcmfmac cfg80211 brcmutil raspberrypi_hwmon hci_uart crc32_arm_ce bcm2711_thermal phy_generic genet
+  CPU: 0 PID: 123 Comm: mkfs.ext4 Not tainted 5.9.6 #1
+  Hardware name: BCM2711
+  PC is at zs_map_object+0x94/0x338
+  LR is at zram_bvec_rw.constprop.0+0x330/0xa64
+  pc : [<c0602b38>]    lr : [<c0bda6a0>]    psr: 60000013
+  sp : e376bbe0  ip : 00000000  fp : c1e2921c
+  r10: 00000002  r9 : c1dda730  r8 : 00000000
+  r7 : e8ff7a00  r6 : 00000000  r5 : 02f9ffa0  r4 : e3710000
+  r3 : 000fdffe  r2 : c1e0ce80  r1 : ebf979a0  r0 : 00000000
+  Flags: nZCv  IRQs on  FIQs on  Mode SVC_32  ISA ARM  Segment user
+  Control: 30c5383d  Table: 235c2a80  DAC: fffffffd
+  Process mkfs.ext4 (pid: 123, stack limit = 0x495a22e6)
+  Stack: (0xe376bbe0 to 0xe376c000)
+  ...
+  [<c0602b38>] (zs_map_object) from [<c0bda6a0>] (zram_bvec_rw.constprop.0+0x330/0xa64)
+  [<c0bda6a0>] (zram_bvec_rw.constprop.0) from [<c0bdaf78>] (zram_submit_bio+0x1a4/0x40c)
+  [<c0bdaf78>] (zram_submit_bio) from [<c085806c>] (submit_bio_noacct+0xd0/0x3c8)
+  [<c085806c>] (submit_bio_noacct) from [<c08583b0>] (submit_bio+0x4c/0x190)
+  [<c08583b0>] (submit_bio) from [<c06496b4>] (submit_bh_wbc+0x188/0x1b8)
+  [<c06496b4>] (submit_bh_wbc) from [<c064ce98>] (__block_write_full_page+0x340/0x5e4)
+  [<c064ce98>] (__block_write_full_page) from [<c064d3ec>] (block_write_full_page+0x128/0x170)
+  [<c064d3ec>] (block_write_full_page) from [<c0591ae8>] (__writepage+0x14/0x68)
+  [<c0591ae8>] (__writepage) from [<c0593efc>] (write_cache_pages+0x1bc/0x494)
+  [<c0593efc>] (write_cache_pages) from [<c059422c>] (generic_writepages+0x58/0x8c)
+  [<c059422c>] (generic_writepages) from [<c0594c24>] (do_writepages+0x48/0xec)
+  [<c0594c24>] (do_writepages) from [<c0589330>] (__filemap_fdatawrite_range+0xf0/0x128)
+  [<c0589330>] (__filemap_fdatawrite_range) from [<c05894bc>] (file_write_and_wait_range+0x48/0x98)
+  [<c05894bc>] (file_write_and_wait_range) from [<c064f3f8>] (blkdev_fsync+0x1c/0x44)
+  [<c064f3f8>] (blkdev_fsync) from [<c064408c>] (do_fsync+0x3c/0x70)
+  [<c064408c>] (do_fsync) from [<c0400374>] (__sys_trace_return+0x0/0x2c)
+  Exception stack(0xe376bfa8 to 0xe376bff0)
+  bfa0:                   0003d2e0 b6f7b6f0 00000003 00046e40 00001000 00000000
+  bfc0: 0003d2e0 b6f7b6f0 00000000 00000076 00000000 00000000 befcbb20 befcbb28
+  bfe0: b6f4e060 befcbad8 b6f23e0c b6dc4a80
+  Code: e5927000 e0050391 e0871005 e5918018 (e5983000)
+
+Fixes: 61989a80fb3a ("staging: zsmalloc: zsmalloc memory allocation library")
+Signed-off-by: Stefan Agner <stefan@agner.ch>
+---
+ mm/zsmalloc.c | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/mm/zsmalloc.c b/mm/zsmalloc.c
+index 22d17ecfe7df..b815c39dda19 100644
+--- a/mm/zsmalloc.c
++++ b/mm/zsmalloc.c
+@@ -39,6 +39,7 @@
+ #include <linux/highmem.h>
+ #include <linux/string.h>
+ #include <linux/slab.h>
++#include <asm/sparsemem.h>
+ #include <asm/tlbflush.h>
+ #include <asm/pgtable.h>
+ #include <linux/cpumask.h>
+-- 
+2.29.1
+

buildroot-external/board/raspberrypi/patches/linux/0008-ARM-dts-bcm283x-add-compatible-picked-up-by-U-Boot.patch

@@ -0,0 +1,76 @@
+From df50ba2a4538ce9a43d28c2a9ef56377b7bad59f Mon Sep 17 00:00:00 2001
+Message-Id: <df50ba2a4538ce9a43d28c2a9ef56377b7bad59f.1605026982.git.stefan@agner.ch>
+In-Reply-To: <3651b4af52d63d4e37f40c7a6d0809b0a6c9dd73.1605026982.git.stefan@agner.ch>
+References: <3651b4af52d63d4e37f40c7a6d0809b0a6c9dd73.1605026982.git.stefan@agner.ch>
+From: Pascal Vizeli <pvizeli@syshack.ch>
+Date: Tue, 2 Jun 2020 21:20:08 +0000
+Subject: [PATCH 8/8] ARM: dts: bcm283x: add compatible picked up by U-Boot
+
+Without brcm,bcm2835-pl011 in compatible U-Boot uses the regular PL011
+driver which seems to crash when enable_uart=1 is not used. Using
+brcm,bcm2835-pl011 works around that and does not affect Linux since its
+not using that compatible string.
+
+Signed-off-by: Pascal Vizeli <pvizeli@syshack.ch>
+Signed-off-by: Stefan Agner <stefan@agner.ch>
+---
+ arch/arm/boot/dts/bcm2711.dtsi | 8 ++++----
+ arch/arm/boot/dts/bcm283x.dtsi | 2 +-
+ 2 files changed, 5 insertions(+), 5 deletions(-)
+
+diff --git a/arch/arm/boot/dts/bcm2711.dtsi b/arch/arm/boot/dts/bcm2711.dtsi
+index 4f87bb4fd3d1..12f0d90e8957 100644
+--- a/arch/arm/boot/dts/bcm2711.dtsi
++++ b/arch/arm/boot/dts/bcm2711.dtsi
+@@ -110,7 +110,7 @@
+ 		};
+ 
+ 		uart2: serial@7e201400 {
+-			compatible = "arm,pl011", "arm,primecell";
++			compatible = "brcm,bcm2835-pl011", "arm,pl011", "arm,primecell";
+ 			reg = <0x7e201400 0x200>;
+ 			interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
+ 			clocks = <&clocks BCM2835_CLOCK_UART>,
+@@ -121,7 +121,7 @@
+ 		};
+ 
+ 		uart3: serial@7e201600 {
+-			compatible = "arm,pl011", "arm,primecell";
++			compatible = "brcm,bcm2835-pl011", "arm,pl011", "arm,primecell";
+ 			reg = <0x7e201600 0x200>;
+ 			interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
+ 			clocks = <&clocks BCM2835_CLOCK_UART>,
+@@ -132,7 +132,7 @@
+ 		};
+ 
+ 		uart4: serial@7e201800 {
+-			compatible = "arm,pl011", "arm,primecell";
++			compatible = "brcm,bcm2835-pl011", "arm,pl011", "arm,primecell";
+ 			reg = <0x7e201800 0x200>;
+ 			interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
+ 			clocks = <&clocks BCM2835_CLOCK_UART>,
+@@ -143,7 +143,7 @@
+ 		};
+ 
+ 		uart5: serial@7e201a00 {
+-			compatible = "arm,pl011", "arm,primecell";
++			compatible = "brcm,bcm2835-pl011", "arm,pl011", "arm,primecell";
+ 			reg = <0x7e201a00 0x200>;
+ 			interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
+ 			clocks = <&clocks BCM2835_CLOCK_UART>,
+diff --git a/arch/arm/boot/dts/bcm283x.dtsi b/arch/arm/boot/dts/bcm283x.dtsi
+index 4426f9e6ba92..abcf677fe416 100644
+--- a/arch/arm/boot/dts/bcm283x.dtsi
++++ b/arch/arm/boot/dts/bcm283x.dtsi
+@@ -306,7 +306,7 @@
+ 		};
+ 
+ 		uart0: serial@7e201000 {
+-			compatible = "arm,pl011", "arm,primecell";
++			compatible = "brcm,bcm2835-pl011", "arm,pl011", "arm,primecell";
+ 			reg = <0x7e201000 0x200>;
+ 			interrupts = <2 25>;
+ 			clocks = <&clocks BCM2835_CLOCK_UART>,
+-- 
+2.29.1
+

buildroot-external/board/raspberrypi/patches/uboot/0001-rpi-Use-CONFIG_OF_BOARD-instead-of-CONFIG_EMBED.patch

@@ -1,7 +1,8 @@
-From 0f45c3f2f46b62f767ef225b258f927ad88ca360 Mon Sep 17 00:00:00 2001
+From a04331a6ba7334282836bbaa76e979c4e6be3900 Mon Sep 17 00:00:00 2001
+Message-Id: <a04331a6ba7334282836bbaa76e979c4e6be3900.1602102849.git.stefan@agner.ch>
 From: Pascal Vizeli <pvizeli@syshack.ch>
 Date: Tue, 10 Dec 2019 09:48:46 +0000
-Subject: [PATCH 1/1] rpi: Use CONFIG_OF_BOARD instead of CONFIG_EMBED
+Subject: [PATCH 1/2] rpi: Use CONFIG_OF_BOARD instead of CONFIG_EMBED
 
 Signed-off-by: Pascal Vizeli <pvizeli@syshack.ch>
 ---
@@ -13,7 +14,7 @@ Signed-off-by: Pascal Vizeli <pvizeli@syshack.ch>
  5 files changed, 5 insertions(+), 5 deletions(-)
 
 diff --git a/configs/rpi_0_w_defconfig b/configs/rpi_0_w_defconfig
-index fe5a7763a6..ed7f9381e9 100644
+index bba5e12b12..0241f4c6d3 100644
 --- a/configs/rpi_0_w_defconfig
 +++ b/configs/rpi_0_w_defconfig
 @@ -17,7 +17,7 @@ CONFIG_CMD_GPIO=y
@@ -22,11 +23,11 @@ index fe5a7763a6..ed7f9381e9 100644
  CONFIG_CMD_FS_UUID=y
 -CONFIG_OF_EMBED=y
 +CONFIG_OF_BOARD=y
- CONFIG_DEFAULT_DEVICE_TREE="bcm2835-rpi-zero-w"
- CONFIG_ENV_FAT_INTERFACE="mmc"
  CONFIG_ENV_FAT_DEVICE_AND_PART="0:1"
+ CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+ CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
 diff --git a/configs/rpi_2_defconfig b/configs/rpi_2_defconfig
-index bf331c0ad0..52e3c3b234 100644
+index 1c2bbb29ce..9573e475f4 100644
 --- a/configs/rpi_2_defconfig
 +++ b/configs/rpi_2_defconfig
 @@ -17,7 +17,7 @@ CONFIG_CMD_GPIO=y
@@ -35,11 +36,11 @@ index bf331c0ad0..52e3c3b234 100644
  CONFIG_CMD_FS_UUID=y
 -CONFIG_OF_EMBED=y
 +CONFIG_OF_BOARD=y
- CONFIG_DEFAULT_DEVICE_TREE="bcm2836-rpi-2-b"
- CONFIG_ENV_FAT_INTERFACE="mmc"
  CONFIG_ENV_FAT_DEVICE_AND_PART="0:1"
+ CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+ CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
 diff --git a/configs/rpi_3_32b_defconfig b/configs/rpi_3_32b_defconfig
-index c2417a0ec9..191962f0f7 100644
+index b8a3d17f43..252df994e6 100644
 --- a/configs/rpi_3_32b_defconfig
 +++ b/configs/rpi_3_32b_defconfig
 @@ -18,7 +18,7 @@ CONFIG_CMD_GPIO=y
@@ -48,11 +49,11 @@ index c2417a0ec9..191962f0f7 100644
  CONFIG_CMD_FS_UUID=y
 -CONFIG_OF_EMBED=y
 +CONFIG_OF_BOARD=y
- CONFIG_DEFAULT_DEVICE_TREE="bcm2837-rpi-3-b"
- CONFIG_ENV_FAT_INTERFACE="mmc"
  CONFIG_ENV_FAT_DEVICE_AND_PART="0:1"
+ CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+ CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
 diff --git a/configs/rpi_3_defconfig b/configs/rpi_3_defconfig
-index 4fa682539c..03a2356d3d 100644
+index 9b281a4f15..1e9ee6122e 100644
 --- a/configs/rpi_3_defconfig
 +++ b/configs/rpi_3_defconfig
 @@ -18,7 +18,7 @@ CONFIG_CMD_GPIO=y
@@ -61,11 +62,11 @@ index 4fa682539c..03a2356d3d 100644
  CONFIG_CMD_FS_UUID=y
 -CONFIG_OF_EMBED=y
 +CONFIG_OF_BOARD=y
- CONFIG_DEFAULT_DEVICE_TREE="bcm2837-rpi-3-b"
- CONFIG_ENV_FAT_INTERFACE="mmc"
  CONFIG_ENV_FAT_DEVICE_AND_PART="0:1"
+ CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+ CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
 diff --git a/configs/rpi_defconfig b/configs/rpi_defconfig
-index 2c04b3334e..bf00d8b669 100644
+index b5ad53c37b..223fc03275 100644
 --- a/configs/rpi_defconfig
 +++ b/configs/rpi_defconfig
 @@ -17,7 +17,7 @@ CONFIG_CMD_GPIO=y
@@ -74,8 +75,9 @@ index 2c04b3334e..bf00d8b669 100644
  CONFIG_CMD_FS_UUID=y
 -CONFIG_OF_EMBED=y
 +CONFIG_OF_BOARD=y
- CONFIG_DEFAULT_DEVICE_TREE="bcm2835-rpi-b"
- CONFIG_ENV_FAT_INTERFACE="mmc"
  CONFIG_ENV_FAT_DEVICE_AND_PART="0:1"
+ CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+ CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
 -- 
-2.17.1
+2.28.0
+

buildroot-external/board/raspberrypi/patches/uboot/0002-avoid-block-uart-write.patch

@@ -1,49 +0,0 @@
-From 5e960cc9b208c53d5385d5a2f6c7f380e9499d4c Mon Sep 17 00:00:00 2001
-From: Alexandru Costache <alexandru@balena.io>
-Date: Wed, 18 Mar 2020 16:54:28 +0100
-Subject: [PATCH] Add a retry limit when writing to uart console
-
-Seems that if the serial console is incorrectly
-configured in the dtb, writing to it may block indefinitely,
-thus preventing the board from booting.
-
-Let's add a retry count to unblock in such cases.
-
-Upstream-status: Inappropriate [configuration]
-Signed-off-by: Alexandru Costache <alexandru@balena.io>
----
- drivers/serial/serial_bcm283x_mu.c | 12 +++++++++---
- 1 file changed, 9 insertions(+), 3 deletions(-)
-
-diff --git a/drivers/serial/serial_bcm283x_mu.c b/drivers/serial/serial_bcm283x_mu.c
-index bd1d89ec83..bd033d14c4 100644
---- a/drivers/serial/serial_bcm283x_mu.c
-+++ b/drivers/serial/serial_bcm283x_mu.c
-@@ -49,7 +49,7 @@ struct bcm283x_mu_regs {
- struct bcm283x_mu_priv {
- 	struct bcm283x_mu_regs *regs;
- };
--
-+static uint16_t putc_retry = 0;
- static int bcm283x_mu_serial_getc(struct udevice *dev);
- 
- static int bcm283x_mu_serial_setbrg(struct udevice *dev, int baudrate)
-@@ -105,8 +105,14 @@ static int bcm283x_mu_serial_putc(struct udevice *dev, const char data)
- 	struct bcm283x_mu_regs *regs = priv->regs;
- 
- 	/* Wait until there is space in the FIFO */
--	if (!(readl(&regs->lsr) & BCM283X_MU_LSR_TX_EMPTY))
--		return -EAGAIN;
-+	if (!(readl(&regs->lsr) & BCM283X_MU_LSR_TX_EMPTY)) {
-+		if (++putc_retry) {
-+			return -EAGAIN;
-+		} else {
-+			/* Couldn't write for too long, drop char */
-+			return 0;
-+		}
-+	}
- 
- 	/* Send the character */
- 	writel(data, &regs->io);
--- 
-2.17.1

buildroot-external/board/raspberrypi/patches/uboot/0002-raspberrypi-Disable-simple-framebuffer-support.patch

@@ -1,7 +1,10 @@
-From 68e65b1e3859d4baf41d1e5f6525ff7ace778ba1 Mon Sep 17 00:00:00 2001
+From cc40a554b003df9b07f8a55f69a94d7393d81cbc Mon Sep 17 00:00:00 2001
+Message-Id: <cc40a554b003df9b07f8a55f69a94d7393d81cbc.1602102849.git.stefan@agner.ch>
+In-Reply-To: <a04331a6ba7334282836bbaa76e979c4e6be3900.1602102849.git.stefan@agner.ch>
+References: <a04331a6ba7334282836bbaa76e979c4e6be3900.1602102849.git.stefan@agner.ch>
 From: Florin Sarbu <florin@balena.io>
 Date: Thu, 12 Sep 2019 12:31:31 +0200
-Subject: [PATCH] raspberrypi: Disable simple framebuffer support
+Subject: [PATCH 2/2] raspberrypi: Disable simple framebuffer support
 
 On 4.19 kernels this u-boot driver clashes with bcm2708_fb.
 So let's disable it from here so that we have bcm2708_fb
@@ -17,10 +20,10 @@ Signed-off-by: Florin Sarbu <florin@balena.io>
  3 files changed, 4 insertions(+), 4 deletions(-)
 
 diff --git a/board/raspberrypi/rpi/rpi.c b/board/raspberrypi/rpi/rpi.c
-index 153a1fd..c7bd399 100644
+index 6b1fa5fc14..5cfee7c00a 100644
 --- a/board/raspberrypi/rpi/rpi.c
 +++ b/board/raspberrypi/rpi/rpi.c
-@@ -482,7 +482,7 @@ int ft_board_setup(void *blob, bd_t *bd)
+@@ -485,7 +485,7 @@ int ft_board_setup(void *blob, struct bd_info *bd)
  	 * should be more intelligent, and e.g. only do this if no enabled DT
  	 * node exists for the "real" graphics driver.
  	 */
@@ -30,7 +33,7 @@ index 153a1fd..c7bd399 100644
  #ifdef CONFIG_EFI_LOADER
  	/* Reserve the spin table */
 diff --git a/common/Makefile b/common/Makefile
-index 0de60b3..2848d98 100644
+index 2e7a090588..b3985cc04d 100644
 --- a/common/Makefile
 +++ b/common/Makefile
 @@ -50,7 +50,7 @@ ifndef CONFIG_DM_VIDEO
@@ -43,10 +46,10 @@ index 0de60b3..2848d98 100644
  obj-$(CONFIG_MENU) += menu.o
  obj-$(CONFIG_UPDATE_TFTP) += update.o
 diff --git a/include/configs/rpi.h b/include/configs/rpi.h
-index a38bf20..e2760b0 100644
+index 834f1cd236..19a0d611c4 100644
 --- a/include/configs/rpi.h
 +++ b/include/configs/rpi.h
-@@ -60,8 +60,8 @@
+@@ -65,8 +65,8 @@
  /* GPIO */
  #define CONFIG_BCM2835_GPIO
  /* LCD */
@@ -58,5 +61,5 @@ index a38bf20..e2760b0 100644
  #ifdef CONFIG_CMD_USB
  #define CONFIG_TFTP_TSIZE
 -- 
-2.7.4
+2.28.0
 

buildroot-external/board/raspberrypi/rootfs-overlay/usr/lib/udev/rules.d/99-com.rules

@@ -1,4 +1,5 @@
-KERNEL=="ttyAMA[01]", PROGRAM="/bin/sh -c '\
+
+KERNEL=="ttyAMA0", PROGRAM="/bin/sh -c '\
 	ALIASES=/proc/device-tree/aliases; \
 	if cmp -s $ALIASES/uart0 $ALIASES/serial0; then \
 		echo 0;\
@@ -9,6 +10,19 @@ KERNEL=="ttyAMA[01]", PROGRAM="/bin/sh -c '\
 	fi\
 '", SYMLINK+="serial%c"
 
+KERNEL=="ttyAMA1", PROGRAM="/bin/sh -c '\
+	ALIASES=/proc/device-tree/aliases; \
+	if [ -e /dev/ttyAMA0 ]; then \
+		exit 1; \
+	elif cmp -s $ALIASES/uart0 $ALIASES/serial0; then \
+		echo 0;\
+	elif cmp -s $ALIASES/uart0 $ALIASES/serial1; then \
+		echo 1; \
+	else \
+		exit 1; \
+	fi\
+'", SYMLINK+="serial%c"
+
 KERNEL=="ttyS0", PROGRAM="/bin/sh -c '\
 	ALIASES=/proc/device-tree/aliases; \
 	if cmp -s $ALIASES/uart1 $ALIASES/serial0; then \

buildroot-external/board/raspberrypi/uboot-boot.ush

@@ -18,7 +18,7 @@ test -n "${BOOT_A_LEFT}" || setenv BOOT_A_LEFT 3
 test -n "${BOOT_B_LEFT}" || setenv BOOT_B_LEFT 3
 
 # HassOS bootargs
-setenv bootargs_hassos "zram.enabled=1 zram.num_devices=3 apparmor=1 security=apparmor rootwait systemd.machine_id=${MACHINE_ID} cgroup_enable=memory"
+setenv bootargs_hassos "zram.enabled=1 zram.num_devices=3 apparmor=1 security=apparmor rootwait systemd.machine_id=${MACHINE_ID} cgroup_enable=memory fsck.repair=yes"
 
 # HassOS system A/B
 setenv bootargs_a "root=PARTUUID=8d3d53e3-6d49-4c38-8349-aff6859e82fd rootfstype=squashfs ro"

buildroot-external/board/raspberrypi/uboot-boot64.ush

@@ -18,7 +18,7 @@ test -n "${BOOT_A_LEFT}" || setenv BOOT_A_LEFT 3
 test -n "${BOOT_B_LEFT}" || setenv BOOT_B_LEFT 3
 
 # HassOS bootargs
-setenv bootargs_hassos "zram.enabled=1 zram.num_devices=3 apparmor=1 security=apparmor rootwait systemd.machine_id=${MACHINE_ID} cgroup_enable=memory"
+setenv bootargs_hassos "zram.enabled=1 zram.num_devices=3 apparmor=1 security=apparmor rootwait systemd.machine_id=${MACHINE_ID} cgroup_enable=memory fsck.repair=yes"
 
 # HassOS system A/B
 setenv bootargs_a "root=PARTUUID=8d3d53e3-6d49-4c38-8349-aff6859e82fd rootfstype=squashfs ro"

buildroot-external/configs/intel_nuc_defconfig

@@ -65,7 +65,7 @@ BR2_PACKAGE_DHCP=y
 BR2_PACKAGE_DHCP_CLIENT=y
 BR2_PACKAGE_WIREGUARD_LINUX_COMPAT=y
 BR2_PACKAGE_DROPBEAR=y
-# BR2_PACKAGE_DROPBEAR_CLIENT is not set
+BR2_PACKAGE_DROPBEAR_CLIENT=y
 # BR2_PACKAGE_IFUPDOWN_SCRIPTS is not set
 BR2_PACKAGE_NETWORK_MANAGER=y
 BR2_PACKAGE_TINI=y
@@ -104,5 +104,8 @@ BR2_PACKAGE_HOST_MTOOLS=y
 BR2_PACKAGE_HOST_RAUC=y
 BR2_PACKAGE_HASSIO=y
 BR2_PACKAGE_HASSIO_ARCH="amd64"
+BR2_PACKAGE_HASSIO_MACHINE="intel-nuc"
 BR2_PACKAGE_APPARMOR=y
 BR2_PACKAGE_INTEL_E1000E=y
+BR2_PACKAGE_DOSFSTOOLS=y
+BR2_PACKAGE_DOSFSTOOLS_FSCK_FAT=y

buildroot-external/configs/odroid_c2_defconfig

@@ -22,7 +22,7 @@ BR2_ROOTFS_POST_IMAGE_SCRIPT="$(BR2_EXTERNAL_HASSOS_PATH)/scripts/post-image.sh"
 BR2_ROOTFS_POST_SCRIPT_ARGS="$(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/odroid-c2 $(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/odroid-c2/hassos-hook.sh"
 BR2_LINUX_KERNEL=y
 BR2_LINUX_KERNEL_CUSTOM_VERSION=y
-BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="5.7.19"
+BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="5.9.6"
 BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y
 BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="$(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/kernel-amlogic.config"
 BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config"
@@ -57,7 +57,7 @@ BR2_PACKAGE_BLUEZ5_UTILS_DEPRECATED=y
 BR2_PACKAGE_DHCP=y
 BR2_PACKAGE_DHCP_CLIENT=y
 BR2_PACKAGE_DROPBEAR=y
-# BR2_PACKAGE_DROPBEAR_CLIENT is not set
+BR2_PACKAGE_DROPBEAR_CLIENT=y
 # BR2_PACKAGE_IFUPDOWN_SCRIPTS is not set
 BR2_PACKAGE_NETWORK_MANAGER=y
 BR2_PACKAGE_TINI=y
@@ -84,12 +84,12 @@ BR2_TARGET_ROOTFS_SQUASHFS4_LZ4=y
 BR2_TARGET_UBOOT=y
 BR2_TARGET_UBOOT_BUILD_SYSTEM_KCONFIG=y
 BR2_TARGET_UBOOT_CUSTOM_VERSION=y
-BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2020.01"
+BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2020.10"
 BR2_TARGET_UBOOT_BOARD_DEFCONFIG="odroid-c2"
 BR2_TARGET_UBOOT_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/bootloader/uboot.config $(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/odroid-c2/uboot.config"
 BR2_TARGET_UBOOT_BOOT_SCRIPT=y
 BR2_TARGET_UBOOT_BOOT_SCRIPT_SOURCE="$(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/odroid-c2/uboot-boot.ush"
-BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_5_7=y
+BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_5_4=y
 BR2_PACKAGE_HOST_DOSFSTOOLS=y
 BR2_PACKAGE_HOST_E2FSPROGS=y
 BR2_PACKAGE_HOST_GPTFDISK=y
@@ -97,6 +97,9 @@ BR2_PACKAGE_HOST_MTOOLS=y
 BR2_PACKAGE_HOST_RAUC=y
 BR2_PACKAGE_HASSIO=y
 BR2_PACKAGE_HASSIO_ARCH="aarch64"
+BR2_PACKAGE_HASSIO_MACHINE="odroid-c2"
 BR2_PACKAGE_APPARMOR=y
 BR2_PACKAGE_HARDKERNEL_BOOT=y
 BR2_PACKAGE_HARDKERNEL_BOOT_ODROID_C2=y
+BR2_PACKAGE_DOSFSTOOLS=y
+BR2_PACKAGE_DOSFSTOOLS_FSCK_FAT=y

buildroot-external/configs/odroid_c4_defconfig

@@ -0,0 +1,103 @@
+BR2_aarch64=y
+BR2_DL_DIR="/cache/dl"
+BR2_CCACHE=y
+BR2_CCACHE_DIR="/cache/cc"
+BR2_GLOBAL_PATCH_DIR="$(BR2_EXTERNAL_HASSOS_PATH)/patches $(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/patches $(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/odroid-c4/patches"
+BR2_TOOLCHAIN_BUILDROOT_GLIBC=y
+BR2_GCC_VERSION_9_X=y
+BR2_OPTIMIZE_2=y
+BR2_SSP_REGULAR=y
+BR2_SSP_OPTION="-fstack-protector"
+BR2_TOOLCHAIN_BUILDROOT_CXX=y
+BR2_BINUTILS_ENABLE_LTO=y
+BR2_GCC_ENABLE_LTO=y
+BR2_TARGET_GENERIC_HOSTNAME="homeassistant"
+BR2_TARGET_GENERIC_ISSUE="Welcome to Home Assistant"
+BR2_INIT_SYSTEMD=y
+BR2_TARGET_GENERIC_GETTY_PORT="tty1"
+# BR2_TARGET_GENERIC_REMOUNT_ROOTFS_RW is not set
+BR2_ROOTFS_OVERLAY="$(BR2_EXTERNAL_HASSOS_PATH)/rootfs-overlay"
+BR2_ROOTFS_POST_BUILD_SCRIPT="$(BR2_EXTERNAL_HASSOS_PATH)/scripts/post-build.sh"
+BR2_ROOTFS_POST_IMAGE_SCRIPT="$(BR2_EXTERNAL_HASSOS_PATH)/scripts/post-image.sh"
+BR2_ROOTFS_POST_SCRIPT_ARGS="$(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/odroid-c4 $(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/odroid-c4/hassos-hook.sh"
+BR2_LINUX_KERNEL=y
+BR2_LINUX_KERNEL_CUSTOM_VERSION=y
+BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="5.9.6"
+BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y
+BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="$(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/kernel-amlogic.config"
+BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config"
+BR2_LINUX_KERNEL_LZ4=y
+BR2_LINUX_KERNEL_DTS_SUPPORT=y
+BR2_LINUX_KERNEL_INTREE_DTS_NAME="amlogic/meson-sm1-odroid-c4"
+BR2_LINUX_KERNEL_NEEDS_HOST_OPENSSL=y
+BR2_LINUX_KERNEL_NEEDS_HOST_LIBELF=y
+BR2_PACKAGE_BUSYBOX_CONFIG="$(BR2_EXTERNAL_HASSOS_PATH)/busybox.config"
+BR2_PACKAGE_BUSYBOX_INDIVIDUAL_BINARIES=y
+BR2_PACKAGE_PROCPS_NG=y
+BR2_PACKAGE_JQ=y
+BR2_PACKAGE_E2FSPROGS=y
+BR2_PACKAGE_E2FSPROGS_RESIZE2FS=y
+BR2_PACKAGE_SQUASHFS=y
+BR2_PACKAGE_CRDA=y
+BR2_PACKAGE_GPTFDISK=y
+BR2_PACKAGE_GPTFDISK_SGDISK=y
+BR2_PACKAGE_UBOOT_TOOLS=y
+BR2_PACKAGE_CA_CERTIFICATES=y
+BR2_PACKAGE_LIBDNET=y
+BR2_PACKAGE_LIBCGROUP=y
+BR2_PACKAGE_LIBCGROUP_TOOLS=y
+BR2_PACKAGE_AVAHI=y
+# BR2_PACKAGE_AVAHI_AUTOIPD is not set
+BR2_PACKAGE_AVAHI_DAEMON=y
+BR2_PACKAGE_AVAHI_LIBDNSSD_COMPATIBILITY=y
+BR2_PACKAGE_NSS_MDNS=y
+BR2_PACKAGE_BLUEZ5_UTILS=y
+BR2_PACKAGE_BLUEZ5_UTILS_CLIENT=y
+BR2_PACKAGE_BLUEZ5_UTILS_DEPRECATED=y
+BR2_PACKAGE_DHCP=y
+BR2_PACKAGE_DHCP_CLIENT=y
+BR2_PACKAGE_DROPBEAR=y
+BR2_PACKAGE_DROPBEAR_CLIENT=y
+# BR2_PACKAGE_IFUPDOWN_SCRIPTS is not set
+BR2_PACKAGE_NETWORK_MANAGER=y
+BR2_PACKAGE_TINI=y
+BR2_PACKAGE_DOCKER_ENGINE=y
+BR2_PACKAGE_DOCKER_CLI=y
+BR2_PACKAGE_RAUC=y
+BR2_PACKAGE_RAUC_NETWORK=y
+BR2_PACKAGE_RNG_TOOLS=y
+# BR2_PACKAGE_SYSTEMD_HWDB is not set
+# BR2_PACKAGE_SYSTEMD_NETWORKD is not set
+BR2_PACKAGE_SYSTEMD_RANDOMSEED=y
+# BR2_PACKAGE_SYSTEMD_RESOLVED is not set
+BR2_PACKAGE_SYSTEMD_COREDUMP=y
+BR2_PACKAGE_SYSTEMD_LOGIND=y
+BR2_PACKAGE_UTIL_LINUX_PARTX=y
+BR2_PACKAGE_UTIL_LINUX_ZRAMCTL=y
+BR2_PACKAGE_UTIL_LINUX_LOGIN=y
+BR2_PACKAGE_UTIL_LINUX_NOLOGIN=y
+BR2_PACKAGE_USB_MODESWITCH=y
+BR2_PACKAGE_USB_MODESWITCH_DATA=y
+BR2_TARGET_ROOTFS_SQUASHFS=y
+BR2_TARGET_ROOTFS_SQUASHFS4_LZ4=y
+# BR2_TARGET_ROOTFS_TAR is not set
+BR2_TARGET_UBOOT=y
+BR2_TARGET_UBOOT_BUILD_SYSTEM_KCONFIG=y
+BR2_TARGET_UBOOT_CUSTOM_VERSION=y
+BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2020.10"
+BR2_TARGET_UBOOT_BOARD_DEFCONFIG="odroid-c4"
+BR2_TARGET_UBOOT_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/bootloader/uboot.config $(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/odroid-c4/uboot.config"
+BR2_TARGET_UBOOT_BOOT_SCRIPT=y
+BR2_TARGET_UBOOT_BOOT_SCRIPT_SOURCE="$(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/odroid-c4/uboot-boot.ush"
+BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_5_4=y
+BR2_PACKAGE_HOST_DOSFSTOOLS=y
+BR2_PACKAGE_HOST_E2FSPROGS=y
+BR2_PACKAGE_HOST_GPTFDISK=y
+BR2_PACKAGE_HOST_MTOOLS=y
+BR2_PACKAGE_HOST_RAUC=y
+BR2_PACKAGE_HASSIO=y
+BR2_PACKAGE_HASSIO_ARCH="aarch64"
+BR2_PACKAGE_HASSIO_MACHINE="odroid-c4"
+BR2_PACKAGE_APPARMOR=y
+BR2_PACKAGE_HARDKERNEL_BOOT=y
+BR2_PACKAGE_HARDKERNEL_BOOT_ODROID_C4=y

buildroot-external/configs/odroid_n2_defconfig

@@ -22,10 +22,10 @@ BR2_ROOTFS_POST_IMAGE_SCRIPT="$(BR2_EXTERNAL_HASSOS_PATH)/scripts/post-image.sh"
 BR2_ROOTFS_POST_SCRIPT_ARGS="$(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/odroid-n2 $(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/odroid-n2/hassos-hook.sh"
 BR2_LINUX_KERNEL=y
 BR2_LINUX_KERNEL_CUSTOM_VERSION=y
-BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="5.7.19"
+BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="5.9.6"
 BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y
 BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="$(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/kernel-amlogic.config"
-BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config"
+BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config $(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/odroid-n2/kernel.config"
 BR2_LINUX_KERNEL_LZ4=y
 BR2_LINUX_KERNEL_DTS_SUPPORT=y
 BR2_LINUX_KERNEL_INTREE_DTS_NAME="amlogic/meson-g12b-odroid-n2 amlogic/meson-g12b-odroid-n2-plus"
@@ -57,7 +57,7 @@ BR2_PACKAGE_BLUEZ5_UTILS_DEPRECATED=y
 BR2_PACKAGE_DHCP=y
 BR2_PACKAGE_DHCP_CLIENT=y
 BR2_PACKAGE_DROPBEAR=y
-# BR2_PACKAGE_DROPBEAR_CLIENT is not set
+BR2_PACKAGE_DROPBEAR_CLIENT=y
 # BR2_PACKAGE_IFUPDOWN_SCRIPTS is not set
 BR2_PACKAGE_NETWORK_MANAGER=y
 BR2_PACKAGE_TINI=y
@@ -84,12 +84,12 @@ BR2_TARGET_ROOTFS_SQUASHFS4_LZ4=y
 BR2_TARGET_UBOOT=y
 BR2_TARGET_UBOOT_BUILD_SYSTEM_KCONFIG=y
 BR2_TARGET_UBOOT_CUSTOM_VERSION=y
-BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2020.01"
+BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2020.10"
 BR2_TARGET_UBOOT_BOARD_DEFCONFIG="odroid-n2"
 BR2_TARGET_UBOOT_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/bootloader/uboot.config $(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/odroid-n2/uboot.config"
 BR2_TARGET_UBOOT_BOOT_SCRIPT=y
 BR2_TARGET_UBOOT_BOOT_SCRIPT_SOURCE="$(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/odroid-n2/uboot-boot.ush"
-BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_5_7=y
+BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_5_4=y
 BR2_PACKAGE_HOST_DOSFSTOOLS=y
 BR2_PACKAGE_HOST_E2FSPROGS=y
 BR2_PACKAGE_HOST_GPTFDISK=y
@@ -97,6 +97,9 @@ BR2_PACKAGE_HOST_MTOOLS=y
 BR2_PACKAGE_HOST_RAUC=y
 BR2_PACKAGE_HASSIO=y
 BR2_PACKAGE_HASSIO_ARCH="aarch64"
+BR2_PACKAGE_HASSIO_MACHINE="odroid-n2"
 BR2_PACKAGE_APPARMOR=y
 BR2_PACKAGE_HARDKERNEL_BOOT=y
 BR2_PACKAGE_HARDKERNEL_BOOT_ODROID_N2=y
+BR2_PACKAGE_DOSFSTOOLS=y
+BR2_PACKAGE_DOSFSTOOLS_FSCK_FAT=y

buildroot-external/configs/odroid_xu4_defconfig

@@ -23,7 +23,7 @@ BR2_ROOTFS_POST_IMAGE_SCRIPT="$(BR2_EXTERNAL_HASSOS_PATH)/scripts/post-image.sh"
 BR2_ROOTFS_POST_SCRIPT_ARGS="$(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/odroid-xu4 $(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/odroid-xu4/hassos-hook.sh"
 BR2_LINUX_KERNEL=y
 BR2_LINUX_KERNEL_CUSTOM_VERSION=y
-BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="5.7.19"
+BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="5.9.6"
 BR2_LINUX_KERNEL_DEFCONFIG="exynos"
 BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config"
 BR2_LINUX_KERNEL_LZ4=y
@@ -59,7 +59,7 @@ BR2_PACKAGE_BLUEZ5_UTILS_DEPRECATED=y
 BR2_PACKAGE_DHCP=y
 BR2_PACKAGE_DHCP_CLIENT=y
 BR2_PACKAGE_DROPBEAR=y
-# BR2_PACKAGE_DROPBEAR_CLIENT is not set
+BR2_PACKAGE_DROPBEAR_CLIENT=y
 # BR2_PACKAGE_IFUPDOWN_SCRIPTS is not set
 BR2_PACKAGE_NETWORK_MANAGER=y
 BR2_PACKAGE_TINI=y
@@ -86,14 +86,14 @@ BR2_TARGET_ROOTFS_SQUASHFS4_LZ4=y
 BR2_TARGET_UBOOT=y
 BR2_TARGET_UBOOT_BUILD_SYSTEM_KCONFIG=y
 BR2_TARGET_UBOOT_CUSTOM_VERSION=y
-BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2020.01"
+BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2020.10"
 BR2_TARGET_UBOOT_BOARD_DEFCONFIG="odroid-xu3"
 BR2_TARGET_UBOOT_NEEDS_DTC=y
 BR2_TARGET_UBOOT_FORMAT_DTB_BIN=y
 BR2_TARGET_UBOOT_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/bootloader/uboot.config $(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/odroid-xu4/uboot.config"
 BR2_TARGET_UBOOT_BOOT_SCRIPT=y
 BR2_TARGET_UBOOT_BOOT_SCRIPT_SOURCE="$(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/odroid-xu4/uboot-boot.ush"
-BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_5_7=y
+BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_5_4=y
 BR2_PACKAGE_HOST_DOSFSTOOLS=y
 BR2_PACKAGE_HOST_E2FSPROGS=y
 BR2_PACKAGE_HOST_GPTFDISK=y
@@ -101,6 +101,9 @@ BR2_PACKAGE_HOST_MTOOLS=y
 BR2_PACKAGE_HOST_RAUC=y
 BR2_PACKAGE_HASSIO=y
 BR2_PACKAGE_HASSIO_ARCH="armv7"
+BR2_PACKAGE_HASSIO_MACHINE="odroid-xu"
 BR2_PACKAGE_APPARMOR=y
 BR2_PACKAGE_HARDKERNEL_BOOT=y
 BR2_PACKAGE_HARDKERNEL_BOOT_ODROID_XU4=y
+BR2_PACKAGE_DOSFSTOOLS=y
+BR2_PACKAGE_DOSFSTOOLS_FSCK_FAT=y

buildroot-external/configs/ova_defconfig

@@ -55,7 +55,7 @@ BR2_PACKAGE_DHCP=y
 BR2_PACKAGE_DHCP_CLIENT=y
 BR2_PACKAGE_WIREGUARD_LINUX_COMPAT=y
 BR2_PACKAGE_DROPBEAR=y
-# BR2_PACKAGE_DROPBEAR_CLIENT is not set
+BR2_PACKAGE_DROPBEAR_CLIENT=y
 # BR2_PACKAGE_IFUPDOWN_SCRIPTS is not set
 BR2_PACKAGE_NETWORK_MANAGER=y
 BR2_PACKAGE_TINI=y
@@ -95,4 +95,7 @@ BR2_PACKAGE_HOST_MTOOLS=y
 BR2_PACKAGE_HOST_RAUC=y
 BR2_PACKAGE_HASSIO=y
 BR2_PACKAGE_HASSIO_ARCH="amd64"
+BR2_PACKAGE_HASSIO_MACHINE="qemux86-64"
 BR2_PACKAGE_APPARMOR=y
+BR2_PACKAGE_DOSFSTOOLS=y
+BR2_PACKAGE_DOSFSTOOLS_FSCK_FAT=y

buildroot-external/configs/rpi0_w_defconfig

@@ -24,7 +24,7 @@ BR2_ROOTFS_POST_IMAGE_SCRIPT="$(BR2_EXTERNAL_HASSOS_PATH)/scripts/post-image.sh"
 BR2_ROOTFS_POST_SCRIPT_ARGS="$(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/rpi0-w $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/hassos-hook.sh"
 BR2_LINUX_KERNEL=y
 BR2_LINUX_KERNEL_CUSTOM_TARBALL=y
-BR2_LINUX_KERNEL_CUSTOM_TARBALL_LOCATION="https://github.com/raspberrypi/linux/archive/cc39f1c9f82f6fe5a437836811d906c709e0661c.tar.gz"
+BR2_LINUX_KERNEL_CUSTOM_TARBALL_LOCATION="https://github.com/raspberrypi/linux/archive/2ae9829c3da54597a4701285f91985c4d08ee793.tar.gz"
 BR2_LINUX_KERNEL_DEFCONFIG="bcmrpi"
 BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/kernel.config"
 BR2_LINUX_KERNEL_LZ4=y
@@ -60,7 +60,7 @@ BR2_PACKAGE_DHCP=y
 BR2_PACKAGE_DHCP_CLIENT=y
 BR2_PACKAGE_WIREGUARD_LINUX_COMPAT=y
 BR2_PACKAGE_DROPBEAR=y
-# BR2_PACKAGE_DROPBEAR_CLIENT is not set
+BR2_PACKAGE_DROPBEAR_CLIENT=y
 # BR2_PACKAGE_IFUPDOWN_SCRIPTS is not set
 BR2_PACKAGE_NETWORK_MANAGER=y
 BR2_PACKAGE_TINI=y
@@ -87,12 +87,12 @@ BR2_TARGET_ROOTFS_SQUASHFS4_LZ4=y
 BR2_TARGET_UBOOT=y
 BR2_TARGET_UBOOT_BUILD_SYSTEM_KCONFIG=y
 BR2_TARGET_UBOOT_CUSTOM_VERSION=y
-BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2020.01"
+BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2020.10"
 BR2_TARGET_UBOOT_BOARD_DEFCONFIG="rpi_0_w"
 BR2_TARGET_UBOOT_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/bootloader/uboot.config $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/uboot.config"
 BR2_TARGET_UBOOT_BOOT_SCRIPT=y
 BR2_TARGET_UBOOT_BOOT_SCRIPT_SOURCE="$(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/uboot-boot.ush"
-BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_4_19=y
+BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_5_4=y
 BR2_PACKAGE_HOST_DOSFSTOOLS=y
 BR2_PACKAGE_HOST_E2FSPROGS=y
 BR2_PACKAGE_HOST_GPTFDISK=y
@@ -100,5 +100,8 @@ BR2_PACKAGE_HOST_MTOOLS=y
 BR2_PACKAGE_HOST_RAUC=y
 BR2_PACKAGE_HASSIO=y
 BR2_PACKAGE_HASSIO_ARCH="armhf"
+BR2_PACKAGE_HASSIO_MACHINE="raspberrypi"
 BR2_PACKAGE_APPARMOR=y
 BR2_PACKAGE_BLUETOOTH_BCM43XX=y
+BR2_PACKAGE_DOSFSTOOLS=y
+BR2_PACKAGE_DOSFSTOOLS_FSCK_FAT=y

buildroot-external/configs/rpi2_defconfig

@@ -24,7 +24,7 @@ BR2_ROOTFS_POST_IMAGE_SCRIPT="$(BR2_EXTERNAL_HASSOS_PATH)/scripts/post-image.sh"
 BR2_ROOTFS_POST_SCRIPT_ARGS="$(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/rpi2 $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/hassos-hook.sh"
 BR2_LINUX_KERNEL=y
 BR2_LINUX_KERNEL_CUSTOM_TARBALL=y
-BR2_LINUX_KERNEL_CUSTOM_TARBALL_LOCATION="https://github.com/raspberrypi/linux/archive/cc39f1c9f82f6fe5a437836811d906c709e0661c.tar.gz"
+BR2_LINUX_KERNEL_CUSTOM_TARBALL_LOCATION="https://github.com/raspberrypi/linux/archive/2ae9829c3da54597a4701285f91985c4d08ee793.tar.gz"
 BR2_LINUX_KERNEL_DEFCONFIG="bcm2709"
 BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/kernel.config"
 BR2_LINUX_KERNEL_LZ4=y
@@ -59,7 +59,7 @@ BR2_PACKAGE_DHCP=y
 BR2_PACKAGE_DHCP_CLIENT=y
 BR2_PACKAGE_WIREGUARD_LINUX_COMPAT=y
 BR2_PACKAGE_DROPBEAR=y
-# BR2_PACKAGE_DROPBEAR_CLIENT is not set
+BR2_PACKAGE_DROPBEAR_CLIENT=y
 # BR2_PACKAGE_IFUPDOWN_SCRIPTS is not set
 BR2_PACKAGE_NETWORK_MANAGER=y
 BR2_PACKAGE_TINI=y
@@ -86,12 +86,12 @@ BR2_TARGET_ROOTFS_SQUASHFS4_LZ4=y
 BR2_TARGET_UBOOT=y
 BR2_TARGET_UBOOT_BUILD_SYSTEM_KCONFIG=y
 BR2_TARGET_UBOOT_CUSTOM_VERSION=y
-BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2020.01"
+BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2020.10"
 BR2_TARGET_UBOOT_BOARD_DEFCONFIG="rpi_2"
 BR2_TARGET_UBOOT_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/bootloader/uboot.config $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/uboot.config"
 BR2_TARGET_UBOOT_BOOT_SCRIPT=y
 BR2_TARGET_UBOOT_BOOT_SCRIPT_SOURCE="$(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/uboot-boot.ush"
-BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_4_19=y
+BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_5_4=y
 BR2_PACKAGE_HOST_DOSFSTOOLS=y
 BR2_PACKAGE_HOST_E2FSPROGS=y
 BR2_PACKAGE_HOST_GPTFDISK=y
@@ -99,4 +99,7 @@ BR2_PACKAGE_HOST_MTOOLS=y
 BR2_PACKAGE_HOST_RAUC=y
 BR2_PACKAGE_HASSIO=y
 BR2_PACKAGE_HASSIO_ARCH="armv7"
+BR2_PACKAGE_HASSIO_MACHINE="raspberrypi2"
 BR2_PACKAGE_APPARMOR=y
+BR2_PACKAGE_DOSFSTOOLS=y
+BR2_PACKAGE_DOSFSTOOLS_FSCK_FAT=y

buildroot-external/configs/rpi3_64_defconfig

@@ -24,7 +24,7 @@ BR2_ROOTFS_POST_IMAGE_SCRIPT="$(BR2_EXTERNAL_HASSOS_PATH)/scripts/post-image.sh"
 BR2_ROOTFS_POST_SCRIPT_ARGS="$(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/rpi3-64 $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/hassos-hook.sh"
 BR2_LINUX_KERNEL=y
 BR2_LINUX_KERNEL_CUSTOM_TARBALL=y
-BR2_LINUX_KERNEL_CUSTOM_TARBALL_LOCATION="https://github.com/raspberrypi/linux/archive/cc39f1c9f82f6fe5a437836811d906c709e0661c.tar.gz"
+BR2_LINUX_KERNEL_CUSTOM_TARBALL_LOCATION="https://github.com/raspberrypi/linux/archive/2ae9829c3da54597a4701285f91985c4d08ee793.tar.gz"
 BR2_LINUX_KERNEL_DEFCONFIG="bcmrpi3"
 BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/kernel.config"
 BR2_LINUX_KERNEL_LZ4=y
@@ -60,7 +60,7 @@ BR2_PACKAGE_DHCP=y
 BR2_PACKAGE_DHCP_CLIENT=y
 BR2_PACKAGE_WIREGUARD_LINUX_COMPAT=y
 BR2_PACKAGE_DROPBEAR=y
-# BR2_PACKAGE_DROPBEAR_CLIENT is not set
+BR2_PACKAGE_DROPBEAR_CLIENT=y
 # BR2_PACKAGE_IFUPDOWN_SCRIPTS is not set
 BR2_PACKAGE_NETWORK_MANAGER=y
 BR2_PACKAGE_TINI=y
@@ -87,12 +87,12 @@ BR2_TARGET_ROOTFS_SQUASHFS4_LZ4=y
 BR2_TARGET_UBOOT=y
 BR2_TARGET_UBOOT_BUILD_SYSTEM_KCONFIG=y
 BR2_TARGET_UBOOT_CUSTOM_VERSION=y
-BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2020.01"
+BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2020.10"
 BR2_TARGET_UBOOT_BOARD_DEFCONFIG="rpi_3"
 BR2_TARGET_UBOOT_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/bootloader/uboot.config $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/uboot.config"
 BR2_TARGET_UBOOT_BOOT_SCRIPT=y
 BR2_TARGET_UBOOT_BOOT_SCRIPT_SOURCE="$(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/uboot-boot64.ush"
-BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_4_19=y
+BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_5_4=y
 BR2_PACKAGE_HOST_DOSFSTOOLS=y
 BR2_PACKAGE_HOST_E2FSPROGS=y
 BR2_PACKAGE_HOST_GPTFDISK=y
@@ -100,5 +100,8 @@ BR2_PACKAGE_HOST_MTOOLS=y
 BR2_PACKAGE_HOST_RAUC=y
 BR2_PACKAGE_HASSIO=y
 BR2_PACKAGE_HASSIO_ARCH="aarch64"
+BR2_PACKAGE_HASSIO_MACHINE="raspberrypi3-64"
 BR2_PACKAGE_APPARMOR=y
 BR2_PACKAGE_BLUETOOTH_BCM43XX=y
+BR2_PACKAGE_DOSFSTOOLS=y
+BR2_PACKAGE_DOSFSTOOLS_FSCK_FAT=y

buildroot-external/configs/rpi3_defconfig

@@ -24,7 +24,7 @@ BR2_ROOTFS_POST_IMAGE_SCRIPT="$(BR2_EXTERNAL_HASSOS_PATH)/scripts/post-image.sh"
 BR2_ROOTFS_POST_SCRIPT_ARGS="$(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/rpi3 $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/hassos-hook.sh"
 BR2_LINUX_KERNEL=y
 BR2_LINUX_KERNEL_CUSTOM_TARBALL=y
-BR2_LINUX_KERNEL_CUSTOM_TARBALL_LOCATION="https://github.com/raspberrypi/linux/archive/cc39f1c9f82f6fe5a437836811d906c709e0661c.tar.gz"
+BR2_LINUX_KERNEL_CUSTOM_TARBALL_LOCATION="https://github.com/raspberrypi/linux/archive/2ae9829c3da54597a4701285f91985c4d08ee793.tar.gz"
 BR2_LINUX_KERNEL_DEFCONFIG="bcm2709"
 BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/kernel.config"
 BR2_LINUX_KERNEL_LZ4=y
@@ -60,7 +60,7 @@ BR2_PACKAGE_DHCP=y
 BR2_PACKAGE_DHCP_CLIENT=y
 BR2_PACKAGE_WIREGUARD_LINUX_COMPAT=y
 BR2_PACKAGE_DROPBEAR=y
-# BR2_PACKAGE_DROPBEAR_CLIENT is not set
+BR2_PACKAGE_DROPBEAR_CLIENT=y
 # BR2_PACKAGE_IFUPDOWN_SCRIPTS is not set
 BR2_PACKAGE_NETWORK_MANAGER=y
 BR2_PACKAGE_TINI=y
@@ -87,12 +87,12 @@ BR2_TARGET_ROOTFS_SQUASHFS4_LZ4=y
 BR2_TARGET_UBOOT=y
 BR2_TARGET_UBOOT_BUILD_SYSTEM_KCONFIG=y
 BR2_TARGET_UBOOT_CUSTOM_VERSION=y
-BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2020.01"
+BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2020.10"
 BR2_TARGET_UBOOT_BOARD_DEFCONFIG="rpi_3_32b"
 BR2_TARGET_UBOOT_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/bootloader/uboot.config $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/uboot.config"
 BR2_TARGET_UBOOT_BOOT_SCRIPT=y
 BR2_TARGET_UBOOT_BOOT_SCRIPT_SOURCE="$(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/uboot-boot.ush"
-BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_4_19=y
+BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_5_4=y
 BR2_PACKAGE_HOST_DOSFSTOOLS=y
 BR2_PACKAGE_HOST_E2FSPROGS=y
 BR2_PACKAGE_HOST_GPTFDISK=y
@@ -100,5 +100,8 @@ BR2_PACKAGE_HOST_MTOOLS=y
 BR2_PACKAGE_HOST_RAUC=y
 BR2_PACKAGE_HASSIO=y
 BR2_PACKAGE_HASSIO_ARCH="armv7"
+BR2_PACKAGE_HASSIO_MACHINE="raspberrypi3"
 BR2_PACKAGE_APPARMOR=y
 BR2_PACKAGE_BLUETOOTH_BCM43XX=y
+BR2_PACKAGE_DOSFSTOOLS=y
+BR2_PACKAGE_DOSFSTOOLS_FSCK_FAT=y

buildroot-external/configs/rpi4_64_defconfig

@@ -24,7 +24,7 @@ BR2_ROOTFS_POST_IMAGE_SCRIPT="$(BR2_EXTERNAL_HASSOS_PATH)/scripts/post-image.sh"
 BR2_ROOTFS_POST_SCRIPT_ARGS="$(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/rpi4-64 $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/hassos-hook.sh"
 BR2_LINUX_KERNEL=y
 BR2_LINUX_KERNEL_CUSTOM_TARBALL=y
-BR2_LINUX_KERNEL_CUSTOM_TARBALL_LOCATION="https://github.com/raspberrypi/linux/archive/cc39f1c9f82f6fe5a437836811d906c709e0661c.tar.gz"
+BR2_LINUX_KERNEL_CUSTOM_TARBALL_LOCATION="https://github.com/raspberrypi/linux/archive/2ae9829c3da54597a4701285f91985c4d08ee793.tar.gz"
 BR2_LINUX_KERNEL_DEFCONFIG="bcm2711"
 BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/kernel.config"
 BR2_LINUX_KERNEL_LZ4=y
@@ -61,7 +61,7 @@ BR2_PACKAGE_DHCP=y
 BR2_PACKAGE_DHCP_CLIENT=y
 BR2_PACKAGE_WIREGUARD_LINUX_COMPAT=y
 BR2_PACKAGE_DROPBEAR=y
-# BR2_PACKAGE_DROPBEAR_CLIENT is not set
+BR2_PACKAGE_DROPBEAR_CLIENT=y
 # BR2_PACKAGE_IFUPDOWN_SCRIPTS is not set
 BR2_PACKAGE_NETWORK_MANAGER=y
 BR2_PACKAGE_TINI=y
@@ -88,12 +88,12 @@ BR2_TARGET_ROOTFS_SQUASHFS4_LZ4=y
 BR2_TARGET_UBOOT=y
 BR2_TARGET_UBOOT_BUILD_SYSTEM_KCONFIG=y
 BR2_TARGET_UBOOT_CUSTOM_VERSION=y
-BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2020.07"
+BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2020.10"
 BR2_TARGET_UBOOT_BOARD_DEFCONFIG="rpi_4"
 BR2_TARGET_UBOOT_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/bootloader/uboot.config $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/uboot.config"
 BR2_TARGET_UBOOT_BOOT_SCRIPT=y
 BR2_TARGET_UBOOT_BOOT_SCRIPT_SOURCE="$(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/uboot-boot64.ush"
-BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_4_19=y
+BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_5_4=y
 BR2_PACKAGE_HOST_DOSFSTOOLS=y
 BR2_PACKAGE_HOST_E2FSPROGS=y
 BR2_PACKAGE_HOST_GPTFDISK=y
@@ -101,5 +101,8 @@ BR2_PACKAGE_HOST_MTOOLS=y
 BR2_PACKAGE_HOST_RAUC=y
 BR2_PACKAGE_HASSIO=y
 BR2_PACKAGE_HASSIO_ARCH="aarch64"
+BR2_PACKAGE_HASSIO_MACHINE="raspberrypi4-64"
 BR2_PACKAGE_APPARMOR=y
 BR2_PACKAGE_BLUETOOTH_BCM43XX=y
+BR2_PACKAGE_DOSFSTOOLS=y
+BR2_PACKAGE_DOSFSTOOLS_FSCK_FAT=y

buildroot-external/configs/rpi4_defconfig

@@ -24,7 +24,7 @@ BR2_ROOTFS_POST_IMAGE_SCRIPT="$(BR2_EXTERNAL_HASSOS_PATH)/scripts/post-image.sh"
 BR2_ROOTFS_POST_SCRIPT_ARGS="$(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/rpi4 $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/hassos-hook.sh"
 BR2_LINUX_KERNEL=y
 BR2_LINUX_KERNEL_CUSTOM_TARBALL=y
-BR2_LINUX_KERNEL_CUSTOM_TARBALL_LOCATION="https://github.com/raspberrypi/linux/archive/cc39f1c9f82f6fe5a437836811d906c709e0661c.tar.gz"
+BR2_LINUX_KERNEL_CUSTOM_TARBALL_LOCATION="https://github.com/raspberrypi/linux/archive/2ae9829c3da54597a4701285f91985c4d08ee793.tar.gz"
 BR2_LINUX_KERNEL_DEFCONFIG="bcm2711"
 BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/kernel.config"
 BR2_LINUX_KERNEL_LZ4=y
@@ -61,7 +61,7 @@ BR2_PACKAGE_DHCP=y
 BR2_PACKAGE_DHCP_CLIENT=y
 BR2_PACKAGE_WIREGUARD_LINUX_COMPAT=y
 BR2_PACKAGE_DROPBEAR=y
-# BR2_PACKAGE_DROPBEAR_CLIENT is not set
+BR2_PACKAGE_DROPBEAR_CLIENT=y
 # BR2_PACKAGE_IFUPDOWN_SCRIPTS is not set
 BR2_PACKAGE_NETWORK_MANAGER=y
 BR2_PACKAGE_TINI=y
@@ -88,12 +88,12 @@ BR2_TARGET_ROOTFS_SQUASHFS4_LZ4=y
 BR2_TARGET_UBOOT=y
 BR2_TARGET_UBOOT_BUILD_SYSTEM_KCONFIG=y
 BR2_TARGET_UBOOT_CUSTOM_VERSION=y
-BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2020.01"
+BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2020.10"
 BR2_TARGET_UBOOT_BOARD_DEFCONFIG="rpi_4_32b"
 BR2_TARGET_UBOOT_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/bootloader/uboot.config $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/uboot.config"
 BR2_TARGET_UBOOT_BOOT_SCRIPT=y
 BR2_TARGET_UBOOT_BOOT_SCRIPT_SOURCE="$(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/uboot-boot.ush"
-BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_4_19=y
+BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_5_4=y
 BR2_PACKAGE_HOST_DOSFSTOOLS=y
 BR2_PACKAGE_HOST_E2FSPROGS=y
 BR2_PACKAGE_HOST_GPTFDISK=y
@@ -101,5 +101,8 @@ BR2_PACKAGE_HOST_MTOOLS=y
 BR2_PACKAGE_HOST_RAUC=y
 BR2_PACKAGE_HASSIO=y
 BR2_PACKAGE_HASSIO_ARCH="armv7"
+BR2_PACKAGE_HASSIO_MACHINE="raspberrypi4"
 BR2_PACKAGE_APPARMOR=y
 BR2_PACKAGE_BLUETOOTH_BCM43XX=y
+BR2_PACKAGE_DOSFSTOOLS=y
+BR2_PACKAGE_DOSFSTOOLS_FSCK_FAT=y

buildroot-external/configs/rpi_defconfig

@@ -24,7 +24,7 @@ BR2_ROOTFS_POST_IMAGE_SCRIPT="$(BR2_EXTERNAL_HASSOS_PATH)/scripts/post-image.sh"
 BR2_ROOTFS_POST_SCRIPT_ARGS="$(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/rpi $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/hassos-hook.sh"
 BR2_LINUX_KERNEL=y
 BR2_LINUX_KERNEL_CUSTOM_TARBALL=y
-BR2_LINUX_KERNEL_CUSTOM_TARBALL_LOCATION="https://github.com/raspberrypi/linux/archive/cc39f1c9f82f6fe5a437836811d906c709e0661c.tar.gz"
+BR2_LINUX_KERNEL_CUSTOM_TARBALL_LOCATION="https://github.com/raspberrypi/linux/archive/2ae9829c3da54597a4701285f91985c4d08ee793.tar.gz"
 BR2_LINUX_KERNEL_DEFCONFIG="bcmrpi"
 BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/kernel.config"
 BR2_LINUX_KERNEL_LZ4=y
@@ -59,7 +59,7 @@ BR2_PACKAGE_DHCP=y
 BR2_PACKAGE_DHCP_CLIENT=y
 BR2_PACKAGE_WIREGUARD_LINUX_COMPAT=y
 BR2_PACKAGE_DROPBEAR=y
-# BR2_PACKAGE_DROPBEAR_CLIENT is not set
+BR2_PACKAGE_DROPBEAR_CLIENT=y
 # BR2_PACKAGE_IFUPDOWN_SCRIPTS is not set
 BR2_PACKAGE_NETWORK_MANAGER=y
 BR2_PACKAGE_TINI=y
@@ -86,12 +86,12 @@ BR2_TARGET_ROOTFS_SQUASHFS4_LZ4=y
 BR2_TARGET_UBOOT=y
 BR2_TARGET_UBOOT_BUILD_SYSTEM_KCONFIG=y
 BR2_TARGET_UBOOT_CUSTOM_VERSION=y
-BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2020.01"
+BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2020.10"
 BR2_TARGET_UBOOT_BOARD_DEFCONFIG="rpi"
 BR2_TARGET_UBOOT_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/bootloader/uboot.config $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/uboot.config"
 BR2_TARGET_UBOOT_BOOT_SCRIPT=y
 BR2_TARGET_UBOOT_BOOT_SCRIPT_SOURCE="$(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/uboot-boot.ush"
-BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_4_19=y
+BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_5_4=y
 BR2_PACKAGE_HOST_DOSFSTOOLS=y
 BR2_PACKAGE_HOST_E2FSPROGS=y
 BR2_PACKAGE_HOST_GPTFDISK=y
@@ -99,4 +99,7 @@ BR2_PACKAGE_HOST_MTOOLS=y
 BR2_PACKAGE_HOST_RAUC=y
 BR2_PACKAGE_HASSIO=y
 BR2_PACKAGE_HASSIO_ARCH="armhf"
+BR2_PACKAGE_HASSIO_MACHINE="raspberrypi"
 BR2_PACKAGE_APPARMOR=y
+BR2_PACKAGE_DOSFSTOOLS=y
+BR2_PACKAGE_DOSFSTOOLS_FSCK_FAT=y

buildroot-external/configs/tinker_defconfig

@@ -61,7 +61,7 @@ BR2_PACKAGE_DHCP=y
 BR2_PACKAGE_DHCP_CLIENT=y
 BR2_PACKAGE_WIREGUARD_LINUX_COMPAT=y
 BR2_PACKAGE_DROPBEAR=y
-# BR2_PACKAGE_DROPBEAR_CLIENT is not set
+BR2_PACKAGE_DROPBEAR_CLIENT=y
 # BR2_PACKAGE_IFUPDOWN_SCRIPTS is not set
 BR2_PACKAGE_NETWORK_MANAGER=y
 BR2_PACKAGE_TINI=y
@@ -88,14 +88,14 @@ BR2_TARGET_ROOTFS_SQUASHFS4_LZ4=y
 BR2_TARGET_UBOOT=y
 BR2_TARGET_UBOOT_BUILD_SYSTEM_KCONFIG=y
 BR2_TARGET_UBOOT_CUSTOM_VERSION=y
-BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2020.01"
+BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2020.10"
 BR2_TARGET_UBOOT_BOARD_DEFCONFIG="tinker-s-rk3288"
 BR2_TARGET_UBOOT_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/bootloader/uboot.config $(BR2_EXTERNAL_HASSOS_PATH)/board/asus/tinker/uboot.config"
 BR2_TARGET_UBOOT_FORMAT_DTB_BIN=y
 BR2_TARGET_UBOOT_FORMAT_DTB_IMG=y
 BR2_TARGET_UBOOT_NEEDS_PYLIBFDT=y
 BR2_TARGET_UBOOT_SPL=y
-BR2_TARGET_UBOOT_SPL_NAME="spl/u-boot-spl.bin tpl/u-boot-tpl.bin"
+BR2_TARGET_UBOOT_SPL_NAME="idbloader.img"
 BR2_TARGET_UBOOT_BOOT_SCRIPT=y
 BR2_TARGET_UBOOT_BOOT_SCRIPT_SOURCE="$(BR2_EXTERNAL_HASSOS_PATH)/board/asus/tinker/uboot-boot.ush"
 BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_5_4=y
@@ -106,5 +106,8 @@ BR2_PACKAGE_HOST_MTOOLS=y
 BR2_PACKAGE_HOST_RAUC=y
 BR2_PACKAGE_HASSIO=y
 BR2_PACKAGE_HASSIO_ARCH="armv7"
+BR2_PACKAGE_HASSIO_MACHINE="tinker"
 BR2_PACKAGE_APPARMOR=y
 BR2_PACKAGE_BLUETOOTH_RTL8723=y
+BR2_PACKAGE_DOSFSTOOLS=y
+BR2_PACKAGE_DOSFSTOOLS_FSCK_FAT=y

buildroot-external/kernel/hassos.config

@@ -1,5 +1,6 @@
 CONFIG_KERNEL_LZ4=y
 CONFIG_CMDLINE=""
+CONFIG_PANIC_TIMEOUT=5
 
 CONFIG_ZRAM=y
 CONFIG_ZSMALLOC=y

buildroot-external/meta

@@ -1,5 +1,5 @@
 VERSION_MAJOR=5
-VERSION_BUILD=2
+VERSION_BUILD=5
 
 HASSOS_NAME="HassOS"
 HASSOS_ID="hassos"

buildroot-external/package/bluetooth-bcm43xx/bluetooth-bcm43xx.mk

@@ -11,8 +11,8 @@ BLUETOOTH_BCM43XX_SITE = $(BR2_EXTERNAL_HASSOS_PATH)/package/bluetooth-bcm43xx
 BLUETOOTH_BCM43XX_SITE_METHOD = local
 
 define BLUETOOTH_BCM43XX_BUILD_CMDS
-	curl -L -o $(@D)/BCM43430A1.hcd https://raw.githubusercontent.com/RPi-Distro/bluez-firmware/fff76cb15527c435ce99a9787848eacd6288282c/broadcom/BCM43430A1.hcd
-	curl -L -o $(@D)/BCM4345C0.hcd https://raw.githubusercontent.com/RPi-Distro/bluez-firmware/fff76cb15527c435ce99a9787848eacd6288282c/broadcom/BCM4345C0.hcd
+	curl -L -o $(@D)/BCM43430A1.hcd https://raw.githubusercontent.com/RPi-Distro/bluez-firmware/a4e08822e3f24a6211f6ac94bc98b7ef87700c70/broadcom/BCM43430A1.hcd
+	curl -L -o $(@D)/BCM4345C0.hcd https://raw.githubusercontent.com/RPi-Distro/bluez-firmware/a4e08822e3f24a6211f6ac94bc98b7ef87700c70/broadcom/BCM4345C0.hcd
 	curl -L -o $(@D)/btuart https://raw.githubusercontent.com/RPi-Distro/pi-bluetooth/cbdbcb66bcc5b9af05f1a9fffe2254c872bb0ace/usr/bin/btuart
 	curl -L -o $(@D)/bthelper https://raw.githubusercontent.com/RPi-Distro/pi-bluetooth/cbdbcb66bcc5b9af05f1a9fffe2254c872bb0ace/usr/bin/bthelper
 	curl -L -o $(@D)/90-pi-bluetooth.rules https://raw.githubusercontent.com/RPi-Distro/pi-bluetooth/cbdbcb66bcc5b9af05f1a9fffe2254c872bb0ace/lib/udev/rules.d/90-pi-bluetooth.rules

buildroot-external/package/hardkernel-boot/Config.in

@@ -14,6 +14,11 @@ config BR2_PACKAGE_HARDKERNEL_BOOT_ODROID_C2
 	help
 	  For the Odroid-C2
 
+config BR2_PACKAGE_HARDKERNEL_BOOT_ODROID_C4
+	bool "Odroid-C4"
+	help
+	  For the Odroid-C4
+
 config BR2_PACKAGE_HARDKERNEL_BOOT_ODROID_XU4
 	bool "Odroid-XU4"
 	help

buildroot-external/package/hardkernel-boot/hardkernel-boot.mk

@@ -32,6 +32,60 @@ define HARDKERNEL_BOOT_BUILD_CMDS
 	dd if=$(@D)/u-boot.img of=$(@D)/u-boot.gxbb bs=512 skip=96
 endef
 
+else ifeq ($(BR2_PACKAGE_HARDKERNEL_BOOT_ODROID_C4),y)
+# travis/odroidc4-153 20201014
+HARDKERNEL_BOOT_VERSION = 2a4e31e3fde9bced8a150d338aa397a0362df191
+
+HARDKERNEL_BOOT_BINS += u-boot.sm1
+define HARDKERNEL_BOOT_BUILD_CMDS
+	curl -L -o $(@D)/fip/blx_fix.sh https://raw.githubusercontent.com/home-assistant/operating-system-blobs/75fa51f44221da614a717673a27bec4fa01ccd6c/hardkernel/blx_fix_g12a.sh
+	curl -L -o $(@D)/fip/acs.bin https://raw.githubusercontent.com/home-assistant/operating-system-blobs/75fa51f44221da614a717673a27bec4fa01ccd6c/hardkernel/odroid-c4/acs.bin
+	curl -L -o $(@D)/fip/bl301.bin https://raw.githubusercontent.com/home-assistant/operating-system-blobs/75fa51f44221da614a717673a27bec4fa01ccd6c/hardkernel/odroid-c4/bl301.bin
+
+	bash $(@D)/fip/blx_fix.sh \
+		$(@D)/fip/g12a/bl30.bin $(@D)/fip/zero_tmp $(@D)/fip/bl30_zero.bin \
+		$(@D)/fip/bl301.bin $(@D)/fip/bl301_zero.bin $(@D)/fip/bl30_new.bin \
+		bl30
+
+	bash $(@D)/fip/blx_fix.sh \
+		$(@D)/fip/g12a/bl2.bin $(@D)/fip/zero_tmp $(@D)/fip/bl2_zero.bin \
+		$(@D)/fip/acs.bin $(@D)/fip/bl21_zero.bin $(@D)/fip/bl2_new.bin \
+		bl2
+
+	$(@D)/fip/g12a/aml_encrypt_g12a --bl30sig --input $(@D)/fip/bl30_new.bin \
+		--output $(@D)/fip/bl30_new.bin.g12a.enc \
+		--level v3
+	$(@D)/fip/g12a/aml_encrypt_g12a --bl3sig --input $(@D)/fip/bl30_new.bin.g12a.enc \
+		--output $(@D)/fip/bl30_new.bin.enc \
+		--level v3 --type bl30
+	$(@D)/fip/g12a/aml_encrypt_g12a --bl3sig --input $(@D)/fip/g12a/bl31.img \
+		--output $(@D)/fip/bl31.img.enc \
+		--level v3 --type bl31
+	$(@D)/fip/g12a/aml_encrypt_g12a --bl3sig --input $(BINARIES_DIR)/u-boot.bin \
+		--output $(@D)/fip/bl33.bin.enc \
+		--level v3 --type bl33
+	$(@D)/fip/g12a/aml_encrypt_g12a --bl2sig --input $(@D)/fip/bl2_new.bin \
+		--output $(@D)/fip/bl2.n.bin.sig
+	$(@D)/fip/g12a/aml_encrypt_g12a --bootmk \
+		--output $(@D)/fip/u-boot.bin \
+		--bl2 $(@D)/fip/bl2.n.bin.sig \
+		--bl30 $(@D)/fip/bl30_new.bin.enc \
+		--bl31 $(@D)/fip/bl31.img.enc \
+		--bl33 $(@D)/fip/bl33.bin.enc \
+		--ddrfw1 $(@D)/fip/g12a/ddr4_1d.fw \
+		--ddrfw2 $(@D)/fip/g12a/ddr4_2d.fw \
+		--ddrfw3 $(@D)fip/g12a/ddr3_1d.fw \
+		--ddrfw4 $(@D)/fip/g12a/piei.fw \
+		--ddrfw5 $(@D)/fip/g12a/lpddr4_1d.fw \
+		--ddrfw6 $(@D)/fip/g12a/lpddr4_2d.fw \
+		--ddrfw7 $(@D)/fip/g12a/diag_lpddr4.fw \
+		--ddrfw8 $(@D)/fip/g12a/aml_ddr.fw \
+		--ddrfw9 $(@D)/fip/g12a/lpddr3_1d.fw \
+		--level v3
+
+	cp $(@D)/fip/u-boot.bin $(@D)/u-boot.sm1
+endef
+
 else ifeq ($(BR2_PACKAGE_HARDKERNEL_BOOT_ODROID_XU4),y)
 HARDKERNEL_BOOT_VERSION = 88af53fbcef8386cb4d5f04c19f4b2bcb69e90ca
 
@@ -42,13 +96,13 @@ define HARDKERNEL_BOOT_BUILD_CMDS
 endef
 
 else ifeq ($(BR2_PACKAGE_HARDKERNEL_BOOT_ODROID_N2),y)
-HARDKERNEL_BOOT_VERSION = c989da31a5c1da3ab57d7c6dc5a3fdbcc1c3eed7
+HARDKERNEL_BOOT_VERSION = ca5bdd0f1c291d1ec135cd134e01aa2619203d4c
 
 HARDKERNEL_BOOT_BINS += u-boot.g12b
 define HARDKERNEL_BOOT_BUILD_CMDS
-	curl -L -o $(@D)/fip/blx_fix.sh https://raw.githubusercontent.com/home-assistant/hassos-blobs/d88ec078470f236d694ba1f9e69a44759ddf41ea/odroid-n2/blx_fix_g12a.sh
-	curl -L -o $(@D)/fip/acs.bin https://raw.githubusercontent.com/home-assistant/hassos-blobs/d88ec078470f236d694ba1f9e69a44759ddf41ea/odroid-n2/acs.bin
-	curl -L -o $(@D)/fip/bl301.bin https://raw.githubusercontent.com/home-assistant/hassos-blobs/d88ec078470f236d694ba1f9e69a44759ddf41ea/odroid-n2/bl301.bin
+	curl -L -o $(@D)/fip/blx_fix.sh https://raw.githubusercontent.com/home-assistant/operating-system-blobs/f17a8e81e0b7e1bd2475441465cc737c0891edfa/hardkernel/blx_fix_g12a.sh
+	curl -L -o $(@D)/fip/acs.bin https://raw.githubusercontent.com/home-assistant/operating-system-blobs/f17a8e81e0b7e1bd2475441465cc737c0891edfa/hardkernel/odroid-n2/acs.bin
+	curl -L -o $(@D)/fip/bl301.bin https://raw.githubusercontent.com/home-assistant/operating-system-blobs/f17a8e81e0b7e1bd2475441465cc737c0891edfa/hardkernel/odroid-n2/bl301.bin
 
 	bash $(@D)/fip/blx_fix.sh \
 		$(@D)/fip/g12b/bl30.bin $(@D)/fip/zero_tmp $(@D)/fip/bl30_zero.bin \

buildroot-external/package/hassio/Config.in

@@ -13,4 +13,9 @@ config BR2_PACKAGE_HASSIO_ARCH
 	help
 	  Supervisor architecture which should be pull.
 
+config BR2_PACKAGE_HASSIO_MACHINE
+	string "Supervisor Machine"
+	help
+	  Machine to pull containers for (used for landing page).
+
 endif

buildroot-external/package/hassio/builder/hostapp.sh

@@ -2,6 +2,7 @@
 set -e
 
 ARCH=
+MACHINE=
 DATA_IMG="/export/data.ext4"
 VERSION_URL="https://version.home-assistant.io/stable.json"
 APPARMOR_URL="https://version.home-assistant.io/apparmor.txt"
@@ -14,6 +15,10 @@ while [[ $# -gt 0 ]]; do
             ARCH=$2
             shift
             ;;
+        --machine)
+            MACHINE=$2
+            shift
+            ;;
         *)
             exit 1
             ;;
@@ -26,12 +31,15 @@ DNS="homeassistant/${ARCH}-hassio-dns"
 AUDIO="homeassistant/${ARCH}-hassio-audio"
 CLI="homeassistant/${ARCH}-hassio-cli"
 MULTICAST="homeassistant/${ARCH}-hassio-multicast"
+OBSERVER="homeassistant/${ARCH}-hassio-observer"
+LANDINGPAGE="homeassistant/${MACHINE}-homeassistant:landingpage"
 
 SUPERVISOR_VERSION=$(curl -s ${VERSION_URL} | jq -e -r '.supervisor')
 DNS_VERSION=$(curl -s ${VERSION_URL} | jq -e -r '.dns')
 CLI_VERSION=$(curl -s ${VERSION_URL} | jq -e -r '.cli')
 AUDIO_VERSION=$(curl -s ${VERSION_URL} | jq -e -r '.audio')
 MULTICAST_VERSION=$(curl -s ${VERSION_URL} | jq -e -r '.multicast')
+OBSERVER_VERSION=$(curl -s ${VERSION_URL} | jq -e -r '.observer')
 
 # Make image
 dd if=/dev/zero of=${DATA_IMG} bs=1G count=1
@@ -72,6 +80,10 @@ docker pull "${CLI}:${CLI_VERSION}"
 docker pull "${DNS}:${DNS_VERSION}"
 docker pull "${AUDIO}:${AUDIO_VERSION}"
 docker pull "${MULTICAST}:${MULTICAST_VERSION}"
+docker pull "${OBSERVER}:${OBSERVER_VERSION}"
+
+# Install landing page
+docker pull "${LANDINGPAGE}"
 
 # Setup AppArmor
 mkdir -p "/mnt/data/supervisor/apparmor"

buildroot-external/package/hassio/hassio.mk

@@ -19,7 +19,8 @@ define HASSIO_INSTALL_TARGET_CMDS
 		-e BUILDER_UID="$(shell id -u)" -e BUILDER_GID="$(shell id -g)" \
 		-v $(BINARIES_DIR):/export \
 		hassos-hostapps \
-		--arch $(BR2_PACKAGE_HASSIO_ARCH)
+		--arch $(BR2_PACKAGE_HASSIO_ARCH) \
+		--machine $(BR2_PACKAGE_HASSIO_MACHINE)
 endef
 
 $(eval $(generic-package))

buildroot-external/patches/systemd/0002-time-wait-sync-log-inotify-errors.patch

@@ -0,0 +1,23 @@
+From 4a4298ef78e943d36f3b8d8e78bfa21b1506961e Mon Sep 17 00:00:00 2001
+From: Aman Gupta Karmani <aman@tmm1.net>
+Date: Mon, 12 Oct 2020 13:39:26 -0700
+Subject: [PATCH] time-wait-sync: log errors trying to watch
+ /run/systemd/timesync
+
+---
+ src/time-wait-sync/time-wait-sync.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/src/time-wait-sync/time-wait-sync.c b/src/time-wait-sync/time-wait-sync.c
+index 96072445f6e..c8ec4850426 100644
+--- a/src/time-wait-sync/time-wait-sync.c
++++ b/src/time-wait-sync/time-wait-sync.c
+@@ -50,7 +50,7 @@ static void clock_state_release(ClockState *sp) {
+ static int clock_state_update(ClockState *sp, sd_event *event);
+ 
+ static int update_notify_run_systemd_timesync(ClockState *sp) {
+-        sp->run_systemd_timesync_wd = inotify_add_watch(sp->inotify_fd, "/run/systemd/timesync", IN_CREATE|IN_DELETE_SELF);
++        sp->run_systemd_timesync_wd = inotify_add_watch_and_warn(sp->inotify_fd, "/run/systemd/timesync", IN_CREATE|IN_DELETE_SELF);
+         return sp->run_systemd_timesync_wd;
+ }
+ 

buildroot-external/patches/systemd/0003-fix-inotify-watches.patch

@@ -0,0 +1,54 @@
+From f6f4f5fe5395a57f10dd446c7266c53f0673eaac Mon Sep 17 00:00:00 2001
+From: Balaji Punnuru <balaji_punnuru@cable.comcast.com>
+Date: Thu, 9 Apr 2020 12:21:49 -0400
+Subject: [PATCH] util: return the correct correct wd from inotify helpers
+
+We need to propagate the acquired watch descriptors because our callers
+are counting on them.
+
+[Lennart: this is split out of #15381 and simplified]
+---
+ src/basic/fs-util.c | 14 ++++++++------
+ 1 file changed, 8 insertions(+), 6 deletions(-)
+
+diff --git a/src/basic/fs-util.c b/src/basic/fs-util.c
+index 558cafbcaf5..ef3b5a51842 100644
+--- a/src/basic/fs-util.c
++++ b/src/basic/fs-util.c
+@@ -692,28 +692,30 @@ int unlink_or_warn(const char *filename) {
+ 
+ int inotify_add_watch_fd(int fd, int what, uint32_t mask) {
+         char path[STRLEN("/proc/self/fd/") + DECIMAL_STR_MAX(int) + 1];
+-        int r;
++        int wd;
+ 
+         /* This is like inotify_add_watch(), except that the file to watch is not referenced by a path, but by an fd */
+         xsprintf(path, "/proc/self/fd/%i", what);
+ 
+-        r = inotify_add_watch(fd, path, mask);
+-        if (r < 0)
++        wd = inotify_add_watch(fd, path, mask);
++        if (wd < 0)
+                 return -errno;
+ 
+-        return r;
++        return wd;
+ }
+ 
+ int inotify_add_watch_and_warn(int fd, const char *pathname, uint32_t mask) {
++        int wd;
+ 
+-        if (inotify_add_watch(fd, pathname, mask) < 0) {
++        wd = inotify_add_watch(fd, pathname, mask);
++        if (wd < 0) {
+                 if (errno == ENOSPC)
+                         return log_error_errno(errno, "Failed to add a watch for %s: inotify watch limit reached", pathname);
+ 
+                 return log_error_errno(errno, "Failed to add a watch for %s: %m", pathname);
+         }
+ 
+-        return 0;
++        return wd;
+ }
+ 
+ static bool unsafe_transition(const struct stat *a, const struct stat *b) {

buildroot-external/patches/uboot/2020.07/0002-usb-xhci-Add-missing-cache-flush-in-the-scratchpad-a.patch

@@ -1,41 +0,0 @@
-From b39cd5ba642ddba46268e8d873b952604844c047 Mon Sep 17 00:00:00 2001
-Message-Id: <b39cd5ba642ddba46268e8d873b952604844c047.1595101389.git.stefan@agner.ch>
-In-Reply-To: <040a141f84f2f84bf8be18f85b4cdb34bf066df0.1595101389.git.stefan@agner.ch>
-References: <040a141f84f2f84bf8be18f85b4cdb34bf066df0.1595101389.git.stefan@agner.ch>
-From: Sylwester Nawrocki <s.nawrocki@samsung.com>
-Date: Mon, 25 May 2020 13:39:51 +0200
-Subject: [PATCH 02/20] usb: xhci: Add missing cache flush in the scratchpad
- array initialization
-
-In current code there is no cache flush after initializing the scratchpad
-buffer array with the scratchpad buffer pointers. This leads to a failure
-of the "slot enable" command on the rpi4 board (Broadcom STB PCIe
-controller + VL805 USB hub) - the very first TRB transfer on the command
-ring fails and there is a timeout while waiting for the command completion
-event. After adding the missing cache flush everything seems to be working
-as expected.
-
-Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
-Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
-Reviewed-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
----
- drivers/usb/host/xhci-mem.c | 3 +++
- 1 file changed, 3 insertions(+)
-
-diff --git a/drivers/usb/host/xhci-mem.c b/drivers/usb/host/xhci-mem.c
-index 2d968aafb0..f446520528 100644
---- a/drivers/usb/host/xhci-mem.c
-+++ b/drivers/usb/host/xhci-mem.c
-@@ -395,6 +395,9 @@ static int xhci_scratchpad_alloc(struct xhci_ctrl *ctrl)
- 		scratchpad->sp_array[i] = cpu_to_le64(ptr);
- 	}
- 
-+	xhci_flush_cache((uintptr_t)scratchpad->sp_array,
-+			 sizeof(u64) * num_sp);
-+
- 	return 0;
- 
- fail_sp3:
--- 
-2.27.0
-

buildroot-external/patches/uboot/2020.07/0003-usb-xhci-Use-only-32-bit-accesses-in-xhci_writeq-xhc.patch

@@ -1,69 +0,0 @@
-From 71343be3dd8d7f04cea781c8369aa77a36ae7123 Mon Sep 17 00:00:00 2001
-Message-Id: <71343be3dd8d7f04cea781c8369aa77a36ae7123.1595101389.git.stefan@agner.ch>
-In-Reply-To: <040a141f84f2f84bf8be18f85b4cdb34bf066df0.1595101389.git.stefan@agner.ch>
-References: <040a141f84f2f84bf8be18f85b4cdb34bf066df0.1595101389.git.stefan@agner.ch>
-From: Sylwester Nawrocki <s.nawrocki@samsung.com>
-Date: Mon, 25 May 2020 13:39:52 +0200
-Subject: [PATCH 03/20] usb: xhci: Use only 32-bit accesses in
- xhci_writeq/xhci_readq
-
-There might be hardware configurations where 64-bit data accesses
-to XHCI registers are not supported properly.  This patch removes
-the readq/writeq so always two 32-bit accesses are used to read/write
-64-bit XHCI registers, similarly as it is done in Linux kernel.
-
-This patch fixes operation of the XHCI controller on RPI4 Broadcom
-BCM2711 SoC based board, where the VL805 USB XHCI controller is
-connected to the PCIe Root Complex, which is attached to the system
-through the SCB bridge.
-
-Even though the architecture is 64-bit the PCIe BAR is 32-bit and likely
-the 64-bit wide register accesses initiated by the CPU are not properly
-translated to a sequence of 32-bit PCIe accesses.
-xhci_readq(), for example, always returns same value in upper and lower
-32-bits, e.g. 0xabcd1234abcd1234 instead of 0x00000000abcd1234.
-
-Cc: Sergey Temerkhanov <s.temerkhanov@gmail.com>
-Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
-Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
-Reviewed-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
----
- include/usb/xhci.h | 8 --------
- 1 file changed, 8 deletions(-)
-
-diff --git a/include/usb/xhci.h b/include/usb/xhci.h
-index 20e4a21066..1170c0ac69 100644
---- a/include/usb/xhci.h
-+++ b/include/usb/xhci.h
-@@ -1114,28 +1114,20 @@ static inline void xhci_writel(uint32_t volatile *regs, const unsigned int val)
-  */
- static inline u64 xhci_readq(__le64 volatile *regs)
- {
--#if BITS_PER_LONG == 64
--	return readq(regs);
--#else
- 	__u32 *ptr = (__u32 *)regs;
- 	u64 val_lo = readl(ptr);
- 	u64 val_hi = readl(ptr + 1);
- 	return val_lo + (val_hi << 32);
--#endif
- }
- 
- static inline void xhci_writeq(__le64 volatile *regs, const u64 val)
- {
--#if BITS_PER_LONG == 64
--	writeq(val, regs);
--#else
- 	__u32 *ptr = (__u32 *)regs;
- 	u32 val_lo = lower_32_bits(val);
- 	/* FIXME */
- 	u32 val_hi = upper_32_bits(val);
- 	writel(val_lo, ptr);
- 	writel(val_hi, ptr + 1);
--#endif
- }
- 
- int xhci_hcd_init(int index, struct xhci_hccr **ret_hccr,
--- 
-2.27.0
-

buildroot-external/patches/uboot/2020.07/0004-pci-Move-some-PCIe-register-offset-definitions-to-a-.patch

@@ -1,85 +0,0 @@
-From 82024c95e4d00b555f93d93b9f706c4d995ab302 Mon Sep 17 00:00:00 2001
-Message-Id: <82024c95e4d00b555f93d93b9f706c4d995ab302.1595101389.git.stefan@agner.ch>
-In-Reply-To: <040a141f84f2f84bf8be18f85b4cdb34bf066df0.1595101389.git.stefan@agner.ch>
-References: <040a141f84f2f84bf8be18f85b4cdb34bf066df0.1595101389.git.stefan@agner.ch>
-From: Sylwester Nawrocki <s.nawrocki@samsung.com>
-Date: Mon, 25 May 2020 13:39:53 +0200
-Subject: [PATCH 04/20] pci: Move some PCIe register offset definitions to a
- common header
-
-Some PCI Express register offsets are currently defined in multiple
-drivers, move them to a common header to avoid re-definitions and
-as a pre-requisite for adding new PCIe driver.
-While at it replace some spaces with tabs.
-
-Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
-Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
-Reviewed-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
----
- drivers/pci/pci-rcar-gen3.c   |  8 --------
- drivers/pci/pcie_intel_fpga.c |  3 ---
- include/pci.h                 | 13 +++++++++++--
- 3 files changed, 11 insertions(+), 13 deletions(-)
-
-diff --git a/drivers/pci/pci-rcar-gen3.c b/drivers/pci/pci-rcar-gen3.c
-index df7b37a592..1f51854ccc 100644
---- a/drivers/pci/pci-rcar-gen3.c
-+++ b/drivers/pci/pci-rcar-gen3.c
-@@ -118,14 +118,6 @@
- #define RCAR_PCI_MAX_RESOURCES	4
- #define MAX_NR_INBOUND_MAPS	6
- 
--#define PCI_EXP_FLAGS		2		/* Capabilities register */
--#define PCI_EXP_FLAGS_TYPE	0x00f0		/* Device/Port type */
--#define PCI_EXP_TYPE_ROOT_PORT	0x4		/* Root Port */
--#define PCI_EXP_LNKCAP		12		/* Link Capabilities */
--#define PCI_EXP_LNKCAP_DLLLARC	0x00100000	/* Data Link Layer Link Active Reporting Capable */
--#define PCI_EXP_SLTCAP		20		/* Slot Capabilities */
--#define PCI_EXP_SLTCAP_PSN	0xfff80000	/* Physical Slot Number */
--
- enum {
- 	RCAR_PCI_ACCESS_READ,
- 	RCAR_PCI_ACCESS_WRITE,
-diff --git a/drivers/pci/pcie_intel_fpga.c b/drivers/pci/pcie_intel_fpga.c
-index aa1903e547..9f102c64c6 100644
---- a/drivers/pci/pcie_intel_fpga.c
-+++ b/drivers/pci/pcie_intel_fpga.c
-@@ -67,9 +67,6 @@
- #define IS_ROOT_PORT(pcie, bdf)				\
- 		((PCI_BUS(bdf) == pcie->first_busno) ? true : false)
- 
--#define PCI_EXP_LNKSTA		18	/* Link Status */
--#define PCI_EXP_LNKSTA_DLLLA	0x2000	/* Data Link Layer Link Active */
--
- /**
-  * struct intel_fpga_pcie - Intel FPGA PCIe controller state
-  * @bus: Pointer to the PCI bus
-diff --git a/include/pci.h b/include/pci.h
-index 19c9244b94..9cd8564436 100644
---- a/include/pci.h
-+++ b/include/pci.h
-@@ -471,10 +471,19 @@
- #define  PCI_EA_FIELD_MASK	0xfffffffc	/* For Base & Max Offset */
- 
- /* PCI Express capabilities */
-+#define PCI_EXP_FLAGS		2	/* Capabilities register */
-+#define  PCI_EXP_FLAGS_TYPE	0x00f0	/* Device/Port type */
-+#define  PCI_EXP_TYPE_ROOT_PORT 0x4	/* Root Port */
- #define PCI_EXP_DEVCAP		4	/* Device capabilities */
--#define  PCI_EXP_DEVCAP_FLR     0x10000000 /* Function Level Reset */
-+#define  PCI_EXP_DEVCAP_FLR	0x10000000 /* Function Level Reset */
- #define PCI_EXP_DEVCTL		8	/* Device Control */
--#define  PCI_EXP_DEVCTL_BCR_FLR 0x8000  /* Bridge Configuration Retry / FLR */
-+#define  PCI_EXP_DEVCTL_BCR_FLR	0x8000  /* Bridge Configuration Retry / FLR */
-+#define PCI_EXP_LNKCAP		12	/* Link Capabilities */
-+#define  PCI_EXP_LNKCAP_DLLLARC	0x00100000 /* Data Link Layer Link Active Reporting Capable */
-+#define PCI_EXP_LNKSTA		18	/* Link Status */
-+#define  PCI_EXP_LNKSTA_DLLLA	0x2000	/* Data Link Layer Link Active */
-+#define PCI_EXP_SLTCAP		20	/* Slot Capabilities */
-+#define  PCI_EXP_SLTCAP_PSN	0xfff80000 /* Physical Slot Number */
- 
- /* Include the ID list */
- 
--- 
-2.27.0
-

buildroot-external/patches/uboot/2020.07/0005-rpi4-shorten-a-mapping-for-the-DRAM.patch

@@ -1,33 +0,0 @@
-From 5dddca0c2ca5de72b74a5fca0d3ea67251add760 Mon Sep 17 00:00:00 2001
-Message-Id: <5dddca0c2ca5de72b74a5fca0d3ea67251add760.1595101389.git.stefan@agner.ch>
-In-Reply-To: <040a141f84f2f84bf8be18f85b4cdb34bf066df0.1595101389.git.stefan@agner.ch>
-References: <040a141f84f2f84bf8be18f85b4cdb34bf066df0.1595101389.git.stefan@agner.ch>
-From: Marek Szyprowski <m.szyprowski@samsung.com>
-Date: Mon, 25 May 2020 13:39:54 +0200
-Subject: [PATCH 05/20] rpi4: shorten a mapping for the DRAM
-
-Remove the overlap between DRAM and device's IO area.
-
-Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
-Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
-Reviewed-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
----
- arch/arm/mach-bcm283x/init.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/arch/arm/mach-bcm283x/init.c b/arch/arm/mach-bcm283x/init.c
-index f4d00d892d..f9a5209480 100644
---- a/arch/arm/mach-bcm283x/init.c
-+++ b/arch/arm/mach-bcm283x/init.c
-@@ -39,7 +39,7 @@ static struct mm_region bcm2711_mem_map[] = {
- 	{
- 		.virt = 0x00000000UL,
- 		.phys = 0x00000000UL,
--		.size = 0xfe000000UL,
-+		.size = 0xfc000000UL,
- 		.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
- 			 PTE_BLOCK_INNER_SHARE
- 	}, {
--- 
-2.27.0
-

buildroot-external/patches/uboot/2020.07/0006-rpi4-add-a-mapping-for-the-PCIe-XHCI-controller-MMIO.patch

@@ -1,76 +0,0 @@
-From a326f58940f16b2dc3740fd9e87eb485da939ae5 Mon Sep 17 00:00:00 2001
-Message-Id: <a326f58940f16b2dc3740fd9e87eb485da939ae5.1595101389.git.stefan@agner.ch>
-In-Reply-To: <040a141f84f2f84bf8be18f85b4cdb34bf066df0.1595101389.git.stefan@agner.ch>
-References: <040a141f84f2f84bf8be18f85b4cdb34bf066df0.1595101389.git.stefan@agner.ch>
-From: Marek Szyprowski <m.szyprowski@samsung.com>
-Date: Mon, 25 May 2020 13:39:55 +0200
-Subject: [PATCH 06/20] rpi4: add a mapping for the PCIe XHCI controller MMIO
- registers (ARM 64bit)
-
-Create a non-cacheable mapping for the 0x600000000 physical memory region,
-where MMIO registers for the PCIe XHCI controller are instantiated by the
-PCIe bridge.
-
-Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
-Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
-Reviewed-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
----
- arch/arm/mach-bcm283x/init.c | 18 +++++++++++++++---
- 1 file changed, 15 insertions(+), 3 deletions(-)
-
-diff --git a/arch/arm/mach-bcm283x/init.c b/arch/arm/mach-bcm283x/init.c
-index f9a5209480..cf4c5b245d 100644
---- a/arch/arm/mach-bcm283x/init.c
-+++ b/arch/arm/mach-bcm283x/init.c
-@@ -12,10 +12,15 @@
- #include <dm/device.h>
- #include <fdt_support.h>
- 
-+#define BCM2711_RPI4_PCIE_XHCI_MMIO_PHYS	0x600000000UL
-+#define BCM2711_RPI4_PCIE_XHCI_MMIO_SIZE	0x800000UL
-+
- #ifdef CONFIG_ARM64
- #include <asm/armv8/mmu.h>
- 
--static struct mm_region bcm283x_mem_map[] = {
-+#define MEM_MAP_MAX_ENTRIES (4)
-+
-+static struct mm_region bcm283x_mem_map[MEM_MAP_MAX_ENTRIES] = {
- 	{
- 		.virt = 0x00000000UL,
- 		.phys = 0x00000000UL,
-@@ -35,7 +40,7 @@ static struct mm_region bcm283x_mem_map[] = {
- 	}
- };
- 
--static struct mm_region bcm2711_mem_map[] = {
-+static struct mm_region bcm2711_mem_map[MEM_MAP_MAX_ENTRIES] = {
- 	{
- 		.virt = 0x00000000UL,
- 		.phys = 0x00000000UL,
-@@ -49,6 +54,13 @@ static struct mm_region bcm2711_mem_map[] = {
- 		.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
- 			 PTE_BLOCK_NON_SHARE |
- 			 PTE_BLOCK_PXN | PTE_BLOCK_UXN
-+	}, {
-+		.virt = BCM2711_RPI4_PCIE_XHCI_MMIO_PHYS,
-+		.phys = BCM2711_RPI4_PCIE_XHCI_MMIO_PHYS,
-+		.size = BCM2711_RPI4_PCIE_XHCI_MMIO_SIZE,
-+		.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
-+			 PTE_BLOCK_NON_SHARE |
-+			 PTE_BLOCK_PXN | PTE_BLOCK_UXN
- 	}, {
- 		/* List terminator */
- 		0,
-@@ -72,7 +84,7 @@ static void _rpi_update_mem_map(struct mm_region *pd)
- {
- 	int i;
- 
--	for (i = 0; i < 2; i++) {
-+	for (i = 0; i < MEM_MAP_MAX_ENTRIES; i++) {
- 		mem_map[i].virt = pd[i].virt;
- 		mem_map[i].phys = pd[i].phys;
- 		mem_map[i].size = pd[i].size;
--- 
-2.27.0
-

buildroot-external/patches/uboot/2020.07/0007-linux-bitfield.h-Add-primitives-for-manipulating-bit.patch

@@ -1,85 +0,0 @@
-From 9c761488487ce27517e2a9e425f4ed0777708c53 Mon Sep 17 00:00:00 2001
-Message-Id: <9c761488487ce27517e2a9e425f4ed0777708c53.1595101389.git.stefan@agner.ch>
-In-Reply-To: <040a141f84f2f84bf8be18f85b4cdb34bf066df0.1595101389.git.stefan@agner.ch>
-References: <040a141f84f2f84bf8be18f85b4cdb34bf066df0.1595101389.git.stefan@agner.ch>
-From: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
-Date: Mon, 25 May 2020 13:39:56 +0200
-Subject: [PATCH 07/20] linux/bitfield.h: Add primitives for manipulating
- bitfields both in host- and fixed-endian
-
-Imports Al Viro's original Linux commit 00b0c9b82663a, which contains
-an in depth explanation and two fixes from Johannes Berg:
- e7d4a95da86e0 "bitfield: fix *_encode_bits()",
- 37a3862e12382 "bitfield: add u8 helpers".
-
-Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
-[s.nawrocki: added empty lines between functions and macros]
-Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
----
- include/linux/bitfield.h | 52 ++++++++++++++++++++++++++++++++++++++++
- 1 file changed, 52 insertions(+)
-
-diff --git a/include/linux/bitfield.h b/include/linux/bitfield.h
-index 8b9d6fff00..7ad8b088ed 100644
---- a/include/linux/bitfield.h
-+++ b/include/linux/bitfield.h
-@@ -103,4 +103,56 @@
- 		(typeof(_mask))(((_reg) & (_mask)) >> __bf_shf(_mask));	\
- 	})
- 
-+extern void __compiletime_error("value doesn't fit into mask")
-+__field_overflow(void);
-+extern void __compiletime_error("bad bitfield mask")
-+__bad_mask(void);
-+
-+static __always_inline u64 field_multiplier(u64 field)
-+{
-+	if ((field | (field - 1)) & ((field | (field - 1)) + 1))
-+		__bad_mask();
-+	return field & -field;
-+}
-+
-+static __always_inline u64 field_mask(u64 field)
-+{
-+	return field / field_multiplier(field);
-+}
-+
-+#define ____MAKE_OP(type, base, to, from)				\
-+static __always_inline __##type type##_encode_bits(base v, base field)	\
-+{									\
-+	if (__builtin_constant_p(v) && (v & ~field_mask(field)))	\
-+		__field_overflow();					\
-+	return to((v & field_mask(field)) * field_multiplier(field));	\
-+}									\
-+static __always_inline __##type type##_replace_bits(__##type old,	\
-+					base val, base field)		\
-+{									\
-+	return (old & ~to(field)) | type##_encode_bits(val, field);	\
-+}									\
-+static __always_inline void type##p_replace_bits(__##type * p,		\
-+					base val, base field)		\
-+{									\
-+	*p = (*p & ~to(field)) | type##_encode_bits(val, field);	\
-+}									\
-+static __always_inline base type##_get_bits(__##type v, base field)	\
-+{									\
-+	return (from(v) & field) / field_multiplier(field);		\
-+}
-+
-+#define __MAKE_OP(size)							\
-+	____MAKE_OP(le##size, u##size, cpu_to_le##size, le##size##_to_cpu) \
-+	____MAKE_OP(be##size, u##size, cpu_to_be##size, be##size##_to_cpu) \
-+	____MAKE_OP(u##size, u##size, ,)
-+
-+____MAKE_OP(u8, u8, ,)
-+__MAKE_OP(16)
-+__MAKE_OP(32)
-+__MAKE_OP(64)
-+
-+#undef __MAKE_OP
-+#undef ____MAKE_OP
-+
- #endif
--- 
-2.27.0
-

buildroot-external/patches/uboot/2020.07/0008-pci-Add-some-PCI-Express-capability-register-offset-.patch

@@ -1,47 +0,0 @@
-From 376bd33efa69abfc6102eb5a56b700c0f1981cf4 Mon Sep 17 00:00:00 2001
-Message-Id: <376bd33efa69abfc6102eb5a56b700c0f1981cf4.1595101389.git.stefan@agner.ch>
-In-Reply-To: <040a141f84f2f84bf8be18f85b4cdb34bf066df0.1595101389.git.stefan@agner.ch>
-References: <040a141f84f2f84bf8be18f85b4cdb34bf066df0.1595101389.git.stefan@agner.ch>
-From: Sylwester Nawrocki <s.nawrocki@samsung.com>
-Date: Mon, 25 May 2020 13:39:57 +0200
-Subject: [PATCH 08/20] pci: Add some PCI Express capability register offset
- definitions
-
-Add PCI Express capability definitions required by the Broadcom
-STB PCIe controller driver.
-
-Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
-Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
-Reviewed-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
----
- include/pci.h | 9 +++++++++
- 1 file changed, 9 insertions(+)
-
-diff --git a/include/pci.h b/include/pci.h
-index 9cd8564436..281f353916 100644
---- a/include/pci.h
-+++ b/include/pci.h
-@@ -479,11 +479,20 @@
- #define PCI_EXP_DEVCTL		8	/* Device Control */
- #define  PCI_EXP_DEVCTL_BCR_FLR	0x8000  /* Bridge Configuration Retry / FLR */
- #define PCI_EXP_LNKCAP		12	/* Link Capabilities */
-+#define  PCI_EXP_LNKCAP_SLS	0x0000000f /* Supported Link Speeds */
-+#define  PCI_EXP_LNKCAP_MLW	0x000003f0 /* Maximum Link Width */
- #define  PCI_EXP_LNKCAP_DLLLARC	0x00100000 /* Data Link Layer Link Active Reporting Capable */
- #define PCI_EXP_LNKSTA		18	/* Link Status */
-+#define  PCI_EXP_LNKSTA_CLS	0x000f	/* Current Link Speed */
-+#define  PCI_EXP_LNKSTA_CLS_2_5GB 0x0001 /* Current Link Speed 2.5GT/s */
-+#define  PCI_EXP_LNKSTA_CLS_5_0GB 0x0002 /* Current Link Speed 5.0GT/s */
-+#define  PCI_EXP_LNKSTA_CLS_8_0GB 0x0003 /* Current Link Speed 8.0GT/s */
-+#define  PCI_EXP_LNKSTA_NLW	0x03f0	/* Negotiated Link Width */
-+#define  PCI_EXP_LNKSTA_NLW_SHIFT 4	/* start of NLW mask in link status */
- #define  PCI_EXP_LNKSTA_DLLLA	0x2000	/* Data Link Layer Link Active */
- #define PCI_EXP_SLTCAP		20	/* Slot Capabilities */
- #define  PCI_EXP_SLTCAP_PSN	0xfff80000 /* Physical Slot Number */
-+#define PCI_EXP_LNKCTL2		48	/* Link Control 2 */
- 
- /* Include the ID list */
- 
--- 
-2.27.0
-

buildroot-external/patches/uboot/2020.07/0009-pci-Add-driver-for-Broadcom-BCM2711-SoC-PCIe-control.patch

@@ -1,686 +0,0 @@
-From 21a9b72b4a28398c9511f3d9e3c1adc1439a8870 Mon Sep 17 00:00:00 2001
-Message-Id: <21a9b72b4a28398c9511f3d9e3c1adc1439a8870.1595101389.git.stefan@agner.ch>
-In-Reply-To: <040a141f84f2f84bf8be18f85b4cdb34bf066df0.1595101389.git.stefan@agner.ch>
-References: <040a141f84f2f84bf8be18f85b4cdb34bf066df0.1595101389.git.stefan@agner.ch>
-From: Sylwester Nawrocki <s.nawrocki@samsung.com>
-Date: Mon, 25 May 2020 13:39:58 +0200
-Subject: [PATCH 09/20] pci: Add driver for Broadcom BCM2711 SoC PCIe
- controller
-
-This patch adds basic driver PCI Express controller found on Broadcom
-set-top-box SoCs, e.g. BCM2711.
-The code is based on Linux upstream driver (pcie-brcmstb.c) with MSI
-handling removed. The inbound access memory region is not currently
-parsed from dma-ranges DT property and a fixed 3GB region is used.
-
-The patch has been tested on RPI4 board, i.e. on BCM2711 SoC with VL805
-USB Host Controller.
-
-Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
-Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
----
- drivers/pci/Kconfig        |   9 +
- drivers/pci/Makefile       |   1 +
- drivers/pci/pcie_brcmstb.c | 623 +++++++++++++++++++++++++++++++++++++
- 3 files changed, 633 insertions(+)
- create mode 100644 drivers/pci/pcie_brcmstb.c
-
-diff --git a/drivers/pci/Kconfig b/drivers/pci/Kconfig
-index 6d8c22aacf..7e1e51d9ea 100644
---- a/drivers/pci/Kconfig
-+++ b/drivers/pci/Kconfig
-@@ -205,4 +205,13 @@ config PCIE_ROCKCHIP
- 	  Say Y here if you want to enable PCIe controller support on
- 	  Rockchip SoCs.
- 
-+config PCI_BRCMSTB
-+	bool "Broadcom STB PCIe controller"
-+	depends on DM_PCI
-+	depends on ARCH_BCM283X
-+	help
-+	  Say Y here if you want to enable support for PCIe controller
-+	  on Broadcom set-top-box (STB) SoCs.
-+	  This driver currently supports only BCM2711 SoC and RC mode
-+	  of the controller.
- endif
-diff --git a/drivers/pci/Makefile b/drivers/pci/Makefile
-index 955351c5c2..29092916a6 100644
---- a/drivers/pci/Makefile
-+++ b/drivers/pci/Makefile
-@@ -44,3 +44,4 @@ obj-$(CONFIG_PCIE_INTEL_FPGA) += pcie_intel_fpga.o
- obj-$(CONFIG_PCI_KEYSTONE) += pcie_dw_ti.o
- obj-$(CONFIG_PCIE_MEDIATEK) += pcie_mediatek.o
- obj-$(CONFIG_PCIE_ROCKCHIP) += pcie_rockchip.o pcie_rockchip_phy.o
-+obj-$(CONFIG_PCI_BRCMSTB) += pcie_brcmstb.o
-diff --git a/drivers/pci/pcie_brcmstb.c b/drivers/pci/pcie_brcmstb.c
-new file mode 100644
-index 0000000000..dade79e9c8
---- /dev/null
-+++ b/drivers/pci/pcie_brcmstb.c
-@@ -0,0 +1,623 @@
-+// SPDX-License-Identifier: GPL-2.0
-+/*
-+ * Broadcom STB PCIe controller driver
-+ *
-+ * Copyright (C) 2020 Samsung Electronics Co., Ltd.
-+ *
-+ * Based on upstream Linux kernel driver:
-+ * drivers/pci/controller/pcie-brcmstb.c
-+ * Copyright (C) 2009 - 2017 Broadcom
-+ *
-+ * Based driver by Nicolas Saenz Julienne
-+ * Copyright (C) 2020 Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
-+ */
-+
-+#include <common.h>
-+#include <errno.h>
-+#include <dm.h>
-+#include <dm/ofnode.h>
-+#include <pci.h>
-+#include <asm/io.h>
-+#include <linux/bitfield.h>
-+#include <linux/log2.h>
-+#include <linux/iopoll.h>
-+
-+/* Offset of the mandatory PCIe capability config registers */
-+#define BRCM_PCIE_CAP_REGS				0x00ac
-+
-+/* The PCIe controller register offsets */
-+#define PCIE_RC_CFG_VENDOR_SPECIFIC_REG1		0x0188
-+#define  VENDOR_SPECIFIC_REG1_ENDIAN_MODE_BAR2_MASK	0xc
-+#define  VENDOR_SPECIFIC_REG1_LITTLE_ENDIAN		0x0
-+
-+#define PCIE_RC_CFG_PRIV1_ID_VAL3			0x043c
-+#define  CFG_PRIV1_ID_VAL3_CLASS_CODE_MASK		0xffffff
-+
-+#define PCIE_RC_DL_MDIO_ADDR				0x1100
-+#define PCIE_RC_DL_MDIO_WR_DATA				0x1104
-+#define PCIE_RC_DL_MDIO_RD_DATA				0x1108
-+
-+#define PCIE_MISC_MISC_CTRL				0x4008
-+#define  MISC_CTRL_SCB_ACCESS_EN_MASK			0x1000
-+#define  MISC_CTRL_CFG_READ_UR_MODE_MASK		0x2000
-+#define  MISC_CTRL_MAX_BURST_SIZE_MASK			0x300000
-+#define  MISC_CTRL_MAX_BURST_SIZE_128			0x0
-+#define  MISC_CTRL_SCB0_SIZE_MASK			0xf8000000
-+
-+#define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_LO		0x400c
-+#define PCIE_MEM_WIN0_LO(win)	\
-+		PCIE_MISC_CPU_2_PCIE_MEM_WIN0_LO + ((win) * 4)
-+
-+#define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_HI		0x4010
-+#define PCIE_MEM_WIN0_HI(win)	\
-+		PCIE_MISC_CPU_2_PCIE_MEM_WIN0_HI + ((win) * 4)
-+
-+#define PCIE_MISC_RC_BAR1_CONFIG_LO			0x402c
-+#define  RC_BAR1_CONFIG_LO_SIZE_MASK			0x1f
-+
-+#define PCIE_MISC_RC_BAR2_CONFIG_LO			0x4034
-+#define  RC_BAR2_CONFIG_LO_SIZE_MASK			0x1f
-+#define PCIE_MISC_RC_BAR2_CONFIG_HI			0x4038
-+
-+#define PCIE_MISC_RC_BAR3_CONFIG_LO			0x403c
-+#define  RC_BAR3_CONFIG_LO_SIZE_MASK			0x1f
-+
-+#define PCIE_MISC_PCIE_STATUS				0x4068
-+#define  STATUS_PCIE_PORT_MASK				0x80
-+#define  STATUS_PCIE_PORT_SHIFT				7
-+#define  STATUS_PCIE_DL_ACTIVE_MASK			0x20
-+#define  STATUS_PCIE_DL_ACTIVE_SHIFT			5
-+#define  STATUS_PCIE_PHYLINKUP_MASK			0x10
-+#define  STATUS_PCIE_PHYLINKUP_SHIFT			4
-+
-+#define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_BASE_LIMIT	0x4070
-+#define  MEM_WIN0_BASE_LIMIT_LIMIT_MASK			0xfff00000
-+#define  MEM_WIN0_BASE_LIMIT_BASE_MASK			0xfff0
-+#define  MEM_WIN0_BASE_LIMIT_BASE_HI_SHIFT		12
-+#define PCIE_MEM_WIN0_BASE_LIMIT(win)	\
-+	 PCIE_MISC_CPU_2_PCIE_MEM_WIN0_BASE_LIMIT + ((win) * 4)
-+
-+#define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_BASE_HI		0x4080
-+#define  MEM_WIN0_BASE_HI_BASE_MASK			0xff
-+#define PCIE_MEM_WIN0_BASE_HI(win)	\
-+	 PCIE_MISC_CPU_2_PCIE_MEM_WIN0_BASE_HI + ((win) * 8)
-+
-+#define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_LIMIT_HI		0x4084
-+#define  PCIE_MEM_WIN0_LIMIT_HI_LIMIT_MASK		0xff
-+#define PCIE_MEM_WIN0_LIMIT_HI(win)	\
-+	 PCIE_MISC_CPU_2_PCIE_MEM_WIN0_LIMIT_HI + ((win) * 8)
-+
-+#define PCIE_MISC_HARD_PCIE_HARD_DEBUG			0x4204
-+#define  PCIE_HARD_DEBUG_CLKREQ_DEBUG_ENABLE_MASK	0x2
-+#define  PCIE_HARD_DEBUG_SERDES_IDDQ_MASK		0x08000000
-+
-+#define PCIE_MSI_INTR2_CLR				0x4508
-+#define PCIE_MSI_INTR2_MASK_SET				0x4510
-+
-+#define PCIE_EXT_CFG_DATA				0x8000
-+
-+#define PCIE_EXT_CFG_INDEX				0x9000
-+#define  PCIE_EXT_BUSNUM_SHIFT				20
-+#define  PCIE_EXT_SLOT_SHIFT				15
-+#define  PCIE_EXT_FUNC_SHIFT				12
-+
-+#define PCIE_RGR1_SW_INIT_1				0x9210
-+#define  RGR1_SW_INIT_1_PERST_MASK			0x1
-+#define  RGR1_SW_INIT_1_INIT_MASK			0x2
-+
-+/* PCIe parameters */
-+#define BRCM_NUM_PCIE_OUT_WINS				4
-+
-+/* MDIO registers */
-+#define MDIO_PORT0					0x0
-+#define MDIO_DATA_MASK					0x7fffffff
-+#define MDIO_DATA_SHIFT					0
-+#define MDIO_PORT_MASK					0xf0000
-+#define MDIO_PORT_SHIFT					16
-+#define MDIO_REGAD_MASK					0xffff
-+#define MDIO_REGAD_SHIFT				0
-+#define MDIO_CMD_MASK					0xfff00000
-+#define MDIO_CMD_SHIFT					20
-+#define MDIO_CMD_READ					0x1
-+#define MDIO_CMD_WRITE					0x0
-+#define MDIO_DATA_DONE_MASK				0x80000000
-+#define SSC_REGS_ADDR					0x1100
-+#define SET_ADDR_OFFSET					0x1f
-+#define SSC_CNTL_OFFSET					0x2
-+#define SSC_CNTL_OVRD_EN_MASK				0x8000
-+#define SSC_CNTL_OVRD_VAL_MASK				0x4000
-+#define SSC_STATUS_OFFSET				0x1
-+#define SSC_STATUS_SSC_MASK				0x400
-+#define SSC_STATUS_SSC_SHIFT				10
-+#define SSC_STATUS_PLL_LOCK_MASK			0x800
-+#define SSC_STATUS_PLL_LOCK_SHIFT			11
-+
-+/**
-+ * struct brcm_pcie - the PCIe controller state
-+ * @base: Base address of memory mapped IO registers of the controller
-+ * @gen: Non-zero value indicates limitation of the PCIe controller operation
-+ *       to a specific generation (1, 2 or 3)
-+ * @ssc: true indicates active Spread Spectrum Clocking operation
-+ */
-+struct brcm_pcie {
-+	void __iomem		*base;
-+
-+	int			gen;
-+	bool			ssc;
-+};
-+
-+/**
-+ * brcm_pcie_encode_ibar_size() - Encode the inbound "BAR" region size
-+ * @size: The inbound region size
-+ *
-+ * This function converts size of the inbound "BAR" region to the non-linear
-+ * values of the PCIE_MISC_RC_BAR[123]_CONFIG_LO register SIZE field.
-+ *
-+ * Return: The encoded inbound region size
-+ */
-+static int brcm_pcie_encode_ibar_size(u64 size)
-+{
-+	int log2_in = ilog2(size);
-+
-+	if (log2_in >= 12 && log2_in <= 15)
-+		/* Covers 4KB to 32KB (inclusive) */
-+		return (log2_in - 12) + 0x1c;
-+	else if (log2_in >= 16 && log2_in <= 37)
-+		/* Covers 64KB to 32GB, (inclusive) */
-+		return log2_in - 15;
-+
-+	/* Something is awry so disable */
-+	return 0;
-+}
-+
-+/**
-+ * brcm_pcie_rc_mode() - Check if PCIe controller is in RC mode
-+ * @pcie: Pointer to the PCIe controller state
-+ *
-+ * The controller is capable of serving in both RC and EP roles.
-+ *
-+ * Return: true for RC mode, false for EP mode.
-+ */
-+static bool brcm_pcie_rc_mode(struct brcm_pcie *pcie)
-+{
-+	u32 val;
-+
-+	val = readl(pcie->base + PCIE_MISC_PCIE_STATUS);
-+
-+	return (val & STATUS_PCIE_PORT_MASK) >> STATUS_PCIE_PORT_SHIFT;
-+}
-+
-+/**
-+ * brcm_pcie_link_up() - Check whether the PCIe link is up
-+ * @pcie: Pointer to the PCIe controller state
-+ *
-+ * Return: true if the link is up, false otherwise.
-+ */
-+static bool brcm_pcie_link_up(struct brcm_pcie *pcie)
-+{
-+	u32 val, dla, plu;
-+
-+	val = readl(pcie->base + PCIE_MISC_PCIE_STATUS);
-+	dla = (val & STATUS_PCIE_DL_ACTIVE_MASK) >> STATUS_PCIE_DL_ACTIVE_SHIFT;
-+	plu = (val & STATUS_PCIE_PHYLINKUP_MASK) >> STATUS_PCIE_PHYLINKUP_SHIFT;
-+
-+	return dla && plu;
-+}
-+
-+static int brcm_pcie_config_address(const struct udevice *dev, pci_dev_t bdf,
-+				    uint offset, void **paddress)
-+{
-+	struct brcm_pcie *pcie = dev_get_priv(dev);
-+	unsigned int pci_bus = PCI_BUS(bdf);
-+	unsigned int pci_dev = PCI_DEV(bdf);
-+	unsigned int pci_func = PCI_FUNC(bdf);
-+	int idx;
-+
-+	/*
-+	 * Busses 0 (host PCIe bridge) and 1 (its immediate child)
-+	 * are limited to a single device each
-+	 */
-+	if (pci_bus < 2 && pci_dev > 0)
-+		return -EINVAL;
-+
-+	/* Accesses to the RC go right to the RC registers */
-+	if (pci_bus == 0) {
-+		*paddress = pcie->base + offset;
-+		return 0;
-+	}
-+
-+	/* For devices, write to the config space index register */
-+	idx = (pci_bus << PCIE_EXT_BUSNUM_SHIFT)
-+		| (pci_dev << PCIE_EXT_SLOT_SHIFT)
-+		| (pci_func << PCIE_EXT_FUNC_SHIFT);
-+
-+	writel(idx, pcie->base + PCIE_EXT_CFG_INDEX);
-+	*paddress = pcie->base + PCIE_EXT_CFG_DATA + offset;
-+
-+	return 0;
-+}
-+
-+static int brcm_pcie_read_config(const struct udevice *bus, pci_dev_t bdf,
-+				 uint offset, ulong *valuep,
-+				 enum pci_size_t size)
-+{
-+	return pci_generic_mmap_read_config(bus, brcm_pcie_config_address,
-+					    bdf, offset, valuep, size);
-+}
-+
-+static int brcm_pcie_write_config(struct udevice *bus, pci_dev_t bdf,
-+				  uint offset, ulong value,
-+				  enum pci_size_t size)
-+{
-+	return pci_generic_mmap_write_config(bus, brcm_pcie_config_address,
-+					     bdf, offset, value, size);
-+}
-+
-+static const char *link_speed_to_str(unsigned int cls)
-+{
-+	switch (cls) {
-+	case PCI_EXP_LNKSTA_CLS_2_5GB: return "2.5";
-+	case PCI_EXP_LNKSTA_CLS_5_0GB: return "5.0";
-+	case PCI_EXP_LNKSTA_CLS_8_0GB: return "8.0";
-+	default:
-+		break;
-+	}
-+
-+	return "??";
-+}
-+
-+static u32 brcm_pcie_mdio_form_pkt(unsigned int port, unsigned int regad,
-+				   unsigned int cmd)
-+{
-+	u32 pkt;
-+
-+	pkt = (port << MDIO_PORT_SHIFT) & MDIO_PORT_MASK;
-+	pkt |= (regad << MDIO_REGAD_SHIFT) & MDIO_REGAD_MASK;
-+	pkt |= (cmd << MDIO_CMD_SHIFT) & MDIO_CMD_MASK;
-+
-+	return pkt;
-+}
-+
-+/**
-+ * brcm_pcie_mdio_read() - Perform a register read on the internal MDIO bus
-+ * @base: Pointer to the PCIe controller IO registers
-+ * @port: The MDIO port number
-+ * @regad: The register address
-+ * @val: A pointer at which to store the read value
-+ *
-+ * Return: 0 on success and register value in @val, negative error value
-+ *         on failure.
-+ */
-+static int brcm_pcie_mdio_read(void __iomem *base, unsigned int port,
-+			       unsigned int regad, u32 *val)
-+{
-+	u32 data, addr;
-+	int ret;
-+
-+	addr = brcm_pcie_mdio_form_pkt(port, regad, MDIO_CMD_READ);
-+	writel(addr, base + PCIE_RC_DL_MDIO_ADDR);
-+	readl(base + PCIE_RC_DL_MDIO_ADDR);
-+
-+	ret = readl_poll_timeout(base + PCIE_RC_DL_MDIO_RD_DATA, data,
-+				 (data & MDIO_DATA_DONE_MASK), 100);
-+
-+	*val = data & MDIO_DATA_MASK;
-+
-+	return ret;
-+}
-+
-+/**
-+ * brcm_pcie_mdio_write() - Perform a register write on the internal MDIO bus
-+ * @base: Pointer to the PCIe controller IO registers
-+ * @port: The MDIO port number
-+ * @regad: Address of the register
-+ * @wrdata: The value to write
-+ *
-+ * Return: 0 on success, negative error value on failure.
-+ */
-+static int brcm_pcie_mdio_write(void __iomem *base, unsigned int port,
-+				unsigned int regad, u16 wrdata)
-+{
-+	u32 data, addr;
-+
-+	addr = brcm_pcie_mdio_form_pkt(port, regad, MDIO_CMD_WRITE);
-+	writel(addr, base + PCIE_RC_DL_MDIO_ADDR);
-+	readl(base + PCIE_RC_DL_MDIO_ADDR);
-+	writel(MDIO_DATA_DONE_MASK | wrdata, base + PCIE_RC_DL_MDIO_WR_DATA);
-+
-+	return readl_poll_timeout(base + PCIE_RC_DL_MDIO_WR_DATA, data,
-+				  !(data & MDIO_DATA_DONE_MASK), 100);
-+}
-+
-+/**
-+ * brcm_pcie_set_ssc() - Configure the controller for Spread Spectrum Clocking
-+ * @base: pointer to the PCIe controller IO registers
-+ *
-+ * Return: 0 on success, negative error value on failure.
-+ */
-+static int brcm_pcie_set_ssc(void __iomem *base)
-+{
-+	int pll, ssc;
-+	int ret;
-+	u32 tmp;
-+
-+	ret = brcm_pcie_mdio_write(base, MDIO_PORT0, SET_ADDR_OFFSET,
-+				   SSC_REGS_ADDR);
-+	if (ret < 0)
-+		return ret;
-+
-+	ret = brcm_pcie_mdio_read(base, MDIO_PORT0, SSC_CNTL_OFFSET, &tmp);
-+	if (ret < 0)
-+		return ret;
-+
-+	tmp |= (SSC_CNTL_OVRD_EN_MASK | SSC_CNTL_OVRD_VAL_MASK);
-+
-+	ret = brcm_pcie_mdio_write(base, MDIO_PORT0, SSC_CNTL_OFFSET, tmp);
-+	if (ret < 0)
-+		return ret;
-+
-+	udelay(1000);
-+	ret = brcm_pcie_mdio_read(base, MDIO_PORT0, SSC_STATUS_OFFSET, &tmp);
-+	if (ret < 0)
-+		return ret;
-+
-+	ssc = (tmp & SSC_STATUS_SSC_MASK) >> SSC_STATUS_SSC_SHIFT;
-+	pll = (tmp & SSC_STATUS_PLL_LOCK_MASK) >> SSC_STATUS_PLL_LOCK_SHIFT;
-+
-+	return ssc && pll ? 0 : -EIO;
-+}
-+
-+/**
-+ * brcm_pcie_set_gen() - Limits operation to a specific generation (1, 2 or 3)
-+ * @pcie: pointer to the PCIe controller state
-+ * @gen: PCIe generation to limit the controller's operation to
-+ */
-+static void brcm_pcie_set_gen(struct brcm_pcie *pcie, unsigned int gen)
-+{
-+	void __iomem *cap_base = pcie->base + BRCM_PCIE_CAP_REGS;
-+
-+	u16 lnkctl2 = readw(cap_base + PCI_EXP_LNKCTL2);
-+	u32 lnkcap = readl(cap_base + PCI_EXP_LNKCAP);
-+
-+	lnkcap = (lnkcap & ~PCI_EXP_LNKCAP_SLS) | gen;
-+	writel(lnkcap, cap_base + PCI_EXP_LNKCAP);
-+
-+	lnkctl2 = (lnkctl2 & ~0xf) | gen;
-+	writew(lnkctl2, cap_base + PCI_EXP_LNKCTL2);
-+}
-+
-+static void brcm_pcie_set_outbound_win(struct brcm_pcie *pcie,
-+				       unsigned int win, u64 phys_addr,
-+				       u64 pcie_addr, u64 size)
-+{
-+	void __iomem *base = pcie->base;
-+	u32 phys_addr_mb_high, limit_addr_mb_high;
-+	phys_addr_t phys_addr_mb, limit_addr_mb;
-+	int high_addr_shift;
-+	u32 tmp;
-+
-+	/* Set the base of the pcie_addr window */
-+	writel(lower_32_bits(pcie_addr), base + PCIE_MEM_WIN0_LO(win));
-+	writel(upper_32_bits(pcie_addr), base + PCIE_MEM_WIN0_HI(win));
-+
-+	/* Write the addr base & limit lower bits (in MBs) */
-+	phys_addr_mb = phys_addr / SZ_1M;
-+	limit_addr_mb = (phys_addr + size - 1) / SZ_1M;
-+
-+	tmp = readl(base + PCIE_MEM_WIN0_BASE_LIMIT(win));
-+	u32p_replace_bits(&tmp, phys_addr_mb,
-+			  MEM_WIN0_BASE_LIMIT_BASE_MASK);
-+	u32p_replace_bits(&tmp, limit_addr_mb,
-+			  MEM_WIN0_BASE_LIMIT_LIMIT_MASK);
-+	writel(tmp, base + PCIE_MEM_WIN0_BASE_LIMIT(win));
-+
-+	/* Write the cpu & limit addr upper bits */
-+	high_addr_shift = MEM_WIN0_BASE_LIMIT_BASE_HI_SHIFT;
-+	phys_addr_mb_high = phys_addr_mb >> high_addr_shift;
-+	tmp = readl(base + PCIE_MEM_WIN0_BASE_HI(win));
-+	u32p_replace_bits(&tmp, phys_addr_mb_high,
-+			  MEM_WIN0_BASE_HI_BASE_MASK);
-+	writel(tmp, base + PCIE_MEM_WIN0_BASE_HI(win));
-+
-+	limit_addr_mb_high = limit_addr_mb >> high_addr_shift;
-+	tmp = readl(base + PCIE_MEM_WIN0_LIMIT_HI(win));
-+	u32p_replace_bits(&tmp, limit_addr_mb_high,
-+			  PCIE_MEM_WIN0_LIMIT_HI_LIMIT_MASK);
-+	writel(tmp, base + PCIE_MEM_WIN0_LIMIT_HI(win));
-+}
-+
-+static int brcm_pcie_probe(struct udevice *dev)
-+{
-+	struct udevice *ctlr = pci_get_controller(dev);
-+	struct pci_controller *hose = dev_get_uclass_priv(ctlr);
-+	struct brcm_pcie *pcie = dev_get_priv(dev);
-+	void __iomem *base = pcie->base;
-+	bool ssc_good = false;
-+	int num_out_wins = 0;
-+	u64 rc_bar2_offset, rc_bar2_size;
-+	unsigned int scb_size_val;
-+	int i, ret;
-+	u16 nlw, cls, lnksta;
-+	u32 tmp;
-+
-+	/*
-+	 * Reset the bridge, assert the fundamental reset. Note for some SoCs,
-+	 * e.g. BCM7278, the fundamental reset should not be asserted here.
-+	 * This will need to be changed when support for other SoCs is added.
-+	 */
-+	setbits_le32(base + PCIE_RGR1_SW_INIT_1,
-+		     RGR1_SW_INIT_1_INIT_MASK | RGR1_SW_INIT_1_PERST_MASK);
-+	/*
-+	 * The delay is a safety precaution to preclude the reset signal
-+	 * from looking like a glitch.
-+	 */
-+	udelay(100);
-+
-+	/* Take the bridge out of reset */
-+	clrbits_le32(base + PCIE_RGR1_SW_INIT_1, RGR1_SW_INIT_1_INIT_MASK);
-+
-+	clrbits_le32(base + PCIE_MISC_HARD_PCIE_HARD_DEBUG,
-+		     PCIE_HARD_DEBUG_SERDES_IDDQ_MASK);
-+
-+	/* Wait for SerDes to be stable */
-+	udelay(100);
-+
-+	/* Set SCB_MAX_BURST_SIZE, CFG_READ_UR_MODE, SCB_ACCESS_EN */
-+	clrsetbits_le32(base + PCIE_MISC_MISC_CTRL,
-+			MISC_CTRL_MAX_BURST_SIZE_MASK,
-+			MISC_CTRL_SCB_ACCESS_EN_MASK |
-+			MISC_CTRL_CFG_READ_UR_MODE_MASK |
-+			MISC_CTRL_MAX_BURST_SIZE_128);
-+	/*
-+	 * TODO: When support for other SoCs than BCM2711 is added we may
-+	 * need to use the base address and size(s) provided in the dma-ranges
-+	 * property.
-+	 */
-+	rc_bar2_offset = 0;
-+	rc_bar2_size = 0xc0000000;
-+
-+	tmp = lower_32_bits(rc_bar2_offset);
-+	u32p_replace_bits(&tmp, brcm_pcie_encode_ibar_size(rc_bar2_size),
-+			  RC_BAR2_CONFIG_LO_SIZE_MASK);
-+	writel(tmp, base + PCIE_MISC_RC_BAR2_CONFIG_LO);
-+	writel(upper_32_bits(rc_bar2_offset),
-+	       base + PCIE_MISC_RC_BAR2_CONFIG_HI);
-+
-+	scb_size_val = rc_bar2_size ?
-+		       ilog2(rc_bar2_size) - 15 : 0xf; /* 0xf is 1GB */
-+
-+	tmp = readl(base + PCIE_MISC_MISC_CTRL);
-+	u32p_replace_bits(&tmp, scb_size_val,
-+			  MISC_CTRL_SCB0_SIZE_MASK);
-+	writel(tmp, base + PCIE_MISC_MISC_CTRL);
-+
-+	/* Disable the PCIe->GISB memory window (RC_BAR1) */
-+	clrbits_le32(base + PCIE_MISC_RC_BAR1_CONFIG_LO,
-+		     RC_BAR1_CONFIG_LO_SIZE_MASK);
-+
-+	/* Disable the PCIe->SCB memory window (RC_BAR3) */
-+	clrbits_le32(base + PCIE_MISC_RC_BAR3_CONFIG_LO,
-+		     RC_BAR3_CONFIG_LO_SIZE_MASK);
-+
-+	/* Mask all interrupts since we are not handling any yet */
-+	writel(0xffffffff, base + PCIE_MSI_INTR2_MASK_SET);
-+
-+	/* Clear any interrupts we find on boot */
-+	writel(0xffffffff, base + PCIE_MSI_INTR2_CLR);
-+
-+	if (pcie->gen)
-+		brcm_pcie_set_gen(pcie, pcie->gen);
-+
-+	/* Unassert the fundamental reset */
-+	clrbits_le32(pcie->base + PCIE_RGR1_SW_INIT_1,
-+		     RGR1_SW_INIT_1_PERST_MASK);
-+
-+	/* Give the RC/EP time to wake up, before trying to configure RC.
-+	 * Intermittently check status for link-up, up to a total of 100ms.
-+	 */
-+	for (i = 0; i < 100 && !brcm_pcie_link_up(pcie); i += 5)
-+		mdelay(5);
-+
-+	if (!brcm_pcie_link_up(pcie)) {
-+		printf("PCIe BRCM: link down\n");
-+		return -EINVAL;
-+	}
-+
-+	if (!brcm_pcie_rc_mode(pcie)) {
-+		printf("PCIe misconfigured; is in EP mode\n");
-+		return -EINVAL;
-+	}
-+
-+	for (i = 0; i < hose->region_count; i++) {
-+		struct pci_region *reg = &hose->regions[i];
-+
-+		if (reg->flags != PCI_REGION_MEM)
-+			continue;
-+
-+		if (num_out_wins >= BRCM_NUM_PCIE_OUT_WINS)
-+			return -EINVAL;
-+
-+		brcm_pcie_set_outbound_win(pcie, num_out_wins, reg->phys_start,
-+					   reg->bus_start, reg->size);
-+
-+		num_out_wins++;
-+	}
-+
-+	/*
-+	 * For config space accesses on the RC, show the right class for
-+	 * a PCIe-PCIe bridge (the default setting is to be EP mode).
-+	 */
-+	clrsetbits_le32(base + PCIE_RC_CFG_PRIV1_ID_VAL3,
-+			CFG_PRIV1_ID_VAL3_CLASS_CODE_MASK, 0x060400);
-+
-+	if (pcie->ssc) {
-+		ret = brcm_pcie_set_ssc(pcie->base);
-+		if (!ret)
-+			ssc_good = true;
-+		else
-+			printf("PCIe BRCM: failed attempt to enter SSC mode\n");
-+	}
-+
-+	lnksta = readw(base + BRCM_PCIE_CAP_REGS + PCI_EXP_LNKSTA);
-+	cls = lnksta & PCI_EXP_LNKSTA_CLS;
-+	nlw = (lnksta & PCI_EXP_LNKSTA_NLW) >> PCI_EXP_LNKSTA_NLW_SHIFT;
-+
-+	printf("PCIe BRCM: link up, %s Gbps x%u %s\n", link_speed_to_str(cls),
-+	       nlw, ssc_good ? "(SSC)" : "(!SSC)");
-+
-+	/* PCIe->SCB endian mode for BAR */
-+	clrsetbits_le32(base + PCIE_RC_CFG_VENDOR_SPECIFIC_REG1,
-+			VENDOR_SPECIFIC_REG1_ENDIAN_MODE_BAR2_MASK,
-+			VENDOR_SPECIFIC_REG1_LITTLE_ENDIAN);
-+	/*
-+	 * Refclk from RC should be gated with CLKREQ# input when ASPM L0s,L1
-+	 * is enabled => setting the CLKREQ_DEBUG_ENABLE field to 1.
-+	 */
-+	setbits_le32(base + PCIE_MISC_HARD_PCIE_HARD_DEBUG,
-+		     PCIE_HARD_DEBUG_CLKREQ_DEBUG_ENABLE_MASK);
-+
-+	return 0;
-+}
-+
-+static int brcm_pcie_ofdata_to_platdata(struct udevice *dev)
-+{
-+	struct brcm_pcie *pcie = dev_get_priv(dev);
-+	ofnode dn = dev_ofnode(dev);
-+	u32 max_link_speed;
-+	int ret;
-+
-+	/* Get the controller base address */
-+	pcie->base = dev_read_addr_ptr(dev);
-+	if (!pcie->base)
-+		return -EINVAL;
-+
-+	pcie->ssc = ofnode_read_bool(dn, "brcm,enable-ssc");
-+
-+	ret = ofnode_read_u32(dn, "max-link-speed", &max_link_speed);
-+	if (ret < 0 || max_link_speed > 4)
-+		pcie->gen = 0;
-+	else
-+		pcie->gen = max_link_speed;
-+
-+	return 0;
-+}
-+
-+static const struct dm_pci_ops brcm_pcie_ops = {
-+	.read_config	= brcm_pcie_read_config,
-+	.write_config	= brcm_pcie_write_config,
-+};
-+
-+static const struct udevice_id brcm_pcie_ids[] = {
-+	{ .compatible = "brcm,bcm2711-pcie" },
-+	{ }
-+};
-+
-+U_BOOT_DRIVER(pcie_brcm_base) = {
-+	.name			= "pcie_brcm",
-+	.id			= UCLASS_PCI,
-+	.ops			= &brcm_pcie_ops,
-+	.of_match		= brcm_pcie_ids,
-+	.probe			= brcm_pcie_probe,
-+	.ofdata_to_platdata	= brcm_pcie_ofdata_to_platdata,
-+	.priv_auto_alloc_size	= sizeof(struct brcm_pcie),
-+};
--- 
-2.27.0
-

buildroot-external/patches/uboot/2020.07/0010-configs-Enable-support-for-the-XHCI-controller-on-RP.patch

@@ -1,102 +0,0 @@
-From 66537b5984af81b5add420df9eb64c508268f581 Mon Sep 17 00:00:00 2001
-Message-Id: <66537b5984af81b5add420df9eb64c508268f581.1595101389.git.stefan@agner.ch>
-In-Reply-To: <040a141f84f2f84bf8be18f85b4cdb34bf066df0.1595101389.git.stefan@agner.ch>
-References: <040a141f84f2f84bf8be18f85b4cdb34bf066df0.1595101389.git.stefan@agner.ch>
-From: Marek Szyprowski <m.szyprowski@samsung.com>
-Date: Mon, 25 May 2020 13:39:59 +0200
-Subject: [PATCH 10/20] configs: Enable support for the XHCI controller on RPI4
- board (ARM 64-bit)
-
-This requires enabling BRCMSTB PCIe and XHCI_PCI drivers as well as PCI
-and USB commands. To get it working one has to call the following commands:
-"pci enum; usb start;", thus such commands have been added to the default
-"preboot" environment variable. One has to update their environment if it
-is already configured to get this feature working out of the box.
-
-Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
-Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
----
- configs/rpi_4_defconfig     | 9 +++++++++
- configs/rpi_arm64_defconfig | 8 +++++++-
- 2 files changed, 16 insertions(+), 1 deletion(-)
-
-diff --git a/configs/rpi_4_defconfig b/configs/rpi_4_defconfig
-index f0301dc8bc..b42efe6072 100644
---- a/configs/rpi_4_defconfig
-+++ b/configs/rpi_4_defconfig
-@@ -6,6 +6,8 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000
- CONFIG_ENV_SIZE=0x4000
- CONFIG_DISTRO_DEFAULTS=y
- CONFIG_OF_BOARD_SETUP=y
-+CONFIG_USE_PREBOOT=y
-+CONFIG_PREBOOT="pci enum; usb start;"
- CONFIG_MISC_INIT_R=y
- # CONFIG_DISPLAY_CPUINFO is not set
- # CONFIG_DISPLAY_BOARDINFO is not set
-@@ -13,6 +15,8 @@ CONFIG_SYS_PROMPT="U-Boot> "
- CONFIG_CMD_DFU=y
- CONFIG_CMD_GPIO=y
- CONFIG_CMD_MMC=y
-+CONFIG_CMD_PCI=y
-+CONFIG_CMD_USB=y
- CONFIG_CMD_FS_UUID=y
- CONFIG_OF_BOARD=y
- CONFIG_ENV_FAT_DEVICE_AND_PART="0:1"
-@@ -26,12 +30,17 @@ CONFIG_MMC_SDHCI_SDMA=y
- CONFIG_MMC_SDHCI_BCM2835=y
- CONFIG_DM_ETH=y
- CONFIG_BCMGENET=y
-+CONFIG_PCI=y
-+CONFIG_DM_PCI=y
-+CONFIG_PCI_BRCMSTB=y
- CONFIG_PINCTRL=y
- # CONFIG_PINCTRL_GENERIC is not set
- # CONFIG_REQUIRE_SERIAL_CONSOLE is not set
- CONFIG_USB=y
- CONFIG_DM_USB=y
- CONFIG_DM_USB_GADGET=y
-+CONFIG_USB_XHCI_HCD=y
-+CONFIG_USB_XHCI_PCI=y
- CONFIG_USB_GADGET=y
- CONFIG_USB_GADGET_MANUFACTURER="FSL"
- CONFIG_USB_GADGET_VENDOR_NUM=0x0525
-diff --git a/configs/rpi_arm64_defconfig b/configs/rpi_arm64_defconfig
-index d16c2388af..0feea7f0be 100644
---- a/configs/rpi_arm64_defconfig
-+++ b/configs/rpi_arm64_defconfig
-@@ -7,13 +7,14 @@ CONFIG_ENV_SIZE=0x4000
- CONFIG_DISTRO_DEFAULTS=y
- CONFIG_OF_BOARD_SETUP=y
- CONFIG_USE_PREBOOT=y
--CONFIG_PREBOOT="usb start"
-+CONFIG_PREBOOT="pci enum; usb start;"
- CONFIG_MISC_INIT_R=y
- # CONFIG_DISPLAY_CPUINFO is not set
- # CONFIG_DISPLAY_BOARDINFO is not set
- CONFIG_SYS_PROMPT="U-Boot> "
- CONFIG_CMD_GPIO=y
- CONFIG_CMD_MMC=y
-+CONFIG_CMD_PCI=y
- CONFIG_CMD_USB=y
- CONFIG_CMD_FS_UUID=y
- CONFIG_OF_BOARD=y
-@@ -26,11 +27,16 @@ CONFIG_MMC_SDHCI_SDMA=y
- CONFIG_MMC_SDHCI_BCM2835=y
- CONFIG_DM_ETH=y
- CONFIG_BCMGENET=y
-+CONFIG_PCI=y
-+CONFIG_DM_PCI=y
-+CONFIG_PCI_BRCMSTB=y
- CONFIG_PINCTRL=y
- # CONFIG_PINCTRL_GENERIC is not set
- # CONFIG_REQUIRE_SERIAL_CONSOLE is not set
- CONFIG_USB=y
- CONFIG_DM_USB=y
-+CONFIG_USB_XHCI_HCD=y
-+CONFIG_USB_XHCI_PCI=y
- CONFIG_USB_DWC2=y
- CONFIG_USB_KEYBOARD=y
- CONFIG_USB_HOST_ETHER=y
--- 
-2.27.0
-

buildroot-external/patches/uboot/2020.07/0011-arm-rpi-Add-function-to-trigger-VL805-s-firmware-loa.patch

@@ -1,131 +0,0 @@
-From 2899e2cbe5412ee6f6a01855467fa37534ffc2be Mon Sep 17 00:00:00 2001
-Message-Id: <2899e2cbe5412ee6f6a01855467fa37534ffc2be.1595101389.git.stefan@agner.ch>
-In-Reply-To: <040a141f84f2f84bf8be18f85b4cdb34bf066df0.1595101389.git.stefan@agner.ch>
-References: <040a141f84f2f84bf8be18f85b4cdb34bf066df0.1595101389.git.stefan@agner.ch>
-From: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
-Date: Mon, 29 Jun 2020 18:37:22 +0200
-Subject: [PATCH 11/20] arm: rpi: Add function to trigger VL805's firmware load
-
-On the Raspberry Pi 4, after a PCI reset, VL805's (a xHCI chip) firmware
-may either be loaded directly from an EEPROM or, if not present, by the
-SoC's VideCore (the SoC's co-processor). Introduce the function that
-informs VideCore that VL805 may need its firmware loaded.
-
-Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
----
- arch/arm/mach-bcm283x/include/mach/mbox.h | 13 +++++++
- arch/arm/mach-bcm283x/include/mach/msg.h  |  7 ++++
- arch/arm/mach-bcm283x/msg.c               | 46 +++++++++++++++++++++++
- 3 files changed, 66 insertions(+)
-
-diff --git a/arch/arm/mach-bcm283x/include/mach/mbox.h b/arch/arm/mach-bcm283x/include/mach/mbox.h
-index 60e226ce1d..2ae2d3d97c 100644
---- a/arch/arm/mach-bcm283x/include/mach/mbox.h
-+++ b/arch/arm/mach-bcm283x/include/mach/mbox.h
-@@ -491,6 +491,19 @@ struct bcm2835_mbox_tag_set_palette {
- 	} body;
- };
- 
-+#define BCM2835_MBOX_TAG_NOTIFY_XHCI_RESET          0x00030058
-+
-+struct bcm2835_mbox_tag_pci_dev_addr {
-+	struct bcm2835_mbox_tag_hdr tag_hdr;
-+	union {
-+		struct {
-+			u32 dev_addr;
-+		} req;
-+		struct {
-+		} resp;
-+	} body;
-+};
-+
- /*
-  * Pass a raw u32 message to the VC, and receive a raw u32 back.
-  *
-diff --git a/arch/arm/mach-bcm283x/include/mach/msg.h b/arch/arm/mach-bcm283x/include/mach/msg.h
-index 4afb08631b..e45c1bf010 100644
---- a/arch/arm/mach-bcm283x/include/mach/msg.h
-+++ b/arch/arm/mach-bcm283x/include/mach/msg.h
-@@ -48,4 +48,11 @@ int bcm2835_set_video_params(int *widthp, int *heightp, int depth_bpp,
- 			     int pixel_order, int alpha_mode, ulong *fb_basep,
- 			     ulong *fb_sizep, int *pitchp);
- 
-+/**
-+ * bcm2711_load_vl805_firmware() - get vl805's firmware loaded
-+ *
-+ * @return 0 if OK, -EIO on error
-+ */
-+int bcm2711_notify_vl805_reset(void);
-+
- #endif
-diff --git a/arch/arm/mach-bcm283x/msg.c b/arch/arm/mach-bcm283x/msg.c
-index 94b75283f8..347aece3cd 100644
---- a/arch/arm/mach-bcm283x/msg.c
-+++ b/arch/arm/mach-bcm283x/msg.c
-@@ -7,6 +7,7 @@
- #include <memalign.h>
- #include <phys2bus.h>
- #include <asm/arch/mbox.h>
-+#include <linux/delay.h>
- 
- struct msg_set_power_state {
- 	struct bcm2835_mbox_hdr hdr;
-@@ -40,6 +41,12 @@ struct msg_setup {
- 	u32 end_tag;
- };
- 
-+struct msg_notify_vl805_reset {
-+	struct bcm2835_mbox_hdr hdr;
-+	struct bcm2835_mbox_tag_pci_dev_addr dev_addr;
-+	u32 end_tag;
-+};
-+
- int bcm2835_power_on_module(u32 module)
- {
- 	ALLOC_CACHE_ALIGN_BUFFER(struct msg_set_power_state, msg_pwr, 1);
-@@ -151,3 +158,42 @@ int bcm2835_set_video_params(int *widthp, int *heightp, int depth_bpp,
- 
- 	return 0;
- }
-+
-+/*
-+ * On the Raspberry Pi 4, after a PCI reset, VL805's (the xHCI chip) firmware
-+ * may either be loaded directly from an EEPROM or, if not present, by the
-+ * SoC's VideoCore. This informs VideoCore that VL805 needs its firmware
-+ * loaded.
-+ */
-+int bcm2711_notify_vl805_reset(void)
-+{
-+	ALLOC_CACHE_ALIGN_BUFFER(struct msg_notify_vl805_reset,
-+				 msg_notify_vl805_reset, 1);
-+	int ret;
-+
-+	BCM2835_MBOX_INIT_HDR(msg_notify_vl805_reset);
-+	BCM2835_MBOX_INIT_TAG(&msg_notify_vl805_reset->dev_addr,
-+			      NOTIFY_XHCI_RESET);
-+
-+	/*
-+	 * The pci device address is expected like this:
-+	 *
-+	 *   PCI_BUS << 20 | PCI_SLOT << 15 | PCI_FUNC << 12
-+	 *
-+	 * But since RPi4's PCIe setup is hardwired, we know the address in
-+	 * advance.
-+	 */
-+	msg_notify_vl805_reset->dev_addr.body.req.dev_addr = 0x100000;
-+
-+	ret = bcm2835_mbox_call_prop(BCM2835_MBOX_PROP_CHAN,
-+				     &msg_notify_vl805_reset->hdr);
-+	if (ret) {
-+		printf("bcm2711: Faild to load vl805's firmware, %d\n", ret);
-+		return -EIO;
-+	}
-+
-+	udelay(200);
-+
-+	return 0;
-+}
-+
--- 
-2.27.0
-

buildroot-external/patches/uboot/2020.07/0012-reset-Add-Raspberry-Pi-4-firmware-reset-controller.patch

@@ -1,140 +0,0 @@
-From e9925f97c2c31253e1ff62de4049d90e19884f55 Mon Sep 17 00:00:00 2001
-Message-Id: <e9925f97c2c31253e1ff62de4049d90e19884f55.1595101389.git.stefan@agner.ch>
-In-Reply-To: <040a141f84f2f84bf8be18f85b4cdb34bf066df0.1595101389.git.stefan@agner.ch>
-References: <040a141f84f2f84bf8be18f85b4cdb34bf066df0.1595101389.git.stefan@agner.ch>
-From: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
-Date: Mon, 29 Jun 2020 18:37:23 +0200
-Subject: [PATCH 12/20] reset: Add Raspberry Pi 4 firmware reset controller
-
-Raspberry Pi 4's co-processor controls some of the board's HW
-initialization process, but it's up to Linux to trigger it when
-relevant. Introduce a reset controller capable of interfacing with
-RPi4's co-processor that models these firmware initialization routines as
-reset lines.
-
-Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
----
- drivers/reset/Kconfig                         | 10 ++++
- drivers/reset/Makefile                        |  1 +
- drivers/reset/reset-raspberrypi.c             | 60 +++++++++++++++++++
- .../reset/raspberrypi,firmware-reset.h        | 13 ++++
- 4 files changed, 84 insertions(+)
- create mode 100644 drivers/reset/reset-raspberrypi.c
- create mode 100644 include/dt-bindings/reset/raspberrypi,firmware-reset.h
-
-diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
-index 88d3be1593..d02c1522e5 100644
---- a/drivers/reset/Kconfig
-+++ b/drivers/reset/Kconfig
-@@ -148,4 +148,14 @@ config RESET_IMX7
- 	help
- 	  Support for reset controller on i.MX7/8 SoCs.
- 
-+config RESET_RASPBERRYPI
-+	bool "Raspberry Pi 4 Firmware Reset Controller Driver"
-+	depends on DM_RESET && ARCH_BCM283X
-+	default USB_XHCI_PCI
-+	help
-+	  Raspberry Pi 4's co-processor controls some of the board's HW
-+	  initialization process, but it's up to Linux to trigger it when
-+	  relevant. This driver provides a reset controller capable of
-+	  interfacing with RPi4's co-processor and model these firmware
-+	  initialization routines as reset lines.
- endmenu
-diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile
-index 0a044d5d8c..be54dae725 100644
---- a/drivers/reset/Makefile
-+++ b/drivers/reset/Makefile
-@@ -23,3 +23,4 @@ obj-$(CONFIG_RESET_MTMIPS) += reset-mtmips.o
- obj-$(CONFIG_RESET_SUNXI) += reset-sunxi.o
- obj-$(CONFIG_RESET_HISILICON) += reset-hisilicon.o
- obj-$(CONFIG_RESET_IMX7) += reset-imx7.o
-+obj-$(CONFIG_RESET_RASPBERRYPI) += reset-raspberrypi.o
-diff --git a/drivers/reset/reset-raspberrypi.c b/drivers/reset/reset-raspberrypi.c
-new file mode 100644
-index 0000000000..e2d284e5ac
---- /dev/null
-+++ b/drivers/reset/reset-raspberrypi.c
-@@ -0,0 +1,60 @@
-+// SPDX-License-Identifier: GPL-2.0
-+/*
-+ * Raspberry Pi 4 firmware reset driver
-+ *
-+ * Copyright (C) 2020 Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
-+ */
-+#include <common.h>
-+#include <dm.h>
-+#include <reset-uclass.h>
-+#include <asm/arch/msg.h>
-+#include <dt-bindings/reset/raspberrypi,firmware-reset.h>
-+
-+static int raspberrypi_reset_request(struct reset_ctl *reset_ctl)
-+{
-+	if (reset_ctl->id >= RASPBERRYPI_FIRMWARE_RESET_NUM_IDS)
-+		return -EINVAL;
-+
-+	return 0;
-+}
-+
-+static int raspberrypi_reset_free(struct reset_ctl *reset_ctl)
-+{
-+	return 0;
-+}
-+
-+static int raspberrypi_reset_assert(struct reset_ctl *reset_ctl)
-+{
-+	switch (reset_ctl->id) {
-+	case RASPBERRYPI_FIRMWARE_RESET_ID_USB:
-+		bcm2711_notify_vl805_reset();
-+		return 0;
-+	default:
-+		return -EINVAL;
-+	}
-+}
-+
-+static int raspberrypi_reset_deassert(struct reset_ctl *reset_ctl)
-+{
-+	return 0;
-+}
-+
-+struct reset_ops raspberrypi_reset_ops = {
-+	.request = raspberrypi_reset_request,
-+	.rfree = raspberrypi_reset_free,
-+	.rst_assert = raspberrypi_reset_assert,
-+	.rst_deassert = raspberrypi_reset_deassert,
-+};
-+
-+static const struct udevice_id raspberrypi_reset_ids[] = {
-+	{ .compatible = "raspberrypi,firmware-reset" },
-+	{ }
-+};
-+
-+U_BOOT_DRIVER(raspberrypi_reset) = {
-+	.name = "raspberrypi-reset",
-+	.id = UCLASS_RESET,
-+	.of_match = raspberrypi_reset_ids,
-+	.ops = &raspberrypi_reset_ops,
-+};
-+
-diff --git a/include/dt-bindings/reset/raspberrypi,firmware-reset.h b/include/dt-bindings/reset/raspberrypi,firmware-reset.h
-new file mode 100644
-index 0000000000..1a4f4c7927
---- /dev/null
-+++ b/include/dt-bindings/reset/raspberrypi,firmware-reset.h
-@@ -0,0 +1,13 @@
-+/* SPDX-License-Identifier: GPL-2.0 */
-+/*
-+ * Copyright (c) 2020 Nicolas Saenz Julienne
-+ * Author: Nicolas Saenz Julienne <nsaenzjulienne@suse.com>
-+ */
-+
-+#ifndef _DT_BINDINGS_RASPBERRYPI_FIRMWARE_RESET_H
-+#define _DT_BINDINGS_RASPBERRYPI_FIRMWARE_RESET_H
-+
-+#define RASPBERRYPI_FIRMWARE_RESET_ID_USB	0
-+#define RASPBERRYPI_FIRMWARE_RESET_NUM_IDS	1
-+
-+#endif
--- 
-2.27.0
-

buildroot-external/patches/uboot/2020.07/0013-configs-Enable-support-for-reset-controllers-on-RPi4.patch

@@ -1,57 +0,0 @@
-From d32b13ba58aa59a5ec0b71cfc2005bf1efd84ddf Mon Sep 17 00:00:00 2001
-Message-Id: <d32b13ba58aa59a5ec0b71cfc2005bf1efd84ddf.1595101389.git.stefan@agner.ch>
-In-Reply-To: <040a141f84f2f84bf8be18f85b4cdb34bf066df0.1595101389.git.stefan@agner.ch>
-References: <040a141f84f2f84bf8be18f85b4cdb34bf066df0.1595101389.git.stefan@agner.ch>
-From: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
-Date: Mon, 29 Jun 2020 18:37:24 +0200
-Subject: [PATCH 13/20] configs: Enable support for reset controllers on RPi4
-
-This is required in order to access the reset controller used to
-initialize the board's xHCI chip.
-
-Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
----
- configs/rpi_4_32b_defconfig | 1 +
- configs/rpi_4_defconfig     | 1 +
- configs/rpi_arm64_defconfig | 1 +
- 3 files changed, 3 insertions(+)
-
-diff --git a/configs/rpi_4_32b_defconfig b/configs/rpi_4_32b_defconfig
-index a36a249540..0df5c17d6e 100644
---- a/configs/rpi_4_32b_defconfig
-+++ b/configs/rpi_4_32b_defconfig
-@@ -28,6 +28,7 @@ CONFIG_DM_ETH=y
- CONFIG_BCMGENET=y
- CONFIG_PINCTRL=y
- # CONFIG_PINCTRL_GENERIC is not set
-+CONFIG_DM_RESET=y
- # CONFIG_REQUIRE_SERIAL_CONSOLE is not set
- CONFIG_USB=y
- CONFIG_DM_USB=y
-diff --git a/configs/rpi_4_defconfig b/configs/rpi_4_defconfig
-index b42efe6072..f641ad3dfa 100644
---- a/configs/rpi_4_defconfig
-+++ b/configs/rpi_4_defconfig
-@@ -35,6 +35,7 @@ CONFIG_DM_PCI=y
- CONFIG_PCI_BRCMSTB=y
- CONFIG_PINCTRL=y
- # CONFIG_PINCTRL_GENERIC is not set
-+CONFIG_DM_RESET=y
- # CONFIG_REQUIRE_SERIAL_CONSOLE is not set
- CONFIG_USB=y
- CONFIG_DM_USB=y
-diff --git a/configs/rpi_arm64_defconfig b/configs/rpi_arm64_defconfig
-index 0feea7f0be..4ce8469f43 100644
---- a/configs/rpi_arm64_defconfig
-+++ b/configs/rpi_arm64_defconfig
-@@ -32,6 +32,7 @@ CONFIG_DM_PCI=y
- CONFIG_PCI_BRCMSTB=y
- CONFIG_PINCTRL=y
- # CONFIG_PINCTRL_GENERIC is not set
-+CONFIG_DM_RESET=y
- # CONFIG_REQUIRE_SERIAL_CONSOLE is not set
- CONFIG_USB=y
- CONFIG_DM_USB=y
--- 
-2.27.0
-

buildroot-external/patches/uboot/2020.07/0014-usb-xhci-Add-reset-controller-support.patch

@@ -1,106 +0,0 @@
-From a39dcf665d8867875b104661bd6a6325f502c5f2 Mon Sep 17 00:00:00 2001
-Message-Id: <a39dcf665d8867875b104661bd6a6325f502c5f2.1595101389.git.stefan@agner.ch>
-In-Reply-To: <040a141f84f2f84bf8be18f85b4cdb34bf066df0.1595101389.git.stefan@agner.ch>
-References: <040a141f84f2f84bf8be18f85b4cdb34bf066df0.1595101389.git.stefan@agner.ch>
-From: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
-Date: Mon, 29 Jun 2020 18:37:25 +0200
-Subject: [PATCH 14/20] usb: xhci: Add reset controller support
-
-Some atypical users of xhci might need to manually reset their xHCI
-controller before starting the HCD setup. Check if a reset controller
-device is available to the PCI bus and trigger a reset.
-
-Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
----
- drivers/usb/host/xhci-mem.c |  2 ++
- drivers/usb/host/xhci.c     | 33 +++++++++++++++++++++++++++++++++
- include/usb/xhci.h          |  2 ++
- 3 files changed, 37 insertions(+)
-
-diff --git a/drivers/usb/host/xhci-mem.c b/drivers/usb/host/xhci-mem.c
-index f446520528..108f4bd8cf 100644
---- a/drivers/usb/host/xhci-mem.c
-+++ b/drivers/usb/host/xhci-mem.c
-@@ -180,6 +180,8 @@ void xhci_cleanup(struct xhci_ctrl *ctrl)
- 	xhci_free_virt_devices(ctrl);
- 	free(ctrl->erst.entries);
- 	free(ctrl->dcbaa);
-+	if (reset_valid(&ctrl->reset))
-+		reset_free(&ctrl->reset);
- 	memset(ctrl, '\0', sizeof(struct xhci_ctrl));
- }
- 
-diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c
-index ebd2954571..e252964d0d 100644
---- a/drivers/usb/host/xhci.c
-+++ b/drivers/usb/host/xhci.c
-@@ -190,6 +190,35 @@ static int xhci_start(struct xhci_hcor *hcor)
- 	return ret;
- }
- 
-+/**
-+ * Resets XHCI Hardware
-+ *
-+ * @param ctrl	pointer to host controller
-+ * @return 0 if OK, or a negative error code.
-+ */
-+static int xhci_reset_hw(struct xhci_ctrl *ctrl)
-+{
-+	int ret;
-+
-+	ret = reset_get_by_index(ctrl->dev, 0, &ctrl->reset);
-+	if (ret && ret != -ENOENT && ret != -ENOTSUPP) {
-+		dev_err(ctrl->dev, "failed to get reset\n");
-+		return ret;
-+	}
-+
-+	if (reset_valid(&ctrl->reset)) {
-+		ret = reset_assert(&ctrl->reset);
-+		if (ret)
-+			return ret;
-+
-+		ret = reset_deassert(&ctrl->reset);
-+		if (ret)
-+			return ret;
-+	}
-+
-+	return 0;
-+}
-+
- /**
-  * Resets the XHCI Controller
-  *
-@@ -1508,6 +1537,10 @@ int xhci_register(struct udevice *dev, struct xhci_hccr *hccr,
- 
- 	ctrl->dev = dev;
- 
-+	ret = xhci_reset_hw(ctrl);
-+	if (ret)
-+		goto err;
-+
- 	/*
- 	 * XHCI needs to issue a Address device command to setup
- 	 * proper device context structures, before it can interact
-diff --git a/include/usb/xhci.h b/include/usb/xhci.h
-index 1170c0ac69..7d34103fd5 100644
---- a/include/usb/xhci.h
-+++ b/include/usb/xhci.h
-@@ -16,6 +16,7 @@
- #ifndef HOST_XHCI_H_
- #define HOST_XHCI_H_
- 
-+#include <reset.h>
- #include <asm/types.h>
- #include <asm/cache.h>
- #include <asm/io.h>
-@@ -1209,6 +1210,7 @@ struct xhci_ctrl {
- #if CONFIG_IS_ENABLED(DM_USB)
- 	struct udevice *dev;
- #endif
-+	struct reset_ctl reset;
- 	struct xhci_hccr *hccr;	/* R/O registers, not need for volatile */
- 	struct xhci_hcor *hcor;
- 	struct xhci_doorbell_array *dba;
--- 
-2.27.0
-