Bump version 2.8 stable

Odroid XU4: Use ondemand (#341 )
Build: speedup uboot kernel load (#338 )
2019-02-03 15:59:24 +00:00 · 2019-02-03 15:58:26 +00:00 · 2019-02-03 15:58:16 +00:00 · 2019-02-03 15:58:08 +00:00 · 2019-01-28 21:05:57 +01:00 · 2019-01-28 20:05:00 +00:00
3371 changed files with 53249 additions and 32870 deletions
--- a/.github/release-drafter.yml
+++ b/.github/release-drafter.yml
@@ -1,4 +0,0 @@
-template: |
-  ## What's Changed
-  
-  $CHANGES
--- a/.travis.yml
+++ b/.travis.yml
@@ -0,0 +1,25 @@
+language: bash
+
+sudo: required
+service: docker
+
+addons:
+  apt:
+    packages:
+     - docker-ce
+
+before_install:
+  - shopt -s globstar
+  - docker pull koalaman/shellcheck
+
+script:
+ - docker run -v $(pwd):/mnt koalaman/shellcheck scripts/*.sh
+ - docker run -v $(pwd):/mnt koalaman/shellcheck buildroot-external/scripts/*.sh
+ - docker run -v $(pwd):/mnt koalaman/shellcheck buildroot-external/scripts/*.sh
+ - docker run -v $(pwd):/mnt koalaman/shellcheck buildroot-external/board/**/*.sh
+ - docker run -v $(pwd):/mnt koalaman/shellcheck buildroot-external/rootfs-overlay/usr/sbin/*
+ - docker run -v $(pwd):/mnt koalaman/shellcheck buildroot-external/rootfs-overlay/usr/libexec/*
+ - docker run -v $(pwd):/mnt koalaman/shellcheck buildroot-external/rootfs-overlay/usr/lib/rauc/*
+
+matrix:
+  fast_finish: true
--- a/Documentation/boards/nuc.md
+++ b/Documentation/boards/nuc.md
@@ -0,0 +1,50 @@
+# Intel NUC
+
+This board configuration supports the Intel NUC mini PCs and compatibles. 
+Probably most recent computers will work.
+
+Requirements:
+- x86-64 support
+- UEFI boot
+- SATA/AHCI storage
+- Supported NIC:
+  - Intel Gigabit NIC (e1000, e1000e, igb)
+  - Realtek Gigabit NIC (r8169)
+  - Intel Wireless Wifi 802.11ac (iwlwifi, see below)
+
+## Tested Hardware
+
+| Device | Quirks | 
+|--------|-----------|
+| Intel NUC5CPYH |  |
+| Gigabyte GB-BPCE-3455 | needs 'nomodeset' in cmdline.txt if you want a console |
+
+
+## Wifi
+
+The following cards are supported:
+
+- Intel Wireless 3160
+- Intel Wireless 7260
+- Intel Wireless 7265
+- Intel Wireless-AC 3165
+- Intel Wireless-AC 3168
+- Intel Wireless-AC 8260
+- Intel Wireless-AC 8265
+- Intel Wireless-AC 9260
+- Intel Wireless-AC 9461
+- Intel Wireless-AC 9462
+- Intel Wireless-AC 9560
+
+## Bluetooth
+
+Bluetooth is untested.
+
+## Installation
+
+Currently there is no shiny installation method. Checklist:
+- Boot PC to live-environment using PXE or USB
+- Copy or download the hassos image into your live environment
+- zcat the image to local harddisk
+- Reboot
+
--- a/Documentation/boards/orangepi.md
+++ b/Documentation/boards/orangepi.md
@@ -0,0 +1,20 @@
+# Raspberry PI
+
+Supported Hardware:
+
+| Device | Board | 
+|--------|-----------|
+| Orange Pi Prime | opi-prime |
+
+## Serial console
+
+The serial port on the Orange Pi Prime is a 3 pin header located between the
+power and reset buttons. The pins are labelled away from the board edge. Flow
+control must be disabled in order to send data. The serial specs are 3.3V TTL,
+115200,8,n,1
+
+## I2C
+
+Add `dtparam=i2c0=on` to `cmdline.txt`
+
+[config]: ../configuration.md#automatic
--- a/Documentation/configuration.md
+++ b/Documentation/configuration.md
@@ -42,6 +42,16 @@ The udev rules folder `/etc/udev/rules.d` is persistent and you can add your con

 You can manual add, edit or remove connections configurations from `/etc/NetworkManager/system-connections`.

+### NTP
+
+You can manual edit the systemd timesync file on `/etc/systemd/timesyncd.conf`.
+Our default ntp configuration look like:
+```
+[Time]
+NTP=time1.google.com time2.google.com time3.google.com
+FallbackNTP=0.pool.ntp.org 1.pool.ntp.org 2.pool.ntp.org 3.pool.ntp.org
+```
+
 [systemd-modules]: https://www.freedesktop.org/software/systemd/man/modules-load.d.html
 [network.md]: network.md
 [hassos-release]: https://github.com/home-assistant/hassos/releases/
--- a/Documentation/deployment.md
+++ b/Documentation/deployment.md
@@ -9,14 +9,7 @@ We provide 3 different types of release builds:
 ## Versioning

 The format of version is *MAJOR.BUILD*. Everytime we create a new release with same userland, we bump the build number.
-The development use here own major number they will be bump for the stable version and the development version go to next major number.
-
-```
-0.x = development
-1.x = stable
-2.x = development
-3.x = stable
-```
+The development number they will be bump for the stable release version and the development version go to next major number.

 ## Git branch/Tag

--- a/Documentation/getting_started_development.md
+++ b/Documentation/getting_started_development.md
@@ -47,18 +47,18 @@ Note that the current iteration of `enter.sh` will try to load the **overlayfs**

 ```
 root@somehashinhex:/build#
-root@somehashinhex:/build# cat scripts/build-all.sh
+root@somehashinhex:/build# make help
 [...]
 ```

-The _hassos_ developers provides another convenience script that will build hassos images for a (rather long!) list of targets - if you're not interested in building artifacts for all supported platforms, make sure to take a peek inside and monkeypatch away... After you're done making changes, start it, and go make a cup of tea. Or fifteen.
+The _hassos_ developers provide a Makefile that will build hassos images for a (rather long!) list of targets. For example run the command below to start building the _ova_ variant, and go make a cup of tea. Or fifteen.

 ```
-root@0db6f7079872:/build# scripts/build-all.sh
+root@0db6f7079872:/build# make ova
 [...]
 ```

-Personally, I removed all advertised build targets from the `all_platforms` array variable, expect for the _ova_ variant. That will result in a single VMDK image file at the very end of the build process. This image file is a compressed block device dump with a proper GPT partition table, prepared to ship into any OVA-compatible hypervisor's innards. For me, the end of the **ova** build steps looks like this:
+That will result in a single VMDK image file at the very end of the build process. This image file is a compressed block device dump with a proper GPT partition table, prepared to ship into any OVA-compatible hypervisor's innards. For me, the end of the **ova** build steps looks like this:

 ```
 [...]
--- a/Documentation/kernel.md
+++ b/Documentation/kernel.md
@@ -3,7 +3,10 @@

 | Board | Version |
 |-------|---------|
-| Open Virtual Applicance | 4.14.82 |
+| Open Virtual Applicance | 4.19.18 |
 | Raspberry Pi | 4.14.81 |
 | Tinker Board | 4.14.82 |
-| Odroid-C2 | 4.14.67 |
+| Odroid-C2 | 4.19.15 |
+| Odroid-XU4 | 4.19.15 |
+| Orangepi-Prime | 4.19.13 |
+| Intel NUC | 4.14.82 |
--- a/43
+++ b/43
@@ -0,0 +1,43 @@
+RELEASE_DIR = /build/release
+
+BUILDROOT=/build/buildroot
+BUILDROOT_EXTERNAL=/build/buildroot-external
+DEFCONFIG_DIR = $(BUILDROOT_EXTERNAL)/configs
+
+TARGETS := $(notdir $(patsubst %_defconfig,%,$(wildcard $(DEFCONFIG_DIR)/*_defconfig)))
+TARGETS_CONFIG := $(notdir $(patsubst %_defconfig,%-config,$(wildcard $(DEFCONFIG_DIR)/*_defconfig)))
+
+.NOTPARALLEL: $(TARGETS) $(TARGETS_CONFIG) all
+
+.PHONY: $(TARGETS) $(TARGETS_CONFIG) all clean help
+
+all: $(TARGETS)
+
+$(RELEASE_DIR):
+	mkdir -p $(RELEASE_DIR)
+
+$(TARGETS_CONFIG): %-config:
+	@echo "config $*"
+	$(MAKE) -C $(BUILDROOT) BR2_EXTERNAL=$(BUILDROOT_EXTERNAL) "$*_defconfig"
+
+$(TARGETS): %: $(RELEASE_DIR) %-config
+	@echo "build $@"
+	$(MAKE) -C $(BUILDROOT) BR2_EXTERNAL=$(BUILDROOT_EXTERNAL)
+	cp -f $(BUILDROOT)/output/images/hassos_* $(RELEASE_DIR)/
+
+	# Do not clean when building for one target
+ifneq ($(words $(filter $(TARGETS),$(MAKECMDGOALS))), 1)
+	@echo "clean $@"
+	$(MAKE) -C $(BUILDROOT) BR2_EXTERNAL=$(BUILDROOT_EXTERNAL) clean
+endif
+	@echo "finished $@"
+
+clean:
+	$(MAKE) -C $(BUILDROOT) BR2_EXTERNAL=$(BUILDROOT_EXTERNAL) clean
+
+help:
+	@echo "Supported targets: $(TARGETS)"
+	@echo "Run 'make <target>' to build a target image."
+	@echo "Run 'make all' to build all target images."
+	@echo "Run 'make clean' to clean the build output."
+	@echo "Run 'make <target>-config' to configure buildroot for a target."
--- a/README.md
+++ b/README.md
@@ -3,12 +3,11 @@ Hass.io OS based on [buildroot](https://buildroot.org/). It's a hypervisor for D

 ## Focus

- Linux kernel 4.14 (LT)
 - Barebox as bootloader on EFI
 - U-Boot as bootloader on IoT
 - RAUC for OTA updates
 - SquashFS LZ4 as filesystem
- Docker 18.03.1
+- Docker 18.09.0
 - AppArmor protected
 - ZRAM LZ4 for /tmp, /var, swap
 - Run every supervisor
--- a/buildroot-external/board/asus/hassos-hook.sh
+++ b/buildroot-external/board/asus/hassos-hook.sh
@@ -1,28 +1,28 @@
 #!/bin/bash
+# shellcheck disable=SC2155

 function hassos_pre_image() {
    local BOOT_DATA="$(path_boot_dir)"
    local SPL_IMG="$(path_spl_img)"

-    cp -t ${BOOT_DATA} \
-        ${BINARIES_DIR}/boot.scr \
-        ${BINARIES_DIR}/rk3288-tinker.dtb
+    cp -t "${BOOT_DATA}" \
+        "${BINARIES_DIR}/boot.scr" \
+        "${BINARIES_DIR}/rk3288-tinker.dtb"

-    echo "console=tty1" > ${BOOT_DATA}/cmdline.txt
+    echo "console=tty1" > "${BOOT_DATA}/cmdline.txt"

    # Create boot binary
-    rm -f ${BINARIES_DIR}/u-boot-spl-dtb.img
-    mkimage -n rk3288 -T rksd -d ${BINARIES_DIR}/u-boot-spl-dtb.bin ${BINARIES_DIR}/u-boot-spl-dtb.img
-    cat ${BINARIES_DIR}/u-boot-dtb.bin >> ${BINARIES_DIR}/u-boot-spl-dtb.img
+    rm -f "${BINARIES_DIR}/u-boot-spl-dtb.img"
+    mkimage -n rk3288 -T rksd -d "${BINARIES_DIR}/u-boot-spl-dtb.bin" "${BINARIES_DIR}/u-boot-spl-dtb.img"
+    cat "${BINARIES_DIR}/u-boot-dtb.bin" >> "${BINARIES_DIR}/u-boot-spl-dtb.img"

    # SPL
    create_spl_image

-    dd if=${BINARIES_DIR}/u-boot-spl-dtb.img of=${SPL_IMG} conv=notrunc bs=512 seek=64
+    dd if="${BINARIES_DIR}/u-boot-spl-dtb.img" of="${SPL_IMG}" conv=notrunc bs=512 seek=64
 }


 function hassos_post_image() {
    convert_disk_image_gz
 }
-
--- a/buildroot-external/board/asus/tinker/patches/README.md
+++ b/buildroot-external/board/asus/tinker/patches/README.md
@@ -0,0 +1,5 @@
+## Kernel
+https://github.com/armbian/build/tree/master/patch/kernel/rockchip-next
+
+## u-boot
+https://github.com/armbian/build/tree/master/patch/u-boot/u-boot-rockchip/board_tinkerboard
--- a/buildroot-external/board/asus/tinker/uboot-boot.ush
+++ b/buildroot-external/board/asus/tinker/uboot-boot.ush
--- a/buildroot-external/board/hardkernel/odroid-c2/hassos-hook.sh
+++ b/buildroot-external/board/hardkernel/odroid-c2/hassos-hook.sh
@@ -1,4 +1,5 @@
 #!/bin/bash
+# shellcheck disable=SC2155

 function hassos_pre_image() {
    local BOOT_DATA="$(path_boot_dir)"
@@ -6,18 +7,18 @@ function hassos_pre_image() {
    local UBOOT_GXBB="${BINARIES_DIR}/u-boot.gxbb"
    local spl_img="$(path_spl_img)"

-    cp ${BINARIES_DIR}/boot.scr ${BOOT_DATA}/boot.scr
-    cp ${BOARD_DIR}/boot-env.txt ${BOOT_DATA}/config.txt
-    cp ${BINARIES_DIR}/meson-gxbb-odroidc2.dtb ${BOOT_DATA}/meson-gxbb-odroidc2.dtb
+    cp "${BINARIES_DIR}/boot.scr" "${BOOT_DATA}/boot.scr"
+    cp "${BOARD_DIR}/boot-env.txt" "${BOOT_DATA}/config.txt"
+    cp "${BINARIES_DIR}/meson-gxbb-odroidc2.dtb" "${BOOT_DATA}/meson-gxbb-odroidc2.dtb"

-    echo "console=tty0 console=ttyAML0,115200n8" > ${BOOT_DATA}/cmdline.txt
+    echo "console=tty0 console=ttyAML0,115200n8" > "${BOOT_DATA}/cmdline.txt"

    # SPL
    create_spl_image

-    dd if=${BL1} of=${spl_img} conv=notrunc bs=1 count=440
-    dd if=${BL1} of=${spl_img} conv=notrunc bs=512 skip=1 seek=1
-    dd if=${UBOOT_GXBB} of=${spl_img} conv=notrunc bs=512 seek=97
+    dd if="${BL1}" of="${spl_img}" conv=notrunc bs=1 count=440
+    dd if="${BL1}" of="${spl_img}" conv=notrunc bs=512 skip=1 seek=1
+    dd if="${UBOOT_GXBB}" of="${spl_img}" conv=notrunc bs=512 seek=97
 }


--- a/buildroot-external/board/hardkernel/odroid-c2/kernel.config
+++ b/buildroot-external/board/hardkernel/odroid-c2/kernel.config
--- a/buildroot-external/board/hardkernel/odroid-c2/patches/README
+++ b/buildroot-external/board/hardkernel/odroid-c2/patches/README
@@ -1,2 +0,0 @@
-kernel patches from
-https://github.com/superna9999/meta-meson/tree/sumo/recipes-kernel/linux/linux-yocto-meson64-4.14
--- a/buildroot-external/board/hardkernel/odroid-c2/patches/linux/000-arm64_dts_meson_Fix_IRQ_trigger_type_for_macirq.patch
+++ b/buildroot-external/board/hardkernel/odroid-c2/patches/linux/000-arm64_dts_meson_Fix_IRQ_trigger_type_for_macirq.patch
@@ -0,0 +1,50 @@
+diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
+index b160bd1084de..fffd55787981 100644
+--- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
+@@ -461,7 +461,7 @@
+ 			compatible = "amlogic,meson-gxbb-dwmac", "snps,dwmac";
+ 			reg = <0x0 0xff3f0000 0x0 0x10000
+ 				0x0 0xff634540 0x0 0x8>;
+-			interrupts = <GIC_SPI 8 IRQ_TYPE_EDGE_RISING>;
+			interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
+ 			interrupt-names = "macirq";
+ 			clocks = <&clkc CLKID_ETH>,
+ 				 <&clkc CLKID_FCLK_DIV2>,
+diff --git a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
+index ed336c7a98a7..44c5c51ff1fa 100644
+--- a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
+@@ -467,7 +467,7 @@
+ 			compatible = "amlogic,meson-gx-dwmac", "amlogic,meson-gxbb-dwmac", "snps,dwmac";
+ 			reg = <0x0 0xc9410000 0x0 0x10000
+ 			       0x0 0xc8834540 0x0 0x4>;
+-			interrupts = <GIC_SPI 8 IRQ_TYPE_EDGE_RISING>;
+			interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
+ 			interrupt-names = "macirq";
+ 			status = "disabled";
+ 		};
+diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts
+index 00f7be6d83f7..2e1cd5e3a246 100644
+--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts
+@@ -143,7 +143,6 @@
+ 			interrupt-parent = <&gpio_intc>;
+ 			/* MAC_INTR on GPIOZ_15 */
+ 			interrupts = <29 IRQ_TYPE_LEVEL_LOW>;
+-			eee-broken-1000t;
+ 		};
+ 	};
+ };
+diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek.dtsi
+index 70325b273bd2..ec09bb5792b7 100644
+--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek.dtsi
+@@ -142,7 +142,6 @@
+ 		eth_phy0: ethernet-phy@0 {
+ 			/* Realtek RTL8211F (0x001cc916) */
+ 			reg = <0>;
+-			eee-broken-1000t;
+ 		};
+ 	};
+ };
--- a/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0002-ARM64-dts-meson-gxbb-allow-child-devices-on-the-USB-.patch
+++ b/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0002-ARM64-dts-meson-gxbb-allow-child-devices-on-the-USB-.patch
@@ -1,41 +0,0 @@
-From 841ec7b8484dee021a15fdc187cdadc1c89220f2 Mon Sep 17 00:00:00 2001
-From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
-Date: Thu, 12 Jan 2017 01:38:26 +0100
-Subject: [PATCH 02/39] ARM64: dts: meson-gxbb: allow child devices on the USB
- controller
-
-Add the size and adress cells to the USB controllers to allow specifying
-child devices (for example the USB hub on the Odroid-C2 which must be
-taken out of reset to work).
-
-Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
-Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
- arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi | 4 ++++
- 1 file changed, 4 insertions(+)
-
-diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
-index af834cd..7d38d55 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
-+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
-@@ -73,6 +73,8 @@
- 
- 		usb0: usb@c9000000 {
- 			compatible = "amlogic,meson-gxbb-usb", "snps,dwc2";
-+			#address-cells = <1>;
-+			#size-cells = <0>;
- 			reg = <0x0 0xc9000000 0x0 0x40000>;
- 			interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
- 			clocks = <&clkc CLKID_USB0_DDR_BRIDGE>;
-@@ -85,6 +87,8 @@
- 
- 		usb1: usb@c9100000 {
- 			compatible = "amlogic,meson-gxbb-usb", "snps,dwc2";
-+			#address-cells = <1>;
-+			#size-cells = <0>;
- 			reg = <0x0 0xc9100000 0x0 0x40000>;
- 			interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
- 			clocks = <&clkc CLKID_USB1_DDR_BRIDGE>;
-- 
-2.7.4
-
--- a/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0003-ARM64-dts-meson-gxbb-odroidc2-take-USB-hub-out-of-re.patch
+++ b/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0003-ARM64-dts-meson-gxbb-odroidc2-take-USB-hub-out-of-re.patch
@@ -1,34 +0,0 @@
-From 564bc89139a6bf0833cef64993dfe3fe2784c6a8 Mon Sep 17 00:00:00 2001
-From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
-Date: Thu, 12 Jan 2017 01:39:20 +0100
-Subject: [PATCH 03/39] ARM64: dts: meson-gxbb-odroidc2: take USB hub out of
- reset
-
-This takes the USB hub out of reset, otherwise the hub is not working.
-
-Fixes: 5a0803bd5ae ("ARM64: dts: meson-gxbb-odroidc2: Enable USB Nodes")
-Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
-Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
- arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts | 7 +++++++
- 1 file changed, 7 insertions(+)
-
-diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts
-index 08b7bb7..c3a7b7f 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts
-+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts
-@@ -310,4 +310,11 @@
- 
- &usb1 {
- 	status = "okay";
-+
-+	hub@1 {
-+		compatible = "usb5e3,610";
-+		reg = <1>;
-+		reset-gpios = <&gpio GPIOAO_4 GPIO_ACTIVE_LOW>;
-+		reset-duration-us = <3000>;
-+	};
- };
-- 
-2.7.4
-
--- a/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0010-ARM64-defconfig-add-CONFIG_MESON_EFUSE.patch
+++ b/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0010-ARM64-defconfig-add-CONFIG_MESON_EFUSE.patch
@@ -1,28 +0,0 @@
-From eb29dbaf90e217978d8abfab1912b11020825e28 Mon Sep 17 00:00:00 2001
-From: Jerome Brunet <jbrunet@baylibre.com>
-Date: Mon, 13 Nov 2017 12:02:59 +0100
-Subject: [PATCH 10/39] ARM64: defconfig: add CONFIG_MESON_EFUSE
-
-Turn on CONFIG_MESON_EFUSE as module
-
-Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
-Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
- arch/arm64/configs/defconfig | 1 +
- 1 file changed, 1 insertion(+)
-
-diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
-index 34480e9..3cdfc74 100644
--- a/arch/arm64/configs/defconfig
-+++ b/arch/arm64/configs/defconfig
-@@ -541,6 +541,7 @@ CONFIG_PHY_XGENE=y
- CONFIG_PHY_TEGRA_XUSB=y
- CONFIG_QCOM_L2_PMU=y
- CONFIG_QCOM_L3_PMU=y
-+CONFIG_MESON_EFUSE=m
- CONFIG_TEE=y
- CONFIG_OPTEE=y
- CONFIG_ARM_SCPI_PROTOCOL=y
-- 
-2.7.4
-
--- a/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0011-ARM64-defconfig-enable-CEC-support.patch
+++ b/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0011-ARM64-defconfig-enable-CEC-support.patch
@@ -1,36 +0,0 @@
-From 175366cb9e77fe54e6949f6599c0900cf0980b26 Mon Sep 17 00:00:00 2001
-From: Jerome Brunet <jbrunet@baylibre.com>
-Date: Mon, 13 Nov 2017 12:09:40 +0100
-Subject: [PATCH 11/39] ARM64: defconfig: enable CEC support
-
-Turn on CONFIG_CEC_SUPPORT and CONFIG_CEC_PLATFORM_DRIVERS
-
-Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
-Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
- arch/arm64/configs/defconfig | 2 ++
- 1 file changed, 2 insertions(+)
-
-diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
-index 3cdfc74..944b93b 100644
--- a/arch/arm64/configs/defconfig
-+++ b/arch/arm64/configs/defconfig
-@@ -350,6 +350,7 @@ CONFIG_MEDIA_SUPPORT=m
- CONFIG_MEDIA_CAMERA_SUPPORT=y
- CONFIG_MEDIA_ANALOG_TV_SUPPORT=y
- CONFIG_MEDIA_DIGITAL_TV_SUPPORT=y
-+CONFIG_MEDIA_CEC_SUPPORT=y
- CONFIG_MEDIA_CONTROLLER=y
- CONFIG_MEDIA_RC_SUPPORT=y
- CONFIG_RC_CORE=m
-@@ -364,6 +365,7 @@ CONFIG_VIDEO_SAMSUNG_S5P_MFC=m
- CONFIG_VIDEO_SAMSUNG_EXYNOS_GSC=m
- CONFIG_VIDEO_RENESAS_FCP=m
- CONFIG_VIDEO_RENESAS_VSP1=m
-+CONFIG_CEC_PLATFORM_DRIVERS=y
- CONFIG_DRM=m
- CONFIG_DRM_NOUVEAU=m
- CONFIG_DRM_EXYNOS=m
-- 
-2.7.4
-
--- a/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0012-ARM64-defconfig-enable-CONFIG_VIDEO_MESON_AO_CEC.patch
+++ b/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0012-ARM64-defconfig-enable-CONFIG_VIDEO_MESON_AO_CEC.patch
@@ -1,28 +0,0 @@
-From c71be51a7778a6aa6b784dd0edc57951acf63ef2 Mon Sep 17 00:00:00 2001
-From: Jerome Brunet <jbrunet@baylibre.com>
-Date: Mon, 13 Nov 2017 12:11:41 +0100
-Subject: [PATCH 12/39] ARM64: defconfig: enable CONFIG_VIDEO_MESON_AO_CEC
-
-Turn on CONFIG_VIDEO_MESON_AO_CEC as module
-
-Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
-Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
- arch/arm64/configs/defconfig | 1 +
- 1 file changed, 1 insertion(+)
-
-diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
-index 944b93b..fdf94cb 100644
--- a/arch/arm64/configs/defconfig
-+++ b/arch/arm64/configs/defconfig
-@@ -366,6 +366,7 @@ CONFIG_VIDEO_SAMSUNG_EXYNOS_GSC=m
- CONFIG_VIDEO_RENESAS_FCP=m
- CONFIG_VIDEO_RENESAS_VSP1=m
- CONFIG_CEC_PLATFORM_DRIVERS=y
-+CONFIG_VIDEO_MESON_AO_CEC=m
- CONFIG_DRM=m
- CONFIG_DRM_NOUVEAU=m
- CONFIG_DRM_EXYNOS=m
-- 
-2.7.4
-
--- a/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0013-ARM64-defconfig-enable-CONFIG_DRM_DW_HDMI_CEC.patch
+++ b/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0013-ARM64-defconfig-enable-CONFIG_DRM_DW_HDMI_CEC.patch
@@ -1,28 +0,0 @@
-From 94fb1910e76e39cc910fb5b5a528712f4135891e Mon Sep 17 00:00:00 2001
-From: Jerome Brunet <jbrunet@baylibre.com>
-Date: Mon, 13 Nov 2017 12:15:18 +0100
-Subject: [PATCH 13/39] ARM64: defconfig: enable CONFIG_DRM_DW_HDMI_CEC
-
-Turn on CONFIG_DRM_DW_HDMI_CEC as module
-
-Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
-Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
- arch/arm64/configs/defconfig | 1 +
- 1 file changed, 1 insertion(+)
-
-diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
-index fdf94cb..dcf1090 100644
--- a/arch/arm64/configs/defconfig
-+++ b/arch/arm64/configs/defconfig
-@@ -388,6 +388,7 @@ CONFIG_DRM_RCAR_VSP=y
- CONFIG_DRM_TEGRA=m
- CONFIG_DRM_PANEL_SIMPLE=m
- CONFIG_DRM_I2C_ADV7511=m
-+CONFIG_DRM_DW_HDMI_CEC=m
- CONFIG_DRM_VC4=m
- CONFIG_DRM_HISI_KIRIN=m
- CONFIG_DRM_MESON=m
-- 
-2.7.4
-
--- a/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0014-clk-meson-gxbb-Add-VPU-and-VAPB-clockids.patch
+++ b/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0014-clk-meson-gxbb-Add-VPU-and-VAPB-clockids.patch
@@ -1,55 +0,0 @@
-From 9bc414d9e18f8c9d39be44165b4926e2b2cdc1d9 Mon Sep 17 00:00:00 2001
-From: Neil Armstrong <narmstrong@baylibre.com>
-Date: Mon, 16 Oct 2017 17:29:33 +0200
-Subject: [PATCH 14/39] clk: meson: gxbb: Add VPU and VAPB clockids
-
-Add the clkids for the clocks feeding the Video Processing Unit.
-
-Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
- drivers/clk/meson/gxbb.h              |  6 +++++-
- include/dt-bindings/clock/gxbb-clkc.h | 11 +++++++++++
- 2 files changed, 16 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/clk/meson/gxbb.h b/drivers/clk/meson/gxbb.h
-index 5b1d4b3..aee6fbb 100644
--- a/drivers/clk/meson/gxbb.h
-+++ b/drivers/clk/meson/gxbb.h
-@@ -190,8 +190,12 @@
- #define CLKID_SD_EMMC_B_CLK0_DIV  121
- #define CLKID_SD_EMMC_C_CLK0_SEL  123
- #define CLKID_SD_EMMC_C_CLK0_DIV  124
-+#define CLKID_VPU_0_DIV		  127
-+#define CLKID_VPU_1_DIV		  130
-+#define CLKID_VAPB_0_DIV	  134
-+#define CLKID_VAPB_1_DIV	  137
- 
-#define NR_CLKS			  126
-+#define NR_CLKS			  141
- 
- /* include the CLKIDs that have been made part of the DT binding */
- #include <dt-bindings/clock/gxbb-clkc.h>
-diff --git a/include/dt-bindings/clock/gxbb-clkc.h b/include/dt-bindings/clock/gxbb-clkc.h
-index 8c92528..8ba99a5 100644
--- a/include/dt-bindings/clock/gxbb-clkc.h
-+++ b/include/dt-bindings/clock/gxbb-clkc.h
-@@ -114,5 +114,16 @@
- #define CLKID_SD_EMMC_A_CLK0	119
- #define CLKID_SD_EMMC_B_CLK0	122
- #define CLKID_SD_EMMC_C_CLK0	125
-+#define CLKID_VPU_0_SEL		126
-+#define CLKID_VPU_0		128
-+#define CLKID_VPU_1_SEL		129
-+#define CLKID_VPU_1		131
-+#define CLKID_VPU		132
-+#define CLKID_VAPB_0_SEL	133
-+#define CLKID_VAPB_0		135
-+#define CLKID_VAPB_1_SEL	136
-+#define CLKID_VAPB_1		138
-+#define CLKID_VAPB_SEL		139
-+#define CLKID_VAPB		140
- 
- #endif /* __GXBB_CLKC_H */
-- 
-2.7.4
-
--- a/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0015-clk-meson-gxbb-Add-VPU-and-VAPB-clocks-data.patch
+++ b/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0015-clk-meson-gxbb-Add-VPU-and-VAPB-clocks-data.patch
@@ -1,357 +0,0 @@
-From a3b8b7bfd775fa521425c72856b4394fb6fec518 Mon Sep 17 00:00:00 2001
-From: Neil Armstrong <narmstrong@baylibre.com>
-Date: Fri, 13 Oct 2017 14:38:37 +0200
-Subject: [PATCH 15/39] clk: meson: gxbb: Add VPU and VAPB clocks data
-
-The Amlogic Meson GX SoCs needs these two clocks to power up the
-VPU power domain.
-
-These two clocks are similar to the MALI clocks by having a glitch-free
-mux and two similar clocks with gate, divider and muxes.
-
-Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
- drivers/clk/meson/gxbb.c | 292 +++++++++++++++++++++++++++++++++++++++++++++++
- 1 file changed, 292 insertions(+)
-
-diff --git a/drivers/clk/meson/gxbb.c b/drivers/clk/meson/gxbb.c
-index 92168348..86cb5af 100644
--- a/drivers/clk/meson/gxbb.c
-+++ b/drivers/clk/meson/gxbb.c
-@@ -1131,6 +1131,253 @@ static struct clk_gate gxbb_sd_emmc_c_clk0 = {
- 	},
- };
- 
-+/* VPU Clock */
-+
-+static u32 mux_table_vpu[] = {0, 1, 2, 3};
-+static const char * const gxbb_vpu_parent_names[] = {
-+	"fclk_div4", "fclk_div3", "fclk_div5", "fclk_div7"
-+};
-+
-+static struct clk_mux gxbb_vpu_0_sel = {
-+	.reg = (void *)HHI_VPU_CLK_CNTL,
-+	.mask = 0x3,
-+	.shift = 9,
-+	.lock = &clk_lock,
-+	.table = mux_table_vpu,
-+	.hw.init = &(struct clk_init_data){
-+		.name = "vpu_0_sel",
-+		.ops = &clk_mux_ops,
-+		/*
-+		 * bits 9:10 selects from 4 possible parents:
-+		 * fclk_div4, fclk_div3, fclk_div5, fclk_div7,
-+		 */
-+		.parent_names = gxbb_vpu_parent_names,
-+		.num_parents = ARRAY_SIZE(gxbb_vpu_parent_names),
-+		.flags = CLK_SET_RATE_NO_REPARENT | CLK_IGNORE_UNUSED,
-+	},
-+};
-+
-+static struct clk_divider gxbb_vpu_0_div = {
-+	.reg = (void *)HHI_VPU_CLK_CNTL,
-+	.shift = 0,
-+	.width = 7,
-+	.lock = &clk_lock,
-+	.hw.init = &(struct clk_init_data){
-+		.name = "vpu_0_div",
-+		.ops = &clk_divider_ops,
-+		.parent_names = (const char *[]){ "vpu_0_sel" },
-+		.num_parents = 1,
-+		.flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED,
-+	},
-+};
-+
-+static struct clk_gate gxbb_vpu_0 = {
-+	.reg = (void *)HHI_VPU_CLK_CNTL,
-+	.bit_idx = 8,
-+	.lock = &clk_lock,
-+	.hw.init = &(struct clk_init_data) {
-+		.name = "vpu_0",
-+		.ops = &clk_gate_ops,
-+		.parent_names = (const char *[]){ "vpu_0_div" },
-+		.num_parents = 1,
-+		.flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED,
-+	},
-+};
-+
-+static struct clk_mux gxbb_vpu_1_sel = {
-+	.reg = (void *)HHI_VPU_CLK_CNTL,
-+	.mask = 0x3,
-+	.shift = 25,
-+	.lock = &clk_lock,
-+	.table = mux_table_vpu,
-+	.hw.init = &(struct clk_init_data){
-+		.name = "vpu_1_sel",
-+		.ops = &clk_mux_ops,
-+		/*
-+		 * bits 25:26 selects from 4 possible parents:
-+		 * fclk_div4, fclk_div3, fclk_div5, fclk_div7,
-+		 */
-+		.parent_names = gxbb_vpu_parent_names,
-+		.num_parents = ARRAY_SIZE(gxbb_vpu_parent_names),
-+		.flags = CLK_SET_RATE_NO_REPARENT | CLK_IGNORE_UNUSED,
-+	},
-+};
-+
-+static struct clk_divider gxbb_vpu_1_div = {
-+	.reg = (void *)HHI_VPU_CLK_CNTL,
-+	.shift = 16,
-+	.width = 7,
-+	.lock = &clk_lock,
-+	.hw.init = &(struct clk_init_data){
-+		.name = "vpu_1_div",
-+		.ops = &clk_divider_ops,
-+		.parent_names = (const char *[]){ "vpu_1_sel" },
-+		.num_parents = 1,
-+		.flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED,
-+	},
-+};
-+
-+static struct clk_gate gxbb_vpu_1 = {
-+	.reg = (void *)HHI_VPU_CLK_CNTL,
-+	.bit_idx = 24,
-+	.lock = &clk_lock,
-+	.hw.init = &(struct clk_init_data) {
-+		.name = "vpu_1",
-+		.ops = &clk_gate_ops,
-+		.parent_names = (const char *[]){ "vpu_1_div" },
-+		.num_parents = 1,
-+		.flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED,
-+	},
-+};
-+
-+static struct clk_mux gxbb_vpu = {
-+	.reg = (void *)HHI_VPU_CLK_CNTL,
-+	.mask = 1,
-+	.shift = 31,
-+	.lock = &clk_lock,
-+	.hw.init = &(struct clk_init_data){
-+		.name = "vpu",
-+		.ops = &clk_mux_ops,
-+		/*
-+		 * bit 31 selects from 2 possible parents:
-+		 * vpu_0 or vpu_1
-+		 */
-+		.parent_names = (const char *[]){ "vpu_0", "vpu_1" },
-+		.num_parents = 2,
-+		.flags = CLK_SET_RATE_NO_REPARENT | CLK_IGNORE_UNUSED,
-+	},
-+};
-+
-+/* VAPB Clock */
-+
-+static u32 mux_table_vapb[] = {0, 1, 2, 3};
-+static const char * const gxbb_vapb_parent_names[] = {
-+	"fclk_div4", "fclk_div3", "fclk_div5", "fclk_div7"
-+};
-+
-+static struct clk_mux gxbb_vapb_0_sel = {
-+	.reg = (void *)HHI_VAPBCLK_CNTL,
-+	.mask = 0x3,
-+	.shift = 9,
-+	.lock = &clk_lock,
-+	.table = mux_table_vapb,
-+	.hw.init = &(struct clk_init_data){
-+		.name = "vapb_0_sel",
-+		.ops = &clk_mux_ops,
-+		/*
-+		 * bits 9:10 selects from 4 possible parents:
-+		 * fclk_div4, fclk_div3, fclk_div5, fclk_div7,
-+		 */
-+		.parent_names = gxbb_vapb_parent_names,
-+		.num_parents = ARRAY_SIZE(gxbb_vapb_parent_names),
-+		.flags = CLK_SET_RATE_NO_REPARENT | CLK_IGNORE_UNUSED,
-+	},
-+};
-+
-+static struct clk_divider gxbb_vapb_0_div = {
-+	.reg = (void *)HHI_VAPBCLK_CNTL,
-+	.shift = 0,
-+	.width = 7,
-+	.lock = &clk_lock,
-+	.hw.init = &(struct clk_init_data){
-+		.name = "vapb_0_div",
-+		.ops = &clk_divider_ops,
-+		.parent_names = (const char *[]){ "vapb_0_sel" },
-+		.num_parents = 1,
-+		.flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED,
-+	},
-+};
-+
-+static struct clk_gate gxbb_vapb_0 = {
-+	.reg = (void *)HHI_VAPBCLK_CNTL,
-+	.bit_idx = 8,
-+	.lock = &clk_lock,
-+	.hw.init = &(struct clk_init_data) {
-+		.name = "vapb_0",
-+		.ops = &clk_gate_ops,
-+		.parent_names = (const char *[]){ "vapb_0_div" },
-+		.num_parents = 1,
-+		.flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED,
-+	},
-+};
-+
-+static struct clk_mux gxbb_vapb_1_sel = {
-+	.reg = (void *)HHI_VAPBCLK_CNTL,
-+	.mask = 0x3,
-+	.shift = 25,
-+	.lock = &clk_lock,
-+	.table = mux_table_vapb,
-+	.hw.init = &(struct clk_init_data){
-+		.name = "vapb_1_sel",
-+		.ops = &clk_mux_ops,
-+		/*
-+		 * bits 25:26 selects from 4 possible parents:
-+		 * fclk_div4, fclk_div3, fclk_div5, fclk_div7,
-+		 */
-+		.parent_names = gxbb_vapb_parent_names,
-+		.num_parents = ARRAY_SIZE(gxbb_vapb_parent_names),
-+		.flags = CLK_SET_RATE_NO_REPARENT | CLK_IGNORE_UNUSED,
-+	},
-+};
-+
-+static struct clk_divider gxbb_vapb_1_div = {
-+	.reg = (void *)HHI_VAPBCLK_CNTL,
-+	.shift = 16,
-+	.width = 7,
-+	.lock = &clk_lock,
-+	.hw.init = &(struct clk_init_data){
-+		.name = "vapb_1_div",
-+		.ops = &clk_divider_ops,
-+		.parent_names = (const char *[]){ "vapb_1_sel" },
-+		.num_parents = 1,
-+		.flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED,
-+	},
-+};
-+
-+static struct clk_gate gxbb_vapb_1 = {
-+	.reg = (void *)HHI_VAPBCLK_CNTL,
-+	.bit_idx = 24,
-+	.lock = &clk_lock,
-+	.hw.init = &(struct clk_init_data) {
-+		.name = "vapb_1",
-+		.ops = &clk_gate_ops,
-+		.parent_names = (const char *[]){ "vapb_1_div" },
-+		.num_parents = 1,
-+		.flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED,
-+	},
-+};
-+
-+static struct clk_mux gxbb_vapb_sel = {
-+	.reg = (void *)HHI_VAPBCLK_CNTL,
-+	.mask = 1,
-+	.shift = 31,
-+	.lock = &clk_lock,
-+	.hw.init = &(struct clk_init_data){
-+		.name = "vapb_sel",
-+		.ops = &clk_mux_ops,
-+		/*
-+		 * bit 31 selects from 2 possible parents:
-+		 * vapb_0 or vapb_1
-+		 */
-+		.parent_names = (const char *[]){ "vapb_0", "vapb_1" },
-+		.num_parents = 2,
-+		.flags = CLK_SET_RATE_NO_REPARENT | CLK_IGNORE_UNUSED,
-+	},
-+};
-+
-+static struct clk_gate gxbb_vapb = {
-+	.reg = (void *)HHI_VAPBCLK_CNTL,
-+	.bit_idx = 30,
-+	.lock = &clk_lock,
-+	.hw.init = &(struct clk_init_data) {
-+		.name = "vapb",
-+		.ops = &clk_gate_ops,
-+		.parent_names = (const char *[]){ "vapb_sel" },
-+		.num_parents = 1,
-+		.flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED,
-+	},
-+};
-+
- /* Everything Else (EE) domain gates */
- static MESON_GATE(gxbb_ddr, HHI_GCLK_MPEG0, 0);
- static MESON_GATE(gxbb_dos, HHI_GCLK_MPEG0, 1);
-@@ -1349,6 +1596,21 @@ static struct clk_hw_onecell_data gxbb_hw_onecell_data = {
- 		[CLKID_SD_EMMC_C_CLK0_SEL]  = &gxbb_sd_emmc_c_clk0_sel.hw,
- 		[CLKID_SD_EMMC_C_CLK0_DIV]  = &gxbb_sd_emmc_c_clk0_div.hw,
- 		[CLKID_SD_EMMC_C_CLK0]	    = &gxbb_sd_emmc_c_clk0.hw,
-+		[CLKID_VPU_0_SEL]	    = &gxbb_vpu_0_sel.hw,
-+		[CLKID_VPU_0_DIV]	    = &gxbb_vpu_0_div.hw,
-+		[CLKID_VPU_0]		    = &gxbb_vpu_0.hw,
-+		[CLKID_VPU_1_SEL]	    = &gxbb_vpu_1_sel.hw,
-+		[CLKID_VPU_1_DIV]	    = &gxbb_vpu_1_div.hw,
-+		[CLKID_VPU_1]		    = &gxbb_vpu_1.hw,
-+		[CLKID_VPU]		    = &gxbb_vpu.hw,
-+		[CLKID_VAPB_0_SEL]	    = &gxbb_vapb_0_sel.hw,
-+		[CLKID_VAPB_0_DIV]	    = &gxbb_vapb_0_div.hw,
-+		[CLKID_VAPB_0]		    = &gxbb_vapb_0.hw,
-+		[CLKID_VAPB_1_SEL]	    = &gxbb_vapb_1_sel.hw,
-+		[CLKID_VAPB_1_DIV]	    = &gxbb_vapb_1_div.hw,
-+		[CLKID_VAPB_1]		    = &gxbb_vapb_1.hw,
-+		[CLKID_VAPB_SEL]	    = &gxbb_vapb_sel.hw,
-+		[CLKID_VAPB]		    = &gxbb_vapb.hw,
- 		[NR_CLKS]		    = NULL,
- 	},
- 	.num = NR_CLKS,
-@@ -1481,6 +1743,21 @@ static struct clk_hw_onecell_data gxl_hw_onecell_data = {
- 		[CLKID_SD_EMMC_C_CLK0_SEL]  = &gxbb_sd_emmc_c_clk0_sel.hw,
- 		[CLKID_SD_EMMC_C_CLK0_DIV]  = &gxbb_sd_emmc_c_clk0_div.hw,
- 		[CLKID_SD_EMMC_C_CLK0]	    = &gxbb_sd_emmc_c_clk0.hw,
-+		[CLKID_VPU_0_SEL]	    = &gxbb_vpu_0_sel.hw,
-+		[CLKID_VPU_0_DIV]	    = &gxbb_vpu_0_div.hw,
-+		[CLKID_VPU_0]		    = &gxbb_vpu_0.hw,
-+		[CLKID_VPU_1_SEL]	    = &gxbb_vpu_1_sel.hw,
-+		[CLKID_VPU_1_DIV]	    = &gxbb_vpu_1_div.hw,
-+		[CLKID_VPU_1]		    = &gxbb_vpu_1.hw,
-+		[CLKID_VPU]		    = &gxbb_vpu.hw,
-+		[CLKID_VAPB_0_SEL]	    = &gxbb_vapb_0_sel.hw,
-+		[CLKID_VAPB_0_DIV]	    = &gxbb_vapb_0_div.hw,
-+		[CLKID_VAPB_0]		    = &gxbb_vapb_0.hw,
-+		[CLKID_VAPB_1_SEL]	    = &gxbb_vapb_1_sel.hw,
-+		[CLKID_VAPB_1_DIV]	    = &gxbb_vapb_1_div.hw,
-+		[CLKID_VAPB_1]		    = &gxbb_vapb_1.hw,
-+		[CLKID_VAPB_SEL]	    = &gxbb_vapb_sel.hw,
-+		[CLKID_VAPB]		    = &gxbb_vapb.hw,
- 		[NR_CLKS]		    = NULL,
- 	},
- 	.num = NR_CLKS,
-@@ -1600,6 +1877,11 @@ static struct clk_gate *const gxbb_clk_gates[] = {
- 	&gxbb_sd_emmc_a_clk0,
- 	&gxbb_sd_emmc_b_clk0,
- 	&gxbb_sd_emmc_c_clk0,
-+	&gxbb_vpu_0,
-+	&gxbb_vpu_1,
-+	&gxbb_vapb_0,
-+	&gxbb_vapb_1,
-+	&gxbb_vapb,
- };
- 
- static struct clk_mux *const gxbb_clk_muxes[] = {
-@@ -1615,6 +1897,12 @@ static struct clk_mux *const gxbb_clk_muxes[] = {
- 	&gxbb_sd_emmc_a_clk0_sel,
- 	&gxbb_sd_emmc_b_clk0_sel,
- 	&gxbb_sd_emmc_c_clk0_sel,
-+	&gxbb_vpu_0_sel,
-+	&gxbb_vpu_1_sel,
-+	&gxbb_vpu,
-+	&gxbb_vapb_0_sel,
-+	&gxbb_vapb_1_sel,
-+	&gxbb_vapb_sel,
- };
- 
- static struct clk_divider *const gxbb_clk_dividers[] = {
-@@ -1627,6 +1915,10 @@ static struct clk_divider *const gxbb_clk_dividers[] = {
- 	&gxbb_sd_emmc_a_clk0_div,
- 	&gxbb_sd_emmc_b_clk0_div,
- 	&gxbb_sd_emmc_c_clk0_div,
-+	&gxbb_vpu_0_div,
-+	&gxbb_vpu_1_div,
-+	&gxbb_vapb_0_div,
-+	&gxbb_vapb_1_div,
- };
- 
- static struct meson_clk_audio_divider *const gxbb_audio_dividers[] = {
-- 
-2.7.4
-
--- a/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0016-drm-meson-dw_hdmi-Add-support-for-an-optional-extern.patch
+++ b/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0016-drm-meson-dw_hdmi-Add-support-for-an-optional-extern.patch
@@ -1,56 +0,0 @@
-From fc742b3d9f1b79f9e3e695f0e4bfc6a35c7ed7e3 Mon Sep 17 00:00:00 2001
-From: Neil Armstrong <narmstrong@baylibre.com>
-Date: Mon, 16 Oct 2017 15:35:00 +0200
-Subject: [PATCH 16/39] drm/meson: dw_hdmi: Add support for an optional
- external 5V regulator
-
-On reference boards and derivatives, the HDMI Logic is powered by an external
-5V regulator.
-This regulator was set by the Vendor U-Boot, add optional support for it.
-
-Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
- drivers/gpu/drm/meson/meson_dw_hdmi.c | 13 +++++++++++++
- 1 file changed, 13 insertions(+)
-
-diff --git a/drivers/gpu/drm/meson/meson_dw_hdmi.c b/drivers/gpu/drm/meson/meson_dw_hdmi.c
-index cef4144..17de3af 100644
--- a/drivers/gpu/drm/meson/meson_dw_hdmi.c
-+++ b/drivers/gpu/drm/meson/meson_dw_hdmi.c
-@@ -23,6 +23,7 @@
- #include <linux/of_graph.h>
- #include <linux/reset.h>
- #include <linux/clk.h>
-+#include <linux/regulator/consumer.h>
- 
- #include <drm/drmP.h>
- #include <drm/drm_edid.h>
-@@ -137,6 +138,7 @@ struct meson_dw_hdmi {
- 	struct reset_control *hdmitx_phy;
- 	struct clk *hdmi_pclk;
- 	struct clk *venci_clk;
-+	struct regulator *hdmi_supply;
- 	u32 irq_stat;
- };
- #define encoder_to_meson_dw_hdmi(x) \
-@@ -751,6 +753,17 @@ static int meson_dw_hdmi_bind(struct device *dev, struct device *master,
- 	dw_plat_data = &meson_dw_hdmi->dw_plat_data;
- 	encoder = &meson_dw_hdmi->encoder;
- 
-+	meson_dw_hdmi->hdmi_supply = devm_regulator_get_optional(dev, "hdmi");
-+	if (IS_ERR(meson_dw_hdmi->hdmi_supply)) {
-+		if (PTR_ERR(meson_dw_hdmi->hdmi_supply) == -EPROBE_DEFER)
-+			return -EPROBE_DEFER;
-+		meson_dw_hdmi->hdmi_supply = NULL;
-+	} else {
-+		ret = regulator_enable(meson_dw_hdmi->hdmi_supply);
-+		if (ret)
-+			return ret;
-+	}
-+
- 	meson_dw_hdmi->hdmitx_apb = devm_reset_control_get_exclusive(dev,
- 						"hdmitx_apb");
- 	if (IS_ERR(meson_dw_hdmi->hdmitx_apb)) {
-- 
-2.7.4
-
--- a/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0017-drm-meson-Add-missing-VPU-init.patch
+++ b/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0017-drm-meson-Add-missing-VPU-init.patch
@@ -1,58 +0,0 @@
-From 253dbcb48f94e172873878262d19338bcc9aa108 Mon Sep 17 00:00:00 2001
-From: Neil Armstrong <narmstrong@baylibre.com>
-Date: Mon, 16 Oct 2017 15:34:21 +0200
-Subject: [PATCH 17/39] drm/meson: Add missing VPU init
-
-The VPU init misses these configurations values.
-
-Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
- drivers/gpu/drm/meson/meson_drv.c       | 9 +++++++++
- drivers/gpu/drm/meson/meson_registers.h | 4 ++++
- 2 files changed, 13 insertions(+)
-
-diff --git a/drivers/gpu/drm/meson/meson_drv.c b/drivers/gpu/drm/meson/meson_drv.c
-index 7742c7d..19a0d8d 100644
--- a/drivers/gpu/drm/meson/meson_drv.c
-+++ b/drivers/gpu/drm/meson/meson_drv.c
-@@ -150,6 +150,14 @@ static struct regmap_config meson_regmap_config = {
- 	.max_register   = 0x1000,
- };
- 
-+static void meson_vpu_init(struct meson_drm *priv)
-+{
-+	writel_relaxed(0x210000, priv->io_base + _REG(VPU_RDARB_MODE_L1C1));
-+	writel_relaxed(0x10000, priv->io_base + _REG(VPU_RDARB_MODE_L1C2));
-+	writel_relaxed(0x900000, priv->io_base + _REG(VPU_RDARB_MODE_L2C1));
-+	writel_relaxed(0x20000, priv->io_base + _REG(VPU_WRARB_MODE_L2C1));
-+}
-+
- static int meson_drv_bind_master(struct device *dev, bool has_components)
- {
- 	struct platform_device *pdev = to_platform_device(dev);
-@@ -221,6 +229,7 @@ static int meson_drv_bind_master(struct device *dev, bool has_components)
- 
- 	/* Hardware Initialization */
- 
-+	meson_vpu_init(priv);
- 	meson_venc_init(priv);
- 	meson_vpp_init(priv);
- 	meson_viu_init(priv);
-diff --git a/drivers/gpu/drm/meson/meson_registers.h b/drivers/gpu/drm/meson/meson_registers.h
-index 2847381..bca8714 100644
--- a/drivers/gpu/drm/meson/meson_registers.h
-+++ b/drivers/gpu/drm/meson/meson_registers.h
-@@ -1363,6 +1363,10 @@
- #define VPU_PROT3_STAT_1 0x277a
- #define VPU_PROT3_STAT_2 0x277b
- #define VPU_PROT3_REQ_ONOFF 0x277c
-+#define VPU_RDARB_MODE_L1C1 0x2790
-+#define VPU_RDARB_MODE_L1C2 0x2799
-+#define VPU_RDARB_MODE_L2C1 0x279d
-+#define VPU_WRARB_MODE_L2C1 0x27a2
- 
- /* osd super scale */
- #define OSDSR_HV_SIZEIN 0x3130
-- 
-2.7.4
-
--- a/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0018-reset-meson-add-level-reset-support-for-GX-SoC-famil.patch
+++ b/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0018-reset-meson-add-level-reset-support-for-GX-SoC-famil.patch
@@ -1,132 +0,0 @@
-From 0689a4eaecae2831fe2cb614e102bb4ef43484a4 Mon Sep 17 00:00:00 2001
-From: Neil Armstrong <narmstrong@baylibre.com>
-Date: Fri, 13 Oct 2017 14:05:01 +0200
-Subject: [PATCH 18/39] reset: meson: add level reset support for GX SoC family
-
-The Amlogic GX SoC family embeds alternate registers to drive the reset
-levels next to the pulse registers.
-
-This patch adds support for level reset handling on the GX family only.
-
-The Meson8 family has an alternate way to handle level reset.
-
-Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
- drivers/reset/reset-meson.c | 62 ++++++++++++++++++++++++++++++++++++++++++---
- 1 file changed, 58 insertions(+), 4 deletions(-)
-
-diff --git a/drivers/reset/reset-meson.c b/drivers/reset/reset-meson.c
-index a8b915e..f3b9d69 100644
--- a/drivers/reset/reset-meson.c
-+++ b/drivers/reset/reset-meson.c
-@@ -62,13 +62,16 @@
- #include <linux/reset-controller.h>
- #include <linux/slab.h>
- #include <linux/types.h>
-+#include <linux/of_device.h>
- 
- #define REG_COUNT	8
- #define BITS_PER_REG	32
-+#define LEVEL_OFFSET	0x7c
- 
- struct meson_reset {
- 	void __iomem *reg_base;
- 	struct reset_controller_dev rcdev;
-+	spinlock_t lock;
- };
- 
- static int meson_reset_reset(struct reset_controller_dev *rcdev,
-@@ -88,18 +91,63 @@ static int meson_reset_reset(struct reset_controller_dev *rcdev,
- 	return 0;
- }
- 
-static const struct reset_control_ops meson_reset_ops = {
-+static int meson_reset_level(struct reset_controller_dev *rcdev,
-+			    unsigned long id, bool assert)
-+{
-+	struct meson_reset *data =
-+		container_of(rcdev, struct meson_reset, rcdev);
-+	unsigned int bank = id / BITS_PER_REG;
-+	unsigned int offset = id % BITS_PER_REG;
-+	void __iomem *reg_addr = data->reg_base + LEVEL_OFFSET + (bank << 2);
-+	unsigned long flags;
-+	u32 reg;
-+
-+	spin_lock_irqsave(&data->lock, flags);
-+
-+	reg = readl(reg_addr);
-+	if (assert)
-+		writel(reg & ~BIT(offset), reg_addr);
-+	else
-+		writel(reg | BIT(offset), reg_addr);
-+
-+	spin_unlock_irqrestore(&data->lock, flags);
-+
-+	return 0;
-+}
-+
-+static int meson_reset_assert(struct reset_controller_dev *rcdev,
-+			      unsigned long id)
-+{
-+	return meson_reset_level(rcdev, id, true);
-+}
-+
-+static int meson_reset_deassert(struct reset_controller_dev *rcdev,
-+				unsigned long id)
-+{
-+	return meson_reset_level(rcdev, id, false);
-+}
-+
-+static const struct reset_control_ops meson_reset_meson8_ops = {
- 	.reset		= meson_reset_reset,
- };
- 
-+static const struct reset_control_ops meson_reset_gx_ops = {
-+	.reset		= meson_reset_reset,
-+	.assert		= meson_reset_assert,
-+	.deassert	= meson_reset_deassert,
-+};
-+
- static const struct of_device_id meson_reset_dt_ids[] = {
-	 { .compatible = "amlogic,meson8b-reset", },
-	 { .compatible = "amlogic,meson-gxbb-reset", },
-+	 { .compatible = "amlogic,meson8b-reset",
-+	   .data = &meson_reset_meson8_ops, },
-+	 { .compatible = "amlogic,meson-gxbb-reset",
-+	   .data = &meson_reset_gx_ops, },
- 	 { /* sentinel */ },
- };
- 
- static int meson_reset_probe(struct platform_device *pdev)
- {
-+	const struct reset_control_ops *ops;
- 	struct meson_reset *data;
- 	struct resource *res;
- 
-@@ -107,6 +155,10 @@ static int meson_reset_probe(struct platform_device *pdev)
- 	if (!data)
- 		return -ENOMEM;
- 
-+	ops = of_device_get_match_data(&pdev->dev);
-+	if (!ops)
-+		return -EINVAL;
-+
- 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- 	data->reg_base = devm_ioremap_resource(&pdev->dev, res);
- 	if (IS_ERR(data->reg_base))
-@@ -114,9 +166,11 @@ static int meson_reset_probe(struct platform_device *pdev)
- 
- 	platform_set_drvdata(pdev, data);
- 
-+	spin_lock_init(&data->lock);
-+
- 	data->rcdev.owner = THIS_MODULE;
- 	data->rcdev.nr_resets = REG_COUNT * BITS_PER_REG;
-	data->rcdev.ops = &meson_reset_ops;
-+	data->rcdev.ops = ops;
- 	data->rcdev.of_node = pdev->dev.of_node;
- 
- 	return devm_reset_controller_register(&pdev->dev, &data->rcdev);
-- 
-2.7.4
-
--- a/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0019-soc-amlogic-add-Meson-GX-VPU-Domains-driver.patch
+++ b/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0019-soc-amlogic-add-Meson-GX-VPU-Domains-driver.patch
@@ -1,286 +0,0 @@
-From 58d5e73046ca5c28eb835c1a98f936193de5d4d0 Mon Sep 17 00:00:00 2001
-From: Neil Armstrong <narmstrong@baylibre.com>
-Date: Fri, 13 Oct 2017 17:05:00 +0200
-Subject: [PATCH 19/39] soc: amlogic: add Meson GX VPU Domains driver
-
-The Video Processing Unit needs a specific Power Domain powering scheme
-this driver handles this as a PM Power Domain driver.
-
-Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
- drivers/soc/amlogic/Kconfig             |  10 ++
- drivers/soc/amlogic/Makefile            |   1 +
- drivers/soc/amlogic/meson-gx-pwrc-vpu.c | 234 ++++++++++++++++++++++++++++++++
- 3 files changed, 245 insertions(+)
- create mode 100644 drivers/soc/amlogic/meson-gx-pwrc-vpu.c
-
-diff --git a/drivers/soc/amlogic/Kconfig b/drivers/soc/amlogic/Kconfig
-index 22acf06..c2c0513 100644
--- a/drivers/soc/amlogic/Kconfig
-+++ b/drivers/soc/amlogic/Kconfig
-@@ -8,5 +8,15 @@ config MESON_GX_SOCINFO
- 	help
- 	  Say yes to support decoding of Amlogic Meson GX SoC family
- 	  information about the type, package and version.
-+ 
-+config MESON_GX_PM_DOMAINS
-+	bool "Amlogic Meson GX Power Domains driver"
-+	depends on ARCH_MESON || COMPILE_TEST
-+	default ARCH_MESON
-+	select PM_GENERIC_DOMAINS
-+	select PM_GENERIC_DOMAINS_OF
-+	help
-+	  Say yes to expose Amlogic Meson GX Power Domains as
-+	  Generic Power Domains.
- 
- endmenu
-diff --git a/drivers/soc/amlogic/Makefile b/drivers/soc/amlogic/Makefile
-index 3e85fc4..3174e93 100644
--- a/drivers/soc/amlogic/Makefile
-+++ b/drivers/soc/amlogic/Makefile
-@@ -1 +1,2 @@
- obj-$(CONFIG_MESON_GX_SOCINFO) += meson-gx-socinfo.o
-+obj-$(CONFIG_MESON_GX_PM_DOMAINS) += meson-gx-pwrc-vpu.o
-diff --git a/drivers/soc/amlogic/meson-gx-pwrc-vpu.c b/drivers/soc/amlogic/meson-gx-pwrc-vpu.c
-new file mode 100644
-index 0000000..bf5190b
--- /dev/null
-+++ b/drivers/soc/amlogic/meson-gx-pwrc-vpu.c
-@@ -0,0 +1,234 @@
-+/*
-+ * Copyright (c) 2017 BayLibre, SAS
-+ * Author: Neil Armstrong <narmstrong@baylibre.com>
-+ *
-+ * SPDX-License-Identifier: GPL-2.0+
-+ */
-+
-+#include <linux/of_address.h>
-+#include <linux/platform_device.h>
-+#include <linux/pm_domain.h>
-+#include <linux/bitfield.h>
-+#include <linux/regmap.h>
-+#include <linux/mfd/syscon.h>
-+#include <linux/reset.h>
-+#include <linux/clk.h>
-+
-+/* AO Offsets */
-+
-+#define AO_RTI_GEN_PWR_SLEEP0		(0x3a << 2)
-+
-+#define GEN_PWR_VPU_HDMI		BIT(8)
-+#define GEN_PWR_VPU_HDMI_ISO		BIT(9)
-+
-+/* HHI Offsets */
-+
-+#define HHI_MEM_PD_REG0			(0x40 << 2)
-+#define HHI_VPU_MEM_PD_REG0		(0x41 << 2)
-+#define HHI_VPU_MEM_PD_REG1		(0x42 << 2)
-+
-+struct meson_gx_pwrc_vpu {
-+	struct generic_pm_domain genpd;
-+	struct regmap *regmap_ao;
-+	struct regmap *regmap_hhi;
-+	struct reset_control *rstc;
-+	struct clk *vpu_clk;
-+	struct clk *vapb_clk;
-+	bool powered;
-+};
-+
-+static inline
-+struct meson_gx_pwrc_vpu *genpd_to_pd(struct generic_pm_domain *d)
-+{
-+	return container_of(d, struct meson_gx_pwrc_vpu, genpd);
-+}
-+
-+static int meson_gx_pwrc_vpu_power_off(struct generic_pm_domain *genpd)
-+{
-+	struct meson_gx_pwrc_vpu *pd = genpd_to_pd(genpd);
-+	int i;
-+
-+	regmap_update_bits(pd->regmap_ao, AO_RTI_GEN_PWR_SLEEP0,
-+			   GEN_PWR_VPU_HDMI_ISO, GEN_PWR_VPU_HDMI_ISO);
-+	udelay(20);
-+
-+	/* Power Down Memories */
-+	for (i = 0; i < 32; i += 2) {
-+		regmap_update_bits(pd->regmap_hhi, HHI_VPU_MEM_PD_REG0,
-+				   0x2 << i, 0x3 << i);
-+		udelay(5);
-+	}
-+	for (i = 0; i < 32; i += 2) {
-+		regmap_update_bits(pd->regmap_hhi, HHI_VPU_MEM_PD_REG1,
-+				   0x2 << i, 0x3 << i);
-+		udelay(5);
-+	}
-+	for (i = 8; i < 16; i++) {
-+		regmap_update_bits(pd->regmap_hhi, HHI_MEM_PD_REG0,
-+				   BIT(i), BIT(i));
-+		udelay(5);
-+	}
-+	udelay(20);
-+
-+	regmap_update_bits(pd->regmap_ao, AO_RTI_GEN_PWR_SLEEP0,
-+			   GEN_PWR_VPU_HDMI, GEN_PWR_VPU_HDMI);
-+
-+	msleep(20);
-+
-+	clk_disable_unprepare(pd->vpu_clk);
-+	clk_disable_unprepare(pd->vapb_clk);
-+
-+	pd->powered = false;
-+
-+	return 0;
-+}
-+
-+static int meson_gx_pwrc_vpu_setup_clk(struct meson_gx_pwrc_vpu *pd)
-+{
-+	int ret;
-+
-+	ret = clk_prepare_enable(pd->vpu_clk);
-+	if (ret)
-+		return ret;
-+
-+	return clk_prepare_enable(pd->vapb_clk);
-+}
-+
-+static int meson_gx_pwrc_vpu_power_on(struct generic_pm_domain *genpd)
-+{
-+	struct meson_gx_pwrc_vpu *pd = genpd_to_pd(genpd);
-+	int ret;
-+	int i;
-+
-+	regmap_update_bits(pd->regmap_ao, AO_RTI_GEN_PWR_SLEEP0,
-+			   GEN_PWR_VPU_HDMI, 0);
-+	udelay(20);
-+
-+	/* Power Up Memories */
-+	for (i = 0; i < 32; i += 2) {
-+		regmap_update_bits(pd->regmap_hhi, HHI_VPU_MEM_PD_REG0,
-+				   0x2 << i, 0);
-+		udelay(5);
-+	}
-+
-+	for (i = 0; i < 32; i += 2) {
-+		regmap_update_bits(pd->regmap_hhi, HHI_VPU_MEM_PD_REG1,
-+				   0x2 << i, 0);
-+		udelay(5);
-+	}
-+
-+	for (i = 8; i < 16; i++) {
-+		regmap_update_bits(pd->regmap_hhi, HHI_MEM_PD_REG0,
-+				   BIT(i), 0);
-+		udelay(5);
-+	}
-+	udelay(20);
-+
-+	ret = reset_control_assert(pd->rstc);
-+	if (ret)
-+		return ret;
-+
-+	regmap_update_bits(pd->regmap_ao, AO_RTI_GEN_PWR_SLEEP0,
-+			   GEN_PWR_VPU_HDMI_ISO, 0);
-+
-+	ret = reset_control_deassert(pd->rstc);
-+	if (ret)
-+		return ret;
-+
-+	ret = meson_gx_pwrc_vpu_setup_clk(pd);
-+	if (ret)
-+		return ret;
-+
-+	pd->powered = true;
-+
-+	return 0;
-+}
-+
-+static bool meson_gx_pwrc_vpu_get_power(struct meson_gx_pwrc_vpu *pd)
-+{
-+	u32 reg;
-+
-+	regmap_read(pd->regmap_ao, AO_RTI_GEN_PWR_SLEEP0, &reg);
-+
-+	return (reg & GEN_PWR_VPU_HDMI);
-+}
-+
-+static struct meson_gx_pwrc_vpu vpu_hdmi_pd = {
-+	.genpd = {
-+		.name = "vpu_hdmi",
-+		.power_off = meson_gx_pwrc_vpu_power_off,
-+		.power_on = meson_gx_pwrc_vpu_power_on,
-+	},
-+};
-+
-+static int meson_gx_pwrc_vpu_probe(struct platform_device *pdev)
-+{
-+	struct regmap *regmap_ao, *regmap_hhi;
-+	struct reset_control *rstc;
-+	struct clk *vpu_clk;
-+	struct clk *vapb_clk;
-+
-+	regmap_ao = syscon_node_to_regmap(of_get_parent(pdev->dev.of_node));
-+	if (IS_ERR(regmap_ao)) {
-+		dev_err(&pdev->dev, "failed to get regmap\n");
-+		return PTR_ERR(regmap_ao);
-+	}
-+
-+	regmap_hhi = syscon_regmap_lookup_by_phandle(pdev->dev.of_node,
-+						     "amlogic,hhi-sysctrl");
-+	if (IS_ERR(regmap_hhi)) {
-+		dev_err(&pdev->dev, "failed to get HHI regmap\n");
-+		return PTR_ERR(regmap_hhi);
-+	}
-+
-+	rstc = devm_reset_control_array_get(&pdev->dev, false, false);
-+	if (IS_ERR(rstc)) {
-+		dev_err(&pdev->dev, "failed to get reset lines\n");
-+		return PTR_ERR(rstc);
-+	}
-+
-+	vpu_clk = devm_clk_get(&pdev->dev, "vpu");
-+	if (IS_ERR(vpu_clk)) {
-+		dev_err(&pdev->dev, "vpu clock request failed\n");
-+		return PTR_ERR(vpu_clk);
-+	}
-+
-+	vapb_clk = devm_clk_get(&pdev->dev, "vapb");
-+	if (IS_ERR(vapb_clk)) {
-+		dev_err(&pdev->dev, "vapb clock request failed\n");
-+		return PTR_ERR(vapb_clk);
-+	}
-+
-+	vpu_hdmi_pd.regmap_ao = regmap_ao;
-+	vpu_hdmi_pd.regmap_hhi = regmap_hhi;
-+	vpu_hdmi_pd.rstc = rstc;
-+	vpu_hdmi_pd.vpu_clk = vpu_clk;
-+	vpu_hdmi_pd.vapb_clk = vapb_clk;
-+
-+	pm_genpd_init(&vpu_hdmi_pd.genpd, &simple_qos_governor,
-+		      meson_gx_pwrc_vpu_get_power(&vpu_hdmi_pd));
-+
-+	return of_genpd_add_provider_simple(pdev->dev.of_node,
-+					    &vpu_hdmi_pd.genpd);
-+}
-+
-+static void meson_gx_pwrc_vpu_shutdown(struct platform_device *pdev)
-+{
-+	if (vpu_hdmi_pd.powered)
-+		meson_gx_pwrc_vpu_power_off(&vpu_hdmi_pd.genpd);
-+}
-+
-+static const struct of_device_id meson_gx_pwrc_vpu_match_table[] = {
-+	{ .compatible = "amlogic,meson-gx-pwrc-vpu" },
-+	{ /* sentinel */ }
-+};
-+
-+static struct platform_driver meson_gx_pwrc_vpu_driver = {
-+	.probe	= meson_gx_pwrc_vpu_probe,
-+	.shutdown = meson_gx_pwrc_vpu_shutdown,
-+	.driver = {
-+		.name		= "meson_gx_pwrc_vpu",
-+		.of_match_table	= meson_gx_pwrc_vpu_match_table,
-+	},
-+};
-+builtin_platform_driver(meson_gx_pwrc_vpu_driver);
-- 
-2.7.4
-
--- a/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0020-soc-amlogic-meson-gx-pwrc-vpu-fix-power-off-when-pow.patch
+++ b/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0020-soc-amlogic-meson-gx-pwrc-vpu-fix-power-off-when-pow.patch
@@ -1,105 +0,0 @@
-From a2ae223bac1ad40a5bd7ee124b3af735ff445eb9 Mon Sep 17 00:00:00 2001
-From: Neil Armstrong <narmstrong@baylibre.com>
-Date: Fri, 3 Nov 2017 16:43:24 +0100
-Subject: [PATCH 20/39] soc: amlogic: meson-gx-pwrc-vpu: fix power-off when
- powered by bootloader
-
-In the case the VPU power domain has been powered on by the bootloader
-and no driver are attached to this power domain, the genpd will power it
-off after a certain amount of time, but the clocks hasn't been enabled
-by the kernel itself and the power-off will trigger some faults.
-This patch enable the clocks to have a coherent state for an eventual
-poweroff and switches to the pm_domain_always_on_gov governor.
-
-Fixes: 75fcb5ca4b46 ("soc: amlogic: add Meson GX VPU Domains driver")
-Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
-Tested-by: Kevin Hilman <khilman@baylibre.com>
---
- drivers/soc/amlogic/meson-gx-pwrc-vpu.c | 29 +++++++++++++++++++----------
- 1 file changed, 19 insertions(+), 10 deletions(-)
-
-diff --git a/drivers/soc/amlogic/meson-gx-pwrc-vpu.c b/drivers/soc/amlogic/meson-gx-pwrc-vpu.c
-index bf5190b..2bdeebc 100644
--- a/drivers/soc/amlogic/meson-gx-pwrc-vpu.c
-+++ b/drivers/soc/amlogic/meson-gx-pwrc-vpu.c
-@@ -34,7 +34,6 @@ struct meson_gx_pwrc_vpu {
- 	struct reset_control *rstc;
- 	struct clk *vpu_clk;
- 	struct clk *vapb_clk;
-	bool powered;
- };
- 
- static inline
-@@ -78,8 +77,6 @@ static int meson_gx_pwrc_vpu_power_off(struct generic_pm_domain *genpd)
- 	clk_disable_unprepare(pd->vpu_clk);
- 	clk_disable_unprepare(pd->vapb_clk);
- 
-	pd->powered = false;
-
- 	return 0;
- }
- 
-@@ -91,7 +88,11 @@ static int meson_gx_pwrc_vpu_setup_clk(struct meson_gx_pwrc_vpu *pd)
- 	if (ret)
- 		return ret;
- 
-	return clk_prepare_enable(pd->vapb_clk);
-+	ret = clk_prepare_enable(pd->vapb_clk);
-+	if (ret)
-+		clk_disable_unprepare(pd->vpu_clk);
-+
-+	return ret;
- }
- 
- static int meson_gx_pwrc_vpu_power_on(struct generic_pm_domain *genpd)
-@@ -139,8 +140,6 @@ static int meson_gx_pwrc_vpu_power_on(struct generic_pm_domain *genpd)
- 	if (ret)
- 		return ret;
- 
-	pd->powered = true;
-
- 	return 0;
- }
- 
-@@ -167,6 +166,8 @@ static int meson_gx_pwrc_vpu_probe(struct platform_device *pdev)
- 	struct reset_control *rstc;
- 	struct clk *vpu_clk;
- 	struct clk *vapb_clk;
-+	bool powered_off;
-+	int ret;
- 
- 	regmap_ao = syscon_node_to_regmap(of_get_parent(pdev->dev.of_node));
- 	if (IS_ERR(regmap_ao)) {
-@@ -205,8 +206,17 @@ static int meson_gx_pwrc_vpu_probe(struct platform_device *pdev)
- 	vpu_hdmi_pd.vpu_clk = vpu_clk;
- 	vpu_hdmi_pd.vapb_clk = vapb_clk;
- 
-	pm_genpd_init(&vpu_hdmi_pd.genpd, &simple_qos_governor,
-		      meson_gx_pwrc_vpu_get_power(&vpu_hdmi_pd));
-+	powered_off = meson_gx_pwrc_vpu_get_power(&vpu_hdmi_pd);
-+
-+	/* If already powered, sync the clock states */
-+	if (!powered_off) {
-+		ret = meson_gx_pwrc_vpu_setup_clk(&vpu_hdmi_pd);
-+		if (ret)
-+			return ret;
-+	}
-+
-+	pm_genpd_init(&vpu_hdmi_pd.genpd, &pm_domain_always_on_gov,
-+		      powered_off);
- 
- 	return of_genpd_add_provider_simple(pdev->dev.of_node,
- 					    &vpu_hdmi_pd.genpd);
-@@ -214,8 +224,7 @@ static int meson_gx_pwrc_vpu_probe(struct platform_device *pdev)
- 
- static void meson_gx_pwrc_vpu_shutdown(struct platform_device *pdev)
- {
-	if (vpu_hdmi_pd.powered)
-		meson_gx_pwrc_vpu_power_off(&vpu_hdmi_pd.genpd);
-+	meson_gx_pwrc_vpu_power_off(&vpu_hdmi_pd.genpd);
- }
- 
- static const struct of_device_id meson_gx_pwrc_vpu_match_table[] = {
-- 
-2.7.4
-
--- a/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0021-ASoC-meson-add-meson-audio-core-driver.patch
+++ b/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0021-ASoC-meson-add-meson-audio-core-driver.patch
@@ -1,312 +0,0 @@
-From f9b447452943415a12055c0fca279281cd28d923 Mon Sep 17 00:00:00 2001
-From: Jerome Brunet <jbrunet@baylibre.com>
-Date: Thu, 30 Mar 2017 11:49:55 +0200
-Subject: [PATCH 21/39] ASoC: meson: add meson audio core driver
-
-This patch adds support for the audio core driver for the Amlogic Meson SoC
-family. The purpose of this driver is to properly reset the audio block and
-provide register access for the different devices scattered in this address
-space. This includes output and input DMAs, pcm, i2s and spdif dai, card
-level routing, internal codec for the gxl variant
-
-For more information, please refer to the section 5 of the public datasheet
-of the S905 (gxbb). This datasheet is available here: [0].
-
-[0]: http://dn.odroid.com/S905/DataSheet/S905_Public_Datasheet_V1.1.4.pdf
-
-Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
-Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
- sound/soc/Kconfig            |   1 +
- sound/soc/Makefile           |   1 +
- sound/soc/meson/Kconfig      |   9 ++
- sound/soc/meson/Makefile     |   3 +
- sound/soc/meson/audio-core.c | 190 +++++++++++++++++++++++++++++++++++++++++++
- sound/soc/meson/audio-core.h |  28 +++++++
- 6 files changed, 232 insertions(+)
- create mode 100644 sound/soc/meson/Kconfig
- create mode 100644 sound/soc/meson/Makefile
- create mode 100644 sound/soc/meson/audio-core.c
- create mode 100644 sound/soc/meson/audio-core.h
-
-diff --git a/sound/soc/Kconfig b/sound/soc/Kconfig
-index c0abad2..7db316f 100644
--- a/sound/soc/Kconfig
-+++ b/sound/soc/Kconfig
-@@ -55,6 +55,7 @@ source "sound/soc/kirkwood/Kconfig"
- source "sound/soc/img/Kconfig"
- source "sound/soc/intel/Kconfig"
- source "sound/soc/mediatek/Kconfig"
-+source "sound/soc/meson/Kconfig"
- source "sound/soc/mxs/Kconfig"
- source "sound/soc/pxa/Kconfig"
- source "sound/soc/qcom/Kconfig"
-diff --git a/sound/soc/Makefile b/sound/soc/Makefile
-index bf8c1e2..d4c0a51 100644
--- a/sound/soc/Makefile
-+++ b/sound/soc/Makefile
-@@ -33,6 +33,7 @@ obj-$(CONFIG_SND_SOC)	+= jz4740/
- obj-$(CONFIG_SND_SOC)	+= img/
- obj-$(CONFIG_SND_SOC)	+= intel/
- obj-$(CONFIG_SND_SOC)	+= mediatek/
-+obj-$(CONFIG_SND_SOC)	+= meson/
- obj-$(CONFIG_SND_SOC)	+= mxs/
- obj-$(CONFIG_SND_SOC)	+= nuc900/
- obj-$(CONFIG_SND_SOC)	+= omap/
-diff --git a/sound/soc/meson/Kconfig b/sound/soc/meson/Kconfig
-new file mode 100644
-index 0000000..216c850
--- /dev/null
-+++ b/sound/soc/meson/Kconfig
-@@ -0,0 +1,9 @@
-+menuconfig SND_SOC_MESON
-+	tristate "ASoC support for Amlogic Meson SoCs"
-+	depends on ARCH_MESON || COMPILE_TEST
-+	select MFD_CORE
-+	select REGMAP_MMIO
-+	help
-+	  Say Y or M if you want to add support for codecs attached to
-+	  the Amlogic Meson SoCs Audio interfaces. You will also need to
-+	  select the audio interfaces to support below.
-diff --git a/sound/soc/meson/Makefile b/sound/soc/meson/Makefile
-new file mode 100644
-index 0000000..22028ab
--- /dev/null
-+++ b/sound/soc/meson/Makefile
-@@ -0,0 +1,3 @@
-+snd-soc-meson-audio-core-objs	 := audio-core.o
-+
-+obj-$(CONFIG_SND_SOC_MESON)		+= snd-soc-meson-audio-core.o
-diff --git a/sound/soc/meson/audio-core.c b/sound/soc/meson/audio-core.c
-new file mode 100644
-index 0000000..99993ec
--- /dev/null
-+++ b/sound/soc/meson/audio-core.c
-@@ -0,0 +1,190 @@
-+/*
-+ * Copyright (C) 2017 BayLibre, SAS
-+ * Author: Jerome Brunet <jbrunet@baylibre.com>
-+ * Copyright (C) 2017 Amlogic, Inc. All rights reserved.
-+ *
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License as
-+ * published by the Free Software Foundation; either version 2 of the
-+ * License, or (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful, but
-+ * WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
-+ * General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program; if not, see <http://www.gnu.org/licenses/>.
-+ */
-+
-+#include <linux/clk.h>
-+#include <linux/mfd/core.h>
-+#include <linux/module.h>
-+#include <linux/of.h>
-+#include <linux/platform_device.h>
-+#include <linux/regmap.h>
-+#include <linux/reset.h>
-+
-+#include "audio-core.h"
-+
-+#define DRV_NAME "meson-audio-core"
-+
-+static const char * const acore_clock_names[] = { "aiu_top",
-+						  "aiu_glue",
-+						  "audin" };
-+
-+static int meson_acore_init_clocks(struct device *dev)
-+{
-+	struct clk *clock;
-+	int i, ret;
-+
-+	for (i = 0; i < ARRAY_SIZE(acore_clock_names); i++) {
-+		clock = devm_clk_get(dev, acore_clock_names[i]);
-+		if (IS_ERR(clock)) {
-+			if (PTR_ERR(clock) != -EPROBE_DEFER)
-+				dev_err(dev, "Failed to get %s clock\n",
-+					acore_clock_names[i]);
-+			return PTR_ERR(clock);
-+		}
-+
-+		ret = clk_prepare_enable(clock);
-+		if (ret) {
-+			dev_err(dev, "Failed to enable %s clock\n",
-+				acore_clock_names[i]);
-+			return ret;
-+		}
-+
-+		ret = devm_add_action_or_reset(dev,
-+				(void(*)(void *))clk_disable_unprepare,
-+				clock);
-+		if (ret)
-+			return ret;
-+	}
-+
-+	return 0;
-+}
-+
-+static const char * const acore_reset_names[] = { "aiu",
-+						  "audin" };
-+
-+static int meson_acore_init_resets(struct device *dev)
-+{
-+	struct reset_control *reset;
-+	int i, ret;
-+
-+	for (i = 0; i < ARRAY_SIZE(acore_reset_names); i++) {
-+		reset = devm_reset_control_get_exclusive(dev,
-+							 acore_reset_names[i]);
-+		if (IS_ERR(reset)) {
-+			if (PTR_ERR(reset) != -EPROBE_DEFER)
-+				dev_err(dev, "Failed to get %s reset\n",
-+					acore_reset_names[i]);
-+			return PTR_ERR(reset);
-+		}
-+
-+		ret = reset_control_reset(reset);
-+		if (ret) {
-+			dev_err(dev, "Failed to pulse %s reset\n",
-+				acore_reset_names[i]);
-+			return ret;
-+		}
-+	}
-+
-+	return 0;
-+}
-+
-+static const struct regmap_config meson_acore_regmap_config = {
-+	.reg_bits       = 32,
-+	.val_bits       = 32,
-+	.reg_stride     = 4,
-+};
-+
-+static const struct mfd_cell meson_acore_devs[] = {
-+	{
-+		.name = "meson-i2s-dai",
-+		.of_compatible = "amlogic,meson-i2s-dai",
-+	},
-+	{
-+		.name = "meson-spdif-dai",
-+		.of_compatible = "amlogic,meson-spdif-dai",
-+	},
-+	{
-+		.name = "meson-aiu-i2s-dma",
-+		.of_compatible = "amlogic,meson-aiu-i2s-dma",
-+	},
-+	{
-+		.name = "meson-aiu-spdif-dma",
-+		.of_compatible = "amlogic,meson-aiu-spdif-dma",
-+	},
-+};
-+
-+static int meson_acore_probe(struct platform_device *pdev)
-+{
-+	struct device *dev = &pdev->dev;
-+	struct meson_audio_core_data *data;
-+	struct resource *res;
-+	void __iomem *regs;
-+	int ret;
-+
-+	data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
-+	if (!data)
-+		return -ENOMEM;
-+	platform_set_drvdata(pdev, data);
-+
-+	ret = meson_acore_init_clocks(dev);
-+	if (ret)
-+		return ret;
-+
-+	ret = meson_acore_init_resets(dev);
-+	if (ret)
-+		return ret;
-+
-+	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "aiu");
-+	regs = devm_ioremap_resource(dev, res);
-+	if (IS_ERR(regs))
-+		return PTR_ERR(regs);
-+
-+	data->aiu = devm_regmap_init_mmio(dev, regs,
-+					  &meson_acore_regmap_config);
-+	if (IS_ERR(data->aiu)) {
-+		dev_err(dev, "Couldn't create the AIU regmap\n");
-+		return PTR_ERR(data->aiu);
-+	}
-+
-+	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "audin");
-+	regs = devm_ioremap_resource(dev, res);
-+	if (IS_ERR(regs))
-+		return PTR_ERR(regs);
-+
-+	data->audin = devm_regmap_init_mmio(dev, regs,
-+					    &meson_acore_regmap_config);
-+	if (IS_ERR(data->audin)) {
-+		dev_err(dev, "Couldn't create the AUDIN regmap\n");
-+		return PTR_ERR(data->audin);
-+	}
-+
-+	return devm_mfd_add_devices(dev, PLATFORM_DEVID_AUTO, meson_acore_devs,
-+				    ARRAY_SIZE(meson_acore_devs), NULL, 0,
-+				    NULL);
-+}
-+
-+static const struct of_device_id meson_acore_of_match[] = {
-+	{ .compatible = "amlogic,meson-audio-core", },
-+	{ .compatible = "amlogic,meson-gxbb-audio-core", },
-+	{ .compatible = "amlogic,meson-gxl-audio-core", },
-+	{}
-+};
-+MODULE_DEVICE_TABLE(of, meson_acore_of_match);
-+
-+static struct platform_driver meson_acore_pdrv = {
-+	.probe = meson_acore_probe,
-+	.driver = {
-+		.name = DRV_NAME,
-+		.of_match_table = meson_acore_of_match,
-+	},
-+};
-+module_platform_driver(meson_acore_pdrv);
-+
-+MODULE_DESCRIPTION("Meson Audio Core Driver");
-+MODULE_AUTHOR("Jerome Brunet <jbrunet@baylibre.com>");
-+MODULE_LICENSE("GPL v2");
-diff --git a/sound/soc/meson/audio-core.h b/sound/soc/meson/audio-core.h
-new file mode 100644
-index 0000000..6e7a24c
--- /dev/null
-+++ b/sound/soc/meson/audio-core.h
-@@ -0,0 +1,28 @@
-+/*
-+ * Copyright (C) 2017 BayLibre, SAS
-+ * Author: Jerome Brunet <jbrunet@baylibre.com>
-+ * Copyright (C) 2017 Amlogic, Inc. All rights reserved.
-+ *
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License as
-+ * published by the Free Software Foundation; either version 2 of the
-+ * License, or (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful, but
-+ * WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
-+ * General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program; if not, see <http://www.gnu.org/licenses/>.
-+ */
-+
-+#ifndef _MESON_AUDIO_CORE_H_
-+#define _MESON_AUDIO_CORE_H_
-+
-+struct meson_audio_core_data {
-+	struct regmap *aiu;
-+	struct regmap *audin;
-+};
-+
-+#endif /* _MESON_AUDIO_CORE_H_ */
-- 
-2.7.4
-
--- a/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0022-ASoC-meson-add-register-definitions.patch
+++ b/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0022-ASoC-meson-add-register-definitions.patch
@@ -1,361 +0,0 @@
-From 71e89b9513f114d45fd43233039a73f678702815 Mon Sep 17 00:00:00 2001
-From: Jerome Brunet <jbrunet@baylibre.com>
-Date: Thu, 30 Mar 2017 12:00:10 +0200
-Subject: [PATCH 22/39] ASoC: meson: add register definitions
-
-Add the register definition for the AIU and AUDIN blocks
-
-Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
-Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
- sound/soc/meson/aiu-regs.h   | 182 +++++++++++++++++++++++++++++++++++++++++++
- sound/soc/meson/audin-regs.h | 148 +++++++++++++++++++++++++++++++++++
- 2 files changed, 330 insertions(+)
- create mode 100644 sound/soc/meson/aiu-regs.h
- create mode 100644 sound/soc/meson/audin-regs.h
-
-diff --git a/sound/soc/meson/aiu-regs.h b/sound/soc/meson/aiu-regs.h
-new file mode 100644
-index 0000000..67391e6
--- /dev/null
-+++ b/sound/soc/meson/aiu-regs.h
-@@ -0,0 +1,182 @@
-+/*
-+ * Copyright (C) 2017 BayLibre, SAS
-+ * Author: Jerome Brunet <jbrunet@baylibre.com>
-+ * Copyright (C) 2017 Amlogic, Inc. All rights reserved.
-+ *
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License as
-+ * published by the Free Software Foundation; either version 2 of the
-+ * License, or (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful, but
-+ * WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
-+ * General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program; if not, see <http://www.gnu.org/licenses/>.
-+ */
-+
-+#ifndef _AIU_REGS_H_
-+#define _AIU_REGS_H_
-+
-+#define AIU_958_BPF			0x000
-+#define AIU_958_BRST			0x004
-+#define AIU_958_LENGTH			0x008
-+#define AIU_958_PADDSIZE		0x00C
-+#define AIU_958_MISC			0x010
-+#define AIU_958_FORCE_LEFT		0x014	/* Unknown */
-+#define AIU_958_DISCARD_NUM		0x018
-+#define AIU_958_DCU_FF_CTRL		0x01C
-+#define AIU_958_CHSTAT_L0		0x020
-+#define AIU_958_CHSTAT_L1		0x024
-+#define AIU_958_CTRL			0x028
-+#define AIU_958_RPT			0x02C
-+#define AIU_I2S_MUTE_SWAP		0x030
-+#define AIU_I2S_SOURCE_DESC		0x034
-+#define AIU_I2S_MED_CTRL		0x038
-+#define AIU_I2S_MED_THRESH		0x03C
-+#define AIU_I2S_DAC_CFG			0x040
-+#define AIU_I2S_SYNC			0x044	/* Unknown */
-+#define AIU_I2S_MISC			0x048
-+#define AIU_I2S_OUT_CFG			0x04C
-+#define AIU_I2S_FF_CTRL			0x050	/* Unknown */
-+#define AIU_RST_SOFT			0x054
-+#define AIU_CLK_CTRL			0x058
-+#define AIU_MIX_ADCCFG			0x05C
-+#define AIU_MIX_CTRL			0x060
-+#define AIU_CLK_CTRL_MORE		0x064
-+#define AIU_958_POP			0x068
-+#define AIU_MIX_GAIN			0x06C
-+#define AIU_958_SYNWORD1		0x070
-+#define AIU_958_SYNWORD2		0x074
-+#define AIU_958_SYNWORD3		0x078
-+#define AIU_958_SYNWORD1_MASK		0x07C
-+#define AIU_958_SYNWORD2_MASK		0x080
-+#define AIU_958_SYNWORD3_MASK		0x084
-+#define AIU_958_FFRDOUT_THD		0x088
-+#define AIU_958_LENGTH_PER_PAUSE	0x08C
-+#define AIU_958_PAUSE_NUM		0x090
-+#define AIU_958_PAUSE_PAYLOAD		0x094
-+#define AIU_958_AUTO_PAUSE		0x098
-+#define AIU_958_PAUSE_PD_LENGTH		0x09C
-+#define AIU_CODEC_DAC_LRCLK_CTRL	0x0A0
-+#define AIU_CODEC_ADC_LRCLK_CTRL	0x0A4
-+#define AIU_HDMI_CLK_DATA_CTRL		0x0A8
-+#define AIU_CODEC_CLK_DATA_CTRL		0x0AC
-+#define AIU_ACODEC_CTRL			0x0B0
-+#define AIU_958_CHSTAT_R0		0x0C0
-+#define AIU_958_CHSTAT_R1		0x0C4
-+#define AIU_958_VALID_CTRL		0x0C8
-+#define AIU_AUDIO_AMP_REG0		0x0F0	/* Unknown */
-+#define AIU_AUDIO_AMP_REG1		0x0F4	/* Unknown */
-+#define AIU_AUDIO_AMP_REG2		0x0F8	/* Unknown */
-+#define AIU_AUDIO_AMP_REG3		0x0FC	/* Unknown */
-+#define AIU_AIFIFO2_CTRL		0x100
-+#define AIU_AIFIFO2_STATUS		0x104
-+#define AIU_AIFIFO2_GBIT		0x108
-+#define AIU_AIFIFO2_CLB			0x10C
-+#define AIU_CRC_CTRL			0x110
-+#define AIU_CRC_STATUS			0x114
-+#define AIU_CRC_SHIFT_REG		0x118
-+#define AIU_CRC_IREG			0x11C
-+#define AIU_CRC_CAL_REG1		0x120
-+#define AIU_CRC_CAL_REG0		0x124
-+#define AIU_CRC_POLY_COEF1		0x128
-+#define AIU_CRC_POLY_COEF0		0x12C
-+#define AIU_CRC_BIT_SIZE1		0x130
-+#define AIU_CRC_BIT_SIZE0		0x134
-+#define AIU_CRC_BIT_CNT1		0x138
-+#define AIU_CRC_BIT_CNT0		0x13C
-+#define AIU_AMCLK_GATE_HI		0x140
-+#define AIU_AMCLK_GATE_LO		0x144
-+#define AIU_AMCLK_MSR			0x148
-+#define AIU_AUDAC_CTRL0			0x14C	/* Unknown */
-+#define AIU_DELTA_SIGMA0		0x154	/* Unknown */
-+#define AIU_DELTA_SIGMA1		0x158	/* Unknown */
-+#define AIU_DELTA_SIGMA2		0x15C	/* Unknown */
-+#define AIU_DELTA_SIGMA3		0x160	/* Unknown */
-+#define AIU_DELTA_SIGMA4		0x164	/* Unknown */
-+#define AIU_DELTA_SIGMA5		0x168	/* Unknown */
-+#define AIU_DELTA_SIGMA6		0x16C	/* Unknown */
-+#define AIU_DELTA_SIGMA7		0x170	/* Unknown */
-+#define AIU_DELTA_SIGMA_LCNTS		0x174	/* Unknown */
-+#define AIU_DELTA_SIGMA_RCNTS		0x178	/* Unknown */
-+#define AIU_MEM_I2S_START_PTR		0x180
-+#define AIU_MEM_I2S_RD_PTR		0x184
-+#define AIU_MEM_I2S_END_PTR		0x188
-+#define AIU_MEM_I2S_MASKS		0x18C
-+#define AIU_MEM_I2S_CONTROL		0x190
-+#define AIU_MEM_IEC958_START_PTR	0x194
-+#define AIU_MEM_IEC958_RD_PTR		0x198
-+#define AIU_MEM_IEC958_END_PTR		0x19C
-+#define AIU_MEM_IEC958_MASKS		0x1A0
-+#define AIU_MEM_IEC958_CONTROL		0x1A4
-+#define AIU_MEM_AIFIFO2_START_PTR	0x1A8
-+#define AIU_MEM_AIFIFO2_CURR_PTR	0x1AC
-+#define AIU_MEM_AIFIFO2_END_PTR		0x1B0
-+#define AIU_MEM_AIFIFO2_BYTES_AVAIL	0x1B4
-+#define AIU_MEM_AIFIFO2_CONTROL		0x1B8
-+#define AIU_MEM_AIFIFO2_MAN_WP		0x1BC
-+#define AIU_MEM_AIFIFO2_MAN_RP		0x1C0
-+#define AIU_MEM_AIFIFO2_LEVEL		0x1C4
-+#define AIU_MEM_AIFIFO2_BUF_CNTL	0x1C8
-+#define AIU_MEM_I2S_MAN_WP		0x1CC
-+#define AIU_MEM_I2S_MAN_RP		0x1D0
-+#define AIU_MEM_I2S_LEVEL		0x1D4
-+#define AIU_MEM_I2S_BUF_CNTL		0x1D8
-+#define AIU_MEM_I2S_BUF_WRAP_COUNT	0x1DC
-+#define AIU_MEM_I2S_MEM_CTL		0x1E0
-+#define AIU_MEM_IEC958_MEM_CTL		0x1E4
-+#define AIU_MEM_IEC958_WRAP_COUNT	0x1E8
-+#define AIU_MEM_IEC958_IRQ_LEVEL	0x1EC
-+#define AIU_MEM_IEC958_MAN_WP		0x1F0
-+#define AIU_MEM_IEC958_MAN_RP		0x1F4
-+#define AIU_MEM_IEC958_LEVEL		0x1F8
-+#define AIU_MEM_IEC958_BUF_CNTL		0x1FC
-+#define AIU_AIFIFO_CTRL			0x200
-+#define AIU_AIFIFO_STATUS		0x204
-+#define AIU_AIFIFO_GBIT			0x208
-+#define AIU_AIFIFO_CLB			0x20C
-+#define AIU_MEM_AIFIFO_START_PTR	0x210
-+#define AIU_MEM_AIFIFO_CURR_PTR		0x214
-+#define AIU_MEM_AIFIFO_END_PTR		0x218
-+#define AIU_MEM_AIFIFO_BYTES_AVAIL	0x21C
-+#define AIU_MEM_AIFIFO_CONTROL		0x220
-+#define AIU_MEM_AIFIFO_MAN_WP		0x224
-+#define AIU_MEM_AIFIFO_MAN_RP		0x228
-+#define AIU_MEM_AIFIFO_LEVEL		0x22C
-+#define AIU_MEM_AIFIFO_BUF_CNTL		0x230
-+#define AIU_MEM_AIFIFO_BUF_WRAP_COUNT	0x234
-+#define AIU_MEM_AIFIFO2_BUF_WRAP_COUNT	0x238
-+#define AIU_MEM_AIFIFO_MEM_CTL		0x23C
-+#define AIFIFO_TIME_STAMP_CNTL		0x240
-+#define AIFIFO_TIME_STAMP_SYNC_0	0x244
-+#define AIFIFO_TIME_STAMP_SYNC_1	0x248
-+#define AIFIFO_TIME_STAMP_0		0x24C
-+#define AIFIFO_TIME_STAMP_1		0x250
-+#define AIFIFO_TIME_STAMP_2		0x254
-+#define AIFIFO_TIME_STAMP_3		0x258
-+#define AIFIFO_TIME_STAMP_LENGTH	0x25C
-+#define AIFIFO2_TIME_STAMP_CNTL		0x260
-+#define AIFIFO2_TIME_STAMP_SYNC_0	0x264
-+#define AIFIFO2_TIME_STAMP_SYNC_1	0x268
-+#define AIFIFO2_TIME_STAMP_0		0x26C
-+#define AIFIFO2_TIME_STAMP_1		0x270
-+#define AIFIFO2_TIME_STAMP_2		0x274
-+#define AIFIFO2_TIME_STAMP_3		0x278
-+#define AIFIFO2_TIME_STAMP_LENGTH	0x27C
-+#define IEC958_TIME_STAMP_CNTL		0x280
-+#define IEC958_TIME_STAMP_SYNC_0	0x284
-+#define IEC958_TIME_STAMP_SYNC_1	0x288
-+#define IEC958_TIME_STAMP_0		0x28C
-+#define IEC958_TIME_STAMP_1		0x290
-+#define IEC958_TIME_STAMP_2		0x294
-+#define IEC958_TIME_STAMP_3		0x298
-+#define IEC958_TIME_STAMP_LENGTH	0x29C
-+#define AIU_MEM_AIFIFO2_MEM_CTL		0x2A0
-+#define AIU_I2S_CBUS_DDR_CNTL		0x2A4
-+#define AIU_I2S_CBUS_DDR_WDATA		0x2A8
-+#define AIU_I2S_CBUS_DDR_ADDR		0x2AC
-+
-+#endif /* _AIU_REGS_H_ */
-diff --git a/sound/soc/meson/audin-regs.h b/sound/soc/meson/audin-regs.h
-new file mode 100644
-index 0000000..f224610
--- /dev/null
-+++ b/sound/soc/meson/audin-regs.h
-@@ -0,0 +1,148 @@
-+/*
-+ * Copyright (C) 2017 BayLibre, SAS
-+ * Author: Jerome Brunet <jbrunet@baylibre.com>
-+ * Copyright (C) 2017 Amlogic, Inc. All rights reserved.
-+ *
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License as
-+ * published by the Free Software Foundation; either version 2 of the
-+ * License, or (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful, but
-+ * WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
-+ * General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program; if not, see <http://www.gnu.org/licenses/>.
-+ */
-+
-+#ifndef _AUDIN_REGS_H_
-+#define _AUDIN_REGS_H_
-+
-+/*
-+ * Note :
-+ * Datasheet issue page 196
-+ * AUDIN_MUTE_VAL 0x35 => impossible: Already assigned to AUDIN_FIFO1_PTR
-+ * AUDIN_FIFO1_PTR is more likely to be correct here since surrounding registers
-+ * also deal with AUDIN_FIFO1
-+ *
-+ * Clarification needed from Amlogic
-+ */
-+
-+#define AUDIN_SPDIF_MODE		0x000
-+#define AUDIN_SPDIF_FS_CLK_RLTN		0x004
-+#define AUDIN_SPDIF_CHNL_STS_A		0x008
-+#define AUDIN_SPDIF_CHNL_STS_B		0x00C
-+#define AUDIN_SPDIF_MISC		0x010
-+#define AUDIN_SPDIF_NPCM_PCPD		0x014
-+#define AUDIN_SPDIF_END			0x03C	/* Unknown */
-+#define AUDIN_I2SIN_CTRL		0x040
-+#define AUDIN_SOURCE_SEL		0x044
-+#define AUDIN_DECODE_FORMAT		0x048
-+#define AUDIN_DECODE_CONTROL_STATUS	0x04C
-+#define AUDIN_DECODE_CHANNEL_STATUS_A_0	0x050
-+#define AUDIN_DECODE_CHANNEL_STATUS_A_1	0x054
-+#define AUDIN_DECODE_CHANNEL_STATUS_A_2	0x058
-+#define AUDIN_DECODE_CHANNEL_STATUS_A_3	0x05C
-+#define AUDIN_DECODE_CHANNEL_STATUS_A_4	0x060
-+#define AUDIN_DECODE_CHANNEL_STATUS_A_5	0x064
-+#define AUDIN_FIFO0_START		0x080
-+#define AUDIN_FIFO0_END			0x084
-+#define AUDIN_FIFO0_PTR			0x088
-+#define AUDIN_FIFO0_INTR		0x08C
-+#define AUDIN_FIFO0_RDPTR		0x090
-+#define AUDIN_FIFO0_CTRL		0x094
-+#define AUDIN_FIFO0_CTRL1		0x098
-+#define AUDIN_FIFO0_LVL0		0x09C
-+#define AUDIN_FIFO0_LVL1		0x0A0
-+#define AUDIN_FIFO0_LVL2		0x0A4
-+#define AUDIN_FIFO0_REQID		0x0C0
-+#define AUDIN_FIFO0_WRAP		0x0C4
-+#define AUDIN_FIFO1_START		0x0CC
-+#define AUDIN_FIFO1_END			0x0D0
-+#define AUDIN_FIFO1_PTR			0x0D4
-+#define AUDIN_FIFO1_INTR		0x0D8
-+#define AUDIN_FIFO1_RDPTR		0x0DC
-+#define AUDIN_FIFO1_CTRL		0x0E0
-+#define AUDIN_FIFO1_CTRL1		0x0E4
-+#define AUDIN_FIFO1_LVL0		0x100
-+#define AUDIN_FIFO1_LVL1		0x104
-+#define AUDIN_FIFO1_LVL2		0x108
-+#define AUDIN_FIFO1_REQID		0x10C
-+#define AUDIN_FIFO1_WRAP		0x110
-+#define AUDIN_FIFO2_START		0x114
-+#define AUDIN_FIFO2_END			0x118
-+#define AUDIN_FIFO2_PTR			0x11C
-+#define AUDIN_FIFO2_INTR		0x120
-+#define AUDIN_FIFO2_RDPTR		0x124
-+#define AUDIN_FIFO2_CTRL		0x128
-+#define AUDIN_FIFO2_CTRL1		0x12C
-+#define AUDIN_FIFO2_LVL0		0x130
-+#define AUDIN_FIFO2_LVL1		0x134
-+#define AUDIN_FIFO2_LVL2		0x138
-+#define AUDIN_FIFO2_REQID		0x13C
-+#define AUDIN_FIFO2_WRAP		0x140
-+#define AUDIN_INT_CTRL			0x144
-+#define AUDIN_FIFO_INT			0x148
-+#define PCMIN_CTRL0			0x180
-+#define PCMIN_CTRL1			0x184
-+#define PCMIN1_CTRL0			0x188
-+#define PCMIN1_CTRL1			0x18C
-+#define PCMOUT_CTRL0			0x1C0
-+#define PCMOUT_CTRL1			0x1C4
-+#define PCMOUT_CTRL2			0x1C8
-+#define PCMOUT_CTRL3			0x1CC
-+#define PCMOUT1_CTRL0			0x1D0
-+#define PCMOUT1_CTRL1			0x1D4
-+#define PCMOUT1_CTRL2			0x1D8
-+#define PCMOUT1_CTRL3			0x1DC
-+#define AUDOUT_CTRL			0x200
-+#define AUDOUT_CTRL1			0x204
-+#define AUDOUT_BUF0_STA			0x208
-+#define AUDOUT_BUF0_EDA			0x20C
-+#define AUDOUT_BUF0_WPTR		0x210
-+#define AUDOUT_BUF1_STA			0x214
-+#define AUDOUT_BUF1_EDA			0x218
-+#define AUDOUT_BUF1_WPTR		0x21C
-+#define AUDOUT_FIFO_RPTR		0x220
-+#define AUDOUT_INTR_PTR			0x224
-+#define AUDOUT_FIFO_STS			0x228
-+#define AUDOUT1_CTRL			0x240
-+#define AUDOUT1_CTRL1			0x244
-+#define AUDOUT1_BUF0_STA		0x248
-+#define AUDOUT1_BUF0_EDA		0x24C
-+#define AUDOUT1_BUF0_WPTR		0x250
-+#define AUDOUT1_BUF1_STA		0x254
-+#define AUDOUT1_BUF1_EDA		0x258
-+#define AUDOUT1_BUF1_WPTR		0x25C
-+#define AUDOUT1_FIFO_RPTR		0x260
-+#define AUDOUT1_INTR_PTR		0x264
-+#define AUDOUT1_FIFO_STS		0x268
-+#define AUDIN_HDMI_MEAS_CTRL		0x280
-+#define AUDIN_HDMI_MEAS_CYCLES_M1	0x284
-+#define AUDIN_HDMI_MEAS_INTR_MASKN	0x288
-+#define AUDIN_HDMI_MEAS_INTR_STAT	0x28C
-+#define AUDIN_HDMI_REF_CYCLES_STAT_0	0x290
-+#define AUDIN_HDMI_REF_CYCLES_STAT_1	0x294
-+#define AUDIN_HDMIRX_AFIFO_STAT		0x298
-+#define AUDIN_FIFO0_PIO_STS		0x2C0
-+#define AUDIN_FIFO0_PIO_RDL		0x2C4
-+#define AUDIN_FIFO0_PIO_RDH		0x2C8
-+#define AUDIN_FIFO1_PIO_STS		0x2CC
-+#define AUDIN_FIFO1_PIO_RDL		0x2D0
-+#define AUDIN_FIFO1_PIO_RDH		0x2D4
-+#define AUDIN_FIFO2_PIO_STS		0x2D8
-+#define AUDIN_FIFO2_PIO_RDL		0x2DC
-+#define AUDIN_FIFO2_PIO_RDH		0x2E0
-+#define AUDOUT_FIFO_PIO_STS		0x2E4
-+#define AUDOUT_FIFO_PIO_WRL		0x2E8
-+#define AUDOUT_FIFO_PIO_WRH		0x2EC
-+#define AUDOUT1_FIFO_PIO_STS		0x2F0	/* Unknown */
-+#define AUDOUT1_FIFO_PIO_WRL		0x2F4	/* Unknown */
-+#define AUDOUT1_FIFO_PIO_WRH		0x2F8	/* Unknown */
-+#define AUD_RESAMPLE_CTRL0		0x2FC
-+#define AUD_RESAMPLE_CTRL1		0x300
-+#define AUD_RESAMPLE_STATUS		0x304
-+
-+#endif /* _AUDIN_REGS_H_ */
-- 
-2.7.4
-
--- a/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0023-ASoC-meson-add-aiu-i2s-dma-support.patch
+++ b/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0023-ASoC-meson-add-aiu-i2s-dma-support.patch
@@ -1,417 +0,0 @@
-From 03285555d8cbb3eb1f4991b758e5804a3c19b4ce Mon Sep 17 00:00:00 2001
-From: Jerome Brunet <jbrunet@baylibre.com>
-Date: Thu, 30 Mar 2017 12:14:40 +0200
-Subject: [PATCH 23/39] ASoC: meson: add aiu i2s dma support
-
-Add support for the i2s output dma which is part of the AIU block
-
-Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
-Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
- sound/soc/meson/Kconfig       |   7 +
- sound/soc/meson/Makefile      |   2 +
- sound/soc/meson/aiu-i2s-dma.c | 367 ++++++++++++++++++++++++++++++++++++++++++
- 3 files changed, 376 insertions(+)
- create mode 100644 sound/soc/meson/aiu-i2s-dma.c
-
-diff --git a/sound/soc/meson/Kconfig b/sound/soc/meson/Kconfig
-index 216c850..ad31a11 100644
--- a/sound/soc/meson/Kconfig
-+++ b/sound/soc/meson/Kconfig
-@@ -7,3 +7,10 @@ menuconfig SND_SOC_MESON
- 	  Say Y or M if you want to add support for codecs attached to
- 	  the Amlogic Meson SoCs Audio interfaces. You will also need to
- 	  select the audio interfaces to support below.
-+
-+config SND_SOC_MESON_I2S
-+	tristate "Meson i2s interface"
-+	depends on SND_SOC_MESON
-+	help
-+	  Say Y or M if you want to add support for i2s dma driver for Amlogic
-+	  Meson SoCs.
-diff --git a/sound/soc/meson/Makefile b/sound/soc/meson/Makefile
-index 22028ab..273f275 100644
--- a/sound/soc/meson/Makefile
-+++ b/sound/soc/meson/Makefile
-@@ -1,3 +1,5 @@
- snd-soc-meson-audio-core-objs	 := audio-core.o
-+snd-soc-meson-aiu-i2s-dma-objs	 := aiu-i2s-dma.o
- 
- obj-$(CONFIG_SND_SOC_MESON)		+= snd-soc-meson-audio-core.o
-+obj-$(CONFIG_SND_SOC_MESON_I2S)		+= snd-soc-meson-aiu-i2s-dma.o
-diff --git a/sound/soc/meson/aiu-i2s-dma.c b/sound/soc/meson/aiu-i2s-dma.c
-new file mode 100644
-index 0000000..bab950d
--- /dev/null
-+++ b/sound/soc/meson/aiu-i2s-dma.c
-@@ -0,0 +1,367 @@
-+/*
-+ * Copyright (C) 2017 BayLibre, SAS
-+ * Author: Jerome Brunet <jbrunet@baylibre.com>
-+ * Copyright (C) 2017 Amlogic, Inc. All rights reserved.
-+ *
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License as
-+ * published by the Free Software Foundation; either version 2 of the
-+ * License, or (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful, but
-+ * WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
-+ * General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program; if not, see <http://www.gnu.org/licenses/>.
-+ */
-+
-+#include <linux/clk.h>
-+#include <linux/mfd/syscon.h>
-+#include <linux/module.h>
-+#include <linux/of.h>
-+#include <linux/platform_device.h>
-+#include <linux/regmap.h>
-+
-+#include <sound/pcm_params.h>
-+#include <sound/soc.h>
-+
-+#include "aiu-regs.h"
-+#include "audio-core.h"
-+
-+#define DRV_NAME "meson-aiu-i2s-dma"
-+
-+struct aiu_i2s_dma {
-+	struct meson_audio_core_data *core;
-+	struct clk *fast;
-+	int irq;
-+};
-+
-+#define AIU_MEM_I2S_BUF_CNTL_INIT		BIT(0)
-+#define AIU_MEM_I2S_CONTROL_INIT		BIT(0)
-+#define AIU_MEM_I2S_CONTROL_FILL_EN		BIT(1)
-+#define AIU_MEM_I2S_CONTROL_EMPTY_EN		BIT(2)
-+#define AIU_MEM_I2S_CONTROL_MODE_16BIT		BIT(6)
-+#define AIU_MEM_I2S_CONTROL_BUSY		BIT(7)
-+#define AIU_MEM_I2S_CONTROL_DATA_READY		BIT(8)
-+#define AIU_MEM_I2S_CONTROL_LEVEL_CNTL		BIT(9)
-+#define AIU_MEM_I2S_MASKS_IRQ_BLOCK_MASK	GENMASK(31, 16)
-+#define AIU_MEM_I2S_MASKS_IRQ_BLOCK(n)		((n) << 16)
-+#define AIU_MEM_I2S_MASKS_CH_MEM_MASK		GENMASK(15, 8)
-+#define AIU_MEM_I2S_MASKS_CH_MEM(ch)		((ch) << 8)
-+#define AIU_MEM_I2S_MASKS_CH_RD_MASK		GENMASK(7, 0)
-+#define AIU_MEM_I2S_MASKS_CH_RD(ch)		((ch) << 0)
-+#define AIU_RST_SOFT_I2S_FAST_DOMAIN		BIT(0)
-+#define AIU_RST_SOFT_I2S_SLOW_DOMAIN		BIT(1)
-+
-+/*
-+ * The DMA works by i2s "blocks" (or DMA burst). The burst size and the memory
-+ * layout expected depends on the mode of operation.
-+ *
-+ * - Normal mode: The channels are expected to be packed in 32 bytes groups
-+ *  interleaved the buffer. AIU_MEM_I2S_MASKS_CH_MEM is a bitfield representing
-+ *  the channels present in memory. AIU_MEM_I2S_MASKS_CH_MEM represents the
-+ *  channels read by the DMA. This is very flexible but the unsual memory layout
-+ *  makes it less easy to deal with. The burst size is 32 bytes times the number
-+ *  of channels read.
-+ *
-+ * - Split mode:
-+ * Classical channel interleaved frame organisation. In this mode,
-+ * AIU_MEM_I2S_MASKS_CH_MEM and AIU_MEM_I2S_MASKS_CH_MEM must be set to 0xff and
-+ * the burst size is fixed to 256 bytes. The input can be either 2 or 8
-+ * channels.
-+ *
-+ * The following driver implements the split mode.
-+ */
-+
-+#define AIU_I2S_DMA_BURST 256
-+
-+static struct snd_pcm_hardware aiu_i2s_dma_hw = {
-+	.info = (SNDRV_PCM_INFO_INTERLEAVED |
-+		 SNDRV_PCM_INFO_MMAP |
-+		 SNDRV_PCM_INFO_MMAP_VALID |
-+		 SNDRV_PCM_INFO_PAUSE),
-+
-+	.formats = (SNDRV_PCM_FMTBIT_S16_LE |
-+		    SNDRV_PCM_FMTBIT_S24_LE |
-+		    SNDRV_PCM_FMTBIT_S32_LE),
-+
-+	/*
-+	 * TODO: The DMA can change the endianness, the msb position
-+	 * and deal with unsigned - support this later on
-+	 */
-+
-+	.rate_min = 8000,
-+	.rate_max = 192000,
-+	.channels_min = 2,
-+	.channels_max = 8,
-+	.period_bytes_min = AIU_I2S_DMA_BURST,
-+	.period_bytes_max = AIU_I2S_DMA_BURST * 65535,
-+	.periods_min = 2,
-+	.periods_max = UINT_MAX,
-+	.buffer_bytes_max = 1 * 1024 * 1024,
-+	.fifo_size = 0,
-+};
-+
-+static struct aiu_i2s_dma *aiu_i2s_dma_priv(struct snd_pcm_substream *s)
-+{
-+	struct snd_soc_pcm_runtime *rtd = s->private_data;
-+
-+	return snd_soc_platform_get_drvdata(rtd->platform);
-+}
-+
-+static snd_pcm_uframes_t
-+aiu_i2s_dma_pointer(struct snd_pcm_substream *substream)
-+{
-+	struct snd_pcm_runtime *runtime = substream->runtime;
-+	struct aiu_i2s_dma *priv = aiu_i2s_dma_priv(substream);
-+	unsigned int addr;
-+	int ret;
-+
-+	ret = regmap_read(priv->core->aiu, AIU_MEM_I2S_RD_PTR,
-+			  &addr);
-+	if (ret)
-+		return 0;
-+
-+	return bytes_to_frames(runtime, addr - (unsigned int)runtime->dma_addr);
-+}
-+
-+static void __dma_enable(struct aiu_i2s_dma *priv, bool enable)
-+{
-+	unsigned int en_mask = (AIU_MEM_I2S_CONTROL_FILL_EN |
-+				AIU_MEM_I2S_CONTROL_EMPTY_EN);
-+
-+	regmap_update_bits(priv->core->aiu, AIU_MEM_I2S_CONTROL, en_mask,
-+			   enable ? en_mask : 0);
-+
-+}
-+
-+static int aiu_i2s_dma_trigger(struct snd_pcm_substream *substream, int cmd)
-+{
-+	struct aiu_i2s_dma *priv = aiu_i2s_dma_priv(substream);
-+
-+	switch (cmd) {
-+	case SNDRV_PCM_TRIGGER_START:
-+	case SNDRV_PCM_TRIGGER_RESUME:
-+	case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
-+		__dma_enable(priv, true);
-+		break;
-+	case SNDRV_PCM_TRIGGER_SUSPEND:
-+	case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
-+	case SNDRV_PCM_TRIGGER_STOP:
-+		__dma_enable(priv, false);
-+		break;
-+	default:
-+		return -EINVAL;
-+	}
-+
-+	return 0;
-+}
-+
-+static void __dma_init_mem(struct aiu_i2s_dma *priv)
-+{
-+	regmap_update_bits(priv->core->aiu, AIU_MEM_I2S_CONTROL,
-+			   AIU_MEM_I2S_CONTROL_INIT,
-+			   AIU_MEM_I2S_CONTROL_INIT);
-+	regmap_update_bits(priv->core->aiu, AIU_MEM_I2S_BUF_CNTL,
-+			   AIU_MEM_I2S_BUF_CNTL_INIT,
-+			   AIU_MEM_I2S_BUF_CNTL_INIT);
-+
-+	regmap_update_bits(priv->core->aiu, AIU_MEM_I2S_CONTROL,
-+			   AIU_MEM_I2S_CONTROL_INIT,
-+			   0);
-+	regmap_update_bits(priv->core->aiu, AIU_MEM_I2S_BUF_CNTL,
-+			   AIU_MEM_I2S_BUF_CNTL_INIT,
-+			   0);
-+}
-+
-+static int aiu_i2s_dma_prepare(struct snd_pcm_substream *substream)
-+{
-+	struct aiu_i2s_dma *priv = aiu_i2s_dma_priv(substream);
-+
-+	__dma_init_mem(priv);
-+
-+	return 0;
-+}
-+
-+static int aiu_i2s_dma_hw_params(struct snd_pcm_substream *substream,
-+				 struct snd_pcm_hw_params *params)
-+{
-+	struct snd_pcm_runtime *runtime = substream->runtime;
-+	struct aiu_i2s_dma *priv = aiu_i2s_dma_priv(substream);
-+	int ret;
-+	u32 burst_num, mem_ctl;
-+	dma_addr_t end_ptr;
-+
-+	ret = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(params));
-+	if (ret < 0)
-+		return ret;
-+
-+	/* Setup memory layout */
-+	if (params_physical_width(params) == 16)
-+		mem_ctl = AIU_MEM_I2S_CONTROL_MODE_16BIT;
-+	else
-+		mem_ctl = 0;
-+
-+	regmap_update_bits(priv->core->aiu, AIU_MEM_I2S_CONTROL,
-+			   AIU_MEM_I2S_CONTROL_MODE_16BIT,
-+			   mem_ctl);
-+
-+	/* Initialize memory pointers */
-+	regmap_write(priv->core->aiu, AIU_MEM_I2S_START_PTR, runtime->dma_addr);
-+	regmap_write(priv->core->aiu, AIU_MEM_I2S_RD_PTR, runtime->dma_addr);
-+
-+	/* The end pointer is the address of the last valid block */
-+	end_ptr = runtime->dma_addr + runtime->dma_bytes - AIU_I2S_DMA_BURST;
-+	regmap_write(priv->core->aiu, AIU_MEM_I2S_END_PTR, end_ptr);
-+
-+	/* Memory masks */
-+	burst_num = params_period_bytes(params) / AIU_I2S_DMA_BURST;
-+	regmap_write(priv->core->aiu, AIU_MEM_I2S_MASKS,
-+		     AIU_MEM_I2S_MASKS_CH_RD(0xff) |
-+		     AIU_MEM_I2S_MASKS_CH_MEM(0xff) |
-+		     AIU_MEM_I2S_MASKS_IRQ_BLOCK(burst_num));
-+
-+	return 0;
-+}
-+
-+static int aiu_i2s_dma_hw_free(struct snd_pcm_substream *substream)
-+{
-+	return snd_pcm_lib_free_pages(substream);
-+}
-+
-+
-+static irqreturn_t aiu_i2s_dma_irq_block(int irq, void *dev_id)
-+{
-+	struct snd_pcm_substream *playback = dev_id;
-+
-+	snd_pcm_period_elapsed(playback);
-+
-+	return IRQ_HANDLED;
-+}
-+
-+static int aiu_i2s_dma_open(struct snd_pcm_substream *substream)
-+{
-+	struct aiu_i2s_dma *priv = aiu_i2s_dma_priv(substream);
-+	int ret;
-+
-+	snd_soc_set_runtime_hwparams(substream, &aiu_i2s_dma_hw);
-+
-+	/*
-+	 * Make sure the buffer and period size are multiple of the DMA burst
-+	 * size
-+	 */
-+	ret = snd_pcm_hw_constraint_step(substream->runtime, 0,
-+					 SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
-+					 AIU_I2S_DMA_BURST);
-+	if (ret)
-+		return ret;
-+
-+	ret = snd_pcm_hw_constraint_step(substream->runtime, 0,
-+					 SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
-+					 AIU_I2S_DMA_BURST);
-+	if (ret)
-+		return ret;
-+
-+	/* Request the I2S DDR irq */
-+	ret = request_irq(priv->irq, aiu_i2s_dma_irq_block, 0,
-+			  DRV_NAME, substream);
-+	if (ret)
-+		return ret;
-+
-+	/* Power up the i2s fast domain - can't write the registers w/o it */
-+	ret = clk_prepare_enable(priv->fast);
-+	if (ret)
-+		return ret;
-+
-+	/* Make sure the dma is initially disabled */
-+	__dma_enable(priv, false);
-+
-+	return 0;
-+}
-+
-+static int aiu_i2s_dma_close(struct snd_pcm_substream *substream)
-+{
-+	struct aiu_i2s_dma *priv = aiu_i2s_dma_priv(substream);
-+
-+	clk_disable_unprepare(priv->fast);
-+	free_irq(priv->irq, substream);
-+
-+	return 0;
-+}
-+
-+static const struct snd_pcm_ops aiu_i2s_dma_ops = {
-+	.open =		aiu_i2s_dma_open,
-+	.close =        aiu_i2s_dma_close,
-+	.ioctl =	snd_pcm_lib_ioctl,
-+	.hw_params =	aiu_i2s_dma_hw_params,
-+	.hw_free =      aiu_i2s_dma_hw_free,
-+	.prepare =      aiu_i2s_dma_prepare,
-+	.pointer =	aiu_i2s_dma_pointer,
-+	.trigger =	aiu_i2s_dma_trigger,
-+};
-+
-+static int aiu_i2s_dma_new(struct snd_soc_pcm_runtime *rtd)
-+{
-+	struct snd_card *card = rtd->card->snd_card;
-+	size_t size = aiu_i2s_dma_hw.buffer_bytes_max;
-+
-+	return snd_pcm_lib_preallocate_pages_for_all(rtd->pcm,
-+						     SNDRV_DMA_TYPE_DEV,
-+						     card->dev, size, size);
-+}
-+
-+struct snd_soc_platform_driver aiu_i2s_platform = {
-+	.ops		= &aiu_i2s_dma_ops,
-+	.pcm_new	= aiu_i2s_dma_new,
-+};
-+
-+static int aiu_i2s_dma_probe(struct platform_device *pdev)
-+{
-+	struct device *dev = &pdev->dev;
-+	struct aiu_i2s_dma *priv;
-+
-+	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
-+	if (!priv)
-+		return -ENOMEM;
-+
-+	platform_set_drvdata(pdev, priv);
-+	priv->core = dev_get_drvdata(dev->parent);
-+
-+	priv->fast = devm_clk_get(dev, "fast");
-+	if (IS_ERR(priv->fast)) {
-+		if (PTR_ERR(priv->fast) != -EPROBE_DEFER)
-+			dev_err(dev, "Can't get i2s fast domain clock\n");
-+		return PTR_ERR(priv->fast);
-+	}
-+
-+	priv->irq = platform_get_irq(pdev, 0);
-+	if (priv->irq <= 0) {
-+		dev_err(dev, "Can't get i2s ddr irq\n");
-+		return priv->irq;
-+	}
-+
-+	return snd_soc_register_platform(dev, &aiu_i2s_platform);
-+}
-+
-+static const struct of_device_id aiu_i2s_dma_of_match[] = {
-+	{ .compatible = "amlogic,meson-aiu-i2s-dma", },
-+	{ .compatible = "amlogic,meson-gxbb-aiu-i2s-dma", },
-+	{ .compatible = "amlogic,meson-gxl-aiu-i2s-dma", },
-+	{}
-+};
-+MODULE_DEVICE_TABLE(of, aiu_i2s_dma_of_match);
-+
-+static struct platform_driver aiu_i2s_dma_pdrv = {
-+	.probe = aiu_i2s_dma_probe,
-+	.driver = {
-+		.name = DRV_NAME,
-+		.of_match_table = aiu_i2s_dma_of_match,
-+	},
-+};
-+module_platform_driver(aiu_i2s_dma_pdrv);
-+
-+MODULE_DESCRIPTION("Meson AIU i2s DMA ASoC Driver");
-+MODULE_AUTHOR("Jerome Brunet <jbrunet@baylibre.com>");
-+MODULE_LICENSE("GPL v2");
-- 
-2.7.4
-
--- a/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0024-ASoC-meson-add-initial-i2s-dai-support.patch
+++ b/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0024-ASoC-meson-add-initial-i2s-dai-support.patch
@@ -1,515 +0,0 @@
-From e273b0687bfb891ca4962dfe96e174371853ae89 Mon Sep 17 00:00:00 2001
-From: Jerome Brunet <jbrunet@baylibre.com>
-Date: Thu, 30 Mar 2017 12:17:27 +0200
-Subject: [PATCH 24/39] ASoC: meson: add initial i2s dai support
-
-Add support for the i2s dai found on Amlogic Meson SoC family.
-With this initial implementation, only playback is supported.
-Capture will be part of furture work.
-
-Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
-Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
- sound/soc/meson/Kconfig   |   2 +-
- sound/soc/meson/Makefile  |   2 +
- sound/soc/meson/i2s-dai.c | 465 ++++++++++++++++++++++++++++++++++++++++++++++
- 3 files changed, 468 insertions(+), 1 deletion(-)
- create mode 100644 sound/soc/meson/i2s-dai.c
-
-diff --git a/sound/soc/meson/Kconfig b/sound/soc/meson/Kconfig
-index ad31a11..604c9e2 100644
--- a/sound/soc/meson/Kconfig
-+++ b/sound/soc/meson/Kconfig
-@@ -12,5 +12,5 @@ config SND_SOC_MESON_I2S
- 	tristate "Meson i2s interface"
- 	depends on SND_SOC_MESON
- 	help
-	  Say Y or M if you want to add support for i2s dma driver for Amlogic
-+	  Say Y or M if you want to add support for i2s driver for Amlogic
- 	  Meson SoCs.
-diff --git a/sound/soc/meson/Makefile b/sound/soc/meson/Makefile
-index 273f275..ea06dde 100644
--- a/sound/soc/meson/Makefile
-+++ b/sound/soc/meson/Makefile
-@@ -1,5 +1,7 @@
- snd-soc-meson-audio-core-objs	 := audio-core.o
- snd-soc-meson-aiu-i2s-dma-objs	 := aiu-i2s-dma.o
-+snd-soc-meson-i2s-dai-objs	 := i2s-dai.o
- 
- obj-$(CONFIG_SND_SOC_MESON)		+= snd-soc-meson-audio-core.o
- obj-$(CONFIG_SND_SOC_MESON_I2S)		+= snd-soc-meson-aiu-i2s-dma.o
-+obj-$(CONFIG_SND_SOC_MESON_I2S)		+= snd-soc-meson-i2s-dai.o
-diff --git a/sound/soc/meson/i2s-dai.c b/sound/soc/meson/i2s-dai.c
-new file mode 100644
-index 0000000..1008af8
--- /dev/null
-+++ b/sound/soc/meson/i2s-dai.c
-@@ -0,0 +1,465 @@
-+/*
-+ * Copyright (C) 2017 BayLibre, SAS
-+ * Author: Jerome Brunet <jbrunet@baylibre.com>
-+ * Copyright (C) 2017 Amlogic, Inc. All rights reserved.
-+ *
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License as
-+ * published by the Free Software Foundation; either version 2 of the
-+ * License, or (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful, but
-+ * WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
-+ * General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program; if not, see <http://www.gnu.org/licenses/>.
-+ */
-+
-+#include <linux/clk.h>
-+#include <linux/mfd/syscon.h>
-+#include <linux/module.h>
-+#include <linux/of.h>
-+#include <linux/platform_device.h>
-+#include <linux/regmap.h>
-+
-+#include <sound/pcm_params.h>
-+#include <sound/soc.h>
-+#include <sound/soc-dai.h>
-+
-+#include "aiu-regs.h"
-+#include "audio-core.h"
-+
-+#define DRV_NAME "meson-i2s-dai"
-+
-+struct meson_i2s_dai {
-+	struct meson_audio_core_data *core;
-+	struct clk *mclk;
-+	struct clk *bclks;
-+	struct clk *iface;
-+	struct clk *fast;
-+	bool bclks_idle;
-+};
-+
-+#define AIU_CLK_CTRL_I2S_DIV_EN			BIT(0)
-+#define AIU_CLK_CTRL_I2S_DIV_MASK		GENMASK(3, 2)
-+#define AIU_CLK_CTRL_AOCLK_POLARITY_MASK	BIT(6)
-+#define AIU_CLK_CTRL_AOCLK_POLARITY_NORMAL	(0 << 6)
-+#define AIU_CLK_CTRL_AOCLK_POLARITY_INVERTED	(1 << 6)
-+#define AIU_CLK_CTRL_ALRCLK_POLARITY_MASK	BIT(7)
-+#define AIU_CLK_CTRL_ALRCLK_POLARITY_NORMAL	(0 << 7)
-+#define AIU_CLK_CTRL_ALRCLK_POLARITY_INVERTED	(1 << 7)
-+#define AIU_CLK_CTRL_ALRCLK_SKEW_MASK		GENMASK(9, 8)
-+#define AIU_CLK_CTRL_ALRCLK_LEFT_J		(0 << 8)
-+#define AIU_CLK_CTRL_ALRCLK_I2S			(1 << 8)
-+#define AIU_CLK_CTRL_ALRCLK_RIGHT_J		(2 << 8)
-+#define AIU_CLK_CTRL_MORE_I2S_DIV_MASK		GENMASK(5, 0)
-+#define AIU_CLK_CTRL_MORE_I2S_DIV(div)		(((div) - 1) << 0)
-+#define AIU_CODEC_DAC_LRCLK_CTRL_DIV_MASK	GENMASK(11, 0)
-+#define AIU_CODEC_DAC_LRCLK_CTRL_DIV(div)	(((div) - 1) << 0)
-+#define AIU_I2S_DAC_CFG_PAYLOAD_SIZE_MASK	GENMASK(1, 0)
-+#define AIU_I2S_DAC_CFG_AOCLK_32		(0 << 0)
-+#define AIU_I2S_DAC_CFG_AOCLK_48		(2 << 0)
-+#define AIU_I2S_DAC_CFG_AOCLK_64		(3 << 0)
-+#define AIU_I2S_MISC_HOLD_EN			BIT(2)
-+#define AIU_I2S_SOURCE_DESC_MODE_8CH		BIT(0)
-+#define AIU_I2S_SOURCE_DESC_MODE_24BIT		BIT(5)
-+#define AIU_I2S_SOURCE_DESC_MODE_32BIT		BIT(9)
-+#define AIU_I2S_SOURCE_DESC_MODE_SPLIT		BIT(11)
-+
-+static void __hold(struct meson_i2s_dai *priv, bool enable)
-+{
-+	regmap_update_bits(priv->core->aiu, AIU_I2S_MISC,
-+			   AIU_I2S_MISC_HOLD_EN,
-+			   enable ? AIU_I2S_MISC_HOLD_EN : 0);
-+}
-+
-+static void __divider_enable(struct meson_i2s_dai *priv, bool enable)
-+{
-+	regmap_update_bits(priv->core->aiu, AIU_CLK_CTRL,
-+			   AIU_CLK_CTRL_I2S_DIV_EN,
-+			   enable ? AIU_CLK_CTRL_I2S_DIV_EN : 0);
-+}
-+
-+static void __playback_start(struct meson_i2s_dai *priv)
-+{
-+	__divider_enable(priv, true);
-+	__hold(priv, false);
-+}
-+
-+static void __playback_stop(struct meson_i2s_dai *priv, bool clk_force)
-+{
-+	__hold(priv, true);
-+	/* Disable the bit clks if necessary */
-+	if (clk_force || !priv->bclks_idle)
-+		__divider_enable(priv, false);
-+}
-+
-+static int meson_i2s_dai_trigger(struct snd_pcm_substream *substream, int cmd,
-+				 struct snd_soc_dai *dai)
-+{
-+	struct meson_i2s_dai *priv = snd_soc_dai_get_drvdata(dai);
-+	bool clk_force_stop = false;
-+
-+	switch (cmd) {
-+	case SNDRV_PCM_TRIGGER_START:
-+	case SNDRV_PCM_TRIGGER_RESUME:
-+	case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
-+		__playback_start(priv);
-+		return 0;
-+
-+	case SNDRV_PCM_TRIGGER_STOP:
-+	case SNDRV_PCM_TRIGGER_SUSPEND:
-+		clk_force_stop = true;
-+	case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
-+		__playback_stop(priv, clk_force_stop);
-+		return 0;
-+
-+	default:
-+		return -EINVAL;
-+	}
-+}
-+
-+static int __bclks_set_rate(struct meson_i2s_dai *priv, unsigned int srate,
-+			    unsigned int width)
-+{
-+	unsigned int fs;
-+
-+	/* Get the oversampling factor */
-+	fs = DIV_ROUND_CLOSEST(clk_get_rate(priv->mclk), srate);
-+
-+	/*
-+	 * This DAI is usually connected to the dw-hdmi which does not support
-+	 * bclk being 32 * lrclk or 48 * lrclk
-+	 * Restrict to blck = 64 * lrclk
-+	 */
-+	if (fs % 64)
-+		return -EINVAL;
-+
-+	/* Set the divider between lrclk and bclk */
-+	regmap_update_bits(priv->core->aiu, AIU_I2S_DAC_CFG,
-+			   AIU_I2S_DAC_CFG_PAYLOAD_SIZE_MASK,
-+			   AIU_I2S_DAC_CFG_AOCLK_64);
-+
-+	regmap_update_bits(priv->core->aiu, AIU_CODEC_DAC_LRCLK_CTRL,
-+			   AIU_CODEC_DAC_LRCLK_CTRL_DIV_MASK,
-+			   AIU_CODEC_DAC_LRCLK_CTRL_DIV(64));
-+
-+	/* Use CLK_MORE for the i2s divider */
-+	regmap_update_bits(priv->core->aiu, AIU_CLK_CTRL,
-+			   AIU_CLK_CTRL_I2S_DIV_MASK,
-+			   0);
-+
-+	regmap_update_bits(priv->core->aiu, AIU_CLK_CTRL_MORE,
-+			   AIU_CLK_CTRL_MORE_I2S_DIV_MASK,
-+			   AIU_CLK_CTRL_MORE_I2S_DIV(fs / 64));
-+
-+	return 0;
-+}
-+
-+static int __setup_desc(struct meson_i2s_dai *priv, unsigned int width,
-+			unsigned int channels)
-+{
-+	u32 desc = 0;
-+
-+	switch (width) {
-+	case 24:
-+		/*
-+		 * For some reason, 24 bits wide audio don't play well
-+		 * if the 32 bits mode is not set
-+		 */
-+		desc |= (AIU_I2S_SOURCE_DESC_MODE_24BIT |
-+			 AIU_I2S_SOURCE_DESC_MODE_32BIT);
-+		break;
-+	case 16:
-+		break;
-+
-+	default:
-+		return -EINVAL;
-+	}
-+
-+	switch (channels) {
-+	case 2: /* Nothing to do */
-+		break;
-+	case 8:
-+		/* TODO: Still requires testing ... */
-+		desc |= AIU_I2S_SOURCE_DESC_MODE_8CH;
-+		break;
-+	default:
-+		return -EINVAL;
-+	}
-+
-+	regmap_update_bits(priv->core->aiu, AIU_I2S_SOURCE_DESC,
-+			   AIU_I2S_SOURCE_DESC_MODE_8CH |
-+			   AIU_I2S_SOURCE_DESC_MODE_24BIT |
-+			   AIU_I2S_SOURCE_DESC_MODE_32BIT,
-+			   desc);
-+
-+	return 0;
-+}
-+
-+static int meson_i2s_dai_hw_params(struct snd_pcm_substream *substream,
-+				   struct snd_pcm_hw_params *params,
-+				   struct snd_soc_dai *dai)
-+{
-+	struct meson_i2s_dai *priv = snd_soc_dai_get_drvdata(dai);
-+	unsigned int width = params_width(params);
-+	unsigned int channels = params_channels(params);
-+	unsigned int rate = params_rate(params);
-+	int ret;
-+
-+	ret = __setup_desc(priv, width, channels);
-+	if (ret) {
-+		dev_err(dai->dev, "Unable set to set i2s description\n");
-+		return ret;
-+	}
-+
-+	ret = __bclks_set_rate(priv, rate, width);
-+	if (ret) {
-+		dev_err(dai->dev, "Unable set to the i2s clock rates\n");
-+		return ret;
-+	}
-+
-+	return 0;
-+}
-+
-+static int meson_i2s_dai_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
-+{
-+	struct meson_i2s_dai *priv = snd_soc_dai_get_drvdata(dai);
-+	u32 val;
-+
-+	if ((fmt & SND_SOC_DAIFMT_MASTER_MASK) != SND_SOC_DAIFMT_CBS_CFS)
-+		return -EINVAL;
-+
-+	/* DAI output mode */
-+	switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
-+	case SND_SOC_DAIFMT_I2S:
-+		val = AIU_CLK_CTRL_ALRCLK_I2S;
-+		break;
-+	case SND_SOC_DAIFMT_LEFT_J:
-+		val = AIU_CLK_CTRL_ALRCLK_LEFT_J;
-+		break;
-+	case SND_SOC_DAIFMT_RIGHT_J:
-+		val = AIU_CLK_CTRL_ALRCLK_RIGHT_J;
-+		break;
-+	default:
-+		return -EINVAL;
-+	}
-+
-+	regmap_update_bits(priv->core->aiu, AIU_CLK_CTRL,
-+			   AIU_CLK_CTRL_ALRCLK_SKEW_MASK,
-+			   val);
-+
-+	/* DAI clock polarity */
-+	switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
-+	case SND_SOC_DAIFMT_IB_IF:
-+		/* Invert both clocks */
-+		val = AIU_CLK_CTRL_ALRCLK_POLARITY_INVERTED |
-+			AIU_CLK_CTRL_AOCLK_POLARITY_INVERTED;
-+		break;
-+	case SND_SOC_DAIFMT_IB_NF:
-+		/* Invert bit clock */
-+		val = AIU_CLK_CTRL_ALRCLK_POLARITY_NORMAL |
-+			AIU_CLK_CTRL_AOCLK_POLARITY_INVERTED;
-+		break;
-+	case SND_SOC_DAIFMT_NB_IF:
-+		/* Invert frame clock */
-+		val = AIU_CLK_CTRL_ALRCLK_POLARITY_INVERTED |
-+			AIU_CLK_CTRL_AOCLK_POLARITY_NORMAL;
-+		break;
-+	case SND_SOC_DAIFMT_NB_NF:
-+		/* Normal clocks */
-+		val = AIU_CLK_CTRL_ALRCLK_POLARITY_NORMAL |
-+			AIU_CLK_CTRL_AOCLK_POLARITY_NORMAL;
-+		break;
-+	default:
-+		return -EINVAL;
-+	}
-+
-+	regmap_update_bits(priv->core->aiu, AIU_CLK_CTRL,
-+			   AIU_CLK_CTRL_ALRCLK_POLARITY_MASK |
-+			   AIU_CLK_CTRL_AOCLK_POLARITY_MASK,
-+			   val);
-+
-+	switch (fmt & SND_SOC_DAIFMT_CLOCK_MASK) {
-+	case SND_SOC_DAIFMT_CONT:
-+		priv->bclks_idle = true;
-+		break;
-+	case SND_SOC_DAIFMT_GATED:
-+		priv->bclks_idle = false;
-+		break;
-+	default:
-+		return -EINVAL;
-+	}
-+
-+	return 0;
-+}
-+
-+static int meson_i2s_dai_set_sysclk(struct snd_soc_dai *dai, int clk_id,
-+				    unsigned int freq, int dir)
-+{
-+	struct meson_i2s_dai *priv = snd_soc_dai_get_drvdata(dai);
-+	int ret;
-+
-+	if (WARN_ON(clk_id != 0))
-+		return -EINVAL;
-+
-+	if (dir == SND_SOC_CLOCK_IN)
-+		return 0;
-+
-+	ret = clk_set_rate(priv->mclk, freq);
-+	if (ret) {
-+		dev_err(dai->dev, "Failed to set sysclk to %uHz", freq);
-+		return ret;
-+	}
-+
-+	return 0;
-+}
-+
-+static int meson_i2s_dai_startup(struct snd_pcm_substream *substream,
-+				 struct snd_soc_dai *dai)
-+{
-+	struct meson_i2s_dai *priv = snd_soc_dai_get_drvdata(dai);
-+	int ret;
-+
-+	/* Power up the i2s fast domain - can't write the registers w/o it */
-+	ret = clk_prepare_enable(priv->fast);
-+	if (ret)
-+		goto out_clk_fast;
-+
-+	/* Make sure nothing gets out of the DAI yet */
-+	__hold(priv, true);
-+
-+	/* I2S encoder needs the mixer interface gate */
-+	ret = clk_prepare_enable(priv->iface);
-+	if (ret)
-+		goto out_clk_iface;
-+
-+	/* Enable the i2s master clock */
-+	ret = clk_prepare_enable(priv->mclk);
-+	if (ret)
-+		goto out_mclk;
-+
-+	/* Enable the bit clock gate */
-+	ret = clk_prepare_enable(priv->bclks);
-+	if (ret)
-+		goto out_bclks;
-+
-+	/* Make sure the interface expect a memory layout we can work with */
-+	regmap_update_bits(priv->core->aiu, AIU_I2S_SOURCE_DESC,
-+			   AIU_I2S_SOURCE_DESC_MODE_SPLIT,
-+			   AIU_I2S_SOURCE_DESC_MODE_SPLIT);
-+
-+	return 0;
-+
-+out_bclks:
-+	clk_disable_unprepare(priv->mclk);
-+out_mclk:
-+	clk_disable_unprepare(priv->iface);
-+out_clk_iface:
-+	clk_disable_unprepare(priv->fast);
-+out_clk_fast:
-+	return ret;
-+}
-+
-+static void meson_i2s_dai_shutdown(struct snd_pcm_substream *substream,
-+				   struct snd_soc_dai *dai)
-+{
-+	struct meson_i2s_dai *priv = snd_soc_dai_get_drvdata(dai);
-+
-+	clk_disable_unprepare(priv->bclks);
-+	clk_disable_unprepare(priv->mclk);
-+	clk_disable_unprepare(priv->iface);
-+	clk_disable_unprepare(priv->fast);
-+}
-+
-+static const struct snd_soc_dai_ops meson_i2s_dai_ops = {
-+	.startup    = meson_i2s_dai_startup,
-+	.shutdown   = meson_i2s_dai_shutdown,
-+	.trigger    = meson_i2s_dai_trigger,
-+	.hw_params  = meson_i2s_dai_hw_params,
-+	.set_fmt    = meson_i2s_dai_set_fmt,
-+	.set_sysclk = meson_i2s_dai_set_sysclk,
-+};
-+
-+static struct snd_soc_dai_driver meson_i2s_dai = {
-+	.playback = {
-+		.stream_name = "Playback",
-+		.channels_min = 2,
-+		.channels_max = 8,
-+		.rates = SNDRV_PCM_RATE_8000_192000,
-+		.formats = (SNDRV_PCM_FMTBIT_S16_LE |
-+			    SNDRV_PCM_FMTBIT_S24_LE)
-+	},
-+	.ops = &meson_i2s_dai_ops,
-+};
-+
-+static const struct snd_soc_component_driver meson_i2s_dai_component = {
-+	.name	= DRV_NAME,
-+};
-+
-+static int meson_i2s_dai_probe(struct platform_device *pdev)
-+{
-+	struct device *dev = &pdev->dev;
-+	struct meson_i2s_dai *priv;
-+
-+	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
-+	if (!priv)
-+		return -ENOMEM;
-+
-+	platform_set_drvdata(pdev, priv);
-+	priv->core = dev_get_drvdata(dev->parent);
-+
-+	priv->fast = devm_clk_get(dev, "fast");
-+	if (IS_ERR(priv->fast)) {
-+		if (PTR_ERR(priv->fast) != -EPROBE_DEFER)
-+			dev_err(dev, "Can't get the i2s fast domain clock\n");
-+		return PTR_ERR(priv->fast);
-+	}
-+
-+	priv->iface = devm_clk_get(dev, "iface");
-+	if (IS_ERR(priv->iface)) {
-+		if (PTR_ERR(priv->iface) != -EPROBE_DEFER)
-+			dev_err(dev, "Can't get i2s dai clock gate\n");
-+		return PTR_ERR(priv->iface);
-+	}
-+
-+	priv->bclks = devm_clk_get(dev, "bclks");
-+	if (IS_ERR(priv->bclks)) {
-+		if (PTR_ERR(priv->bclks) != -EPROBE_DEFER)
-+			dev_err(dev, "Can't get bit clocks gate\n");
-+		return PTR_ERR(priv->bclks);
-+	}
-+
-+	priv->mclk = devm_clk_get(dev, "mclk");
-+	if (IS_ERR(priv->mclk)) {
-+		if (PTR_ERR(priv->mclk) != -EPROBE_DEFER)
-+			dev_err(dev, "failed to get the i2s master clock\n");
-+		return PTR_ERR(priv->mclk);
-+	}
-+
-+	return devm_snd_soc_register_component(dev, &meson_i2s_dai_component,
-+					       &meson_i2s_dai, 1);
-+}
-+
-+static const struct of_device_id meson_i2s_dai_of_match[] = {
-+	{ .compatible = "amlogic,meson-i2s-dai", },
-+	{ .compatible = "amlogic,meson-gxbb-i2s-dai", },
-+	{ .compatible = "amlogic,meson-gxl-i2s-dai", },
-+	{}
-+};
-+MODULE_DEVICE_TABLE(of, meson_i2s_dai_of_match);
-+
-+static struct platform_driver meson_i2s_dai_pdrv = {
-+	.probe = meson_i2s_dai_probe,
-+	.driver = {
-+		.name = DRV_NAME,
-+		.of_match_table = meson_i2s_dai_of_match,
-+	},
-+};
-+module_platform_driver(meson_i2s_dai_pdrv);
-+
-+MODULE_DESCRIPTION("Meson i2s DAI ASoC Driver");
-+MODULE_AUTHOR("Jerome Brunet <jbrunet@baylibre.com>");
-+MODULE_LICENSE("GPL v2");
-- 
-2.7.4
-
--- a/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0025-snd-meson-activate-HDMI-audio-path.patch
+++ b/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0025-snd-meson-activate-HDMI-audio-path.patch
@@ -1,55 +0,0 @@
-From f40a0d725ebdad433383010d1c5ef92eb99e41a7 Mon Sep 17 00:00:00 2001
-From: Jerome Brunet <jbrunet@baylibre.com>
-Date: Fri, 7 Jul 2017 17:39:21 +0200
-Subject: [PATCH 25/39] snd: meson: activate HDMI audio path
-
-Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
- sound/soc/meson/i2s-dai.c | 22 ++++++++++++++++++++++
- 1 file changed, 22 insertions(+)
-
-diff --git a/sound/soc/meson/i2s-dai.c b/sound/soc/meson/i2s-dai.c
-index 1008af8..63fe098 100644
--- a/sound/soc/meson/i2s-dai.c
-+++ b/sound/soc/meson/i2s-dai.c
-@@ -56,8 +56,19 @@ struct meson_i2s_dai {
- #define AIU_CLK_CTRL_ALRCLK_RIGHT_J		(2 << 8)
- #define AIU_CLK_CTRL_MORE_I2S_DIV_MASK		GENMASK(5, 0)
- #define AIU_CLK_CTRL_MORE_I2S_DIV(div)		(((div) - 1) << 0)
-+#define AIU_CLK_CTRL_MORE_HDMI_TX_SEL_MASK	BIT(6)
-+#define AIU_CLK_CTRL_MORE_HDMI_TX_I958_CLK	(0 << 6)
-+#define AIU_CLK_CTRL_MORE_HDMI_TX_INT_CLK	(1 << 6)
- #define AIU_CODEC_DAC_LRCLK_CTRL_DIV_MASK	GENMASK(11, 0)
- #define AIU_CODEC_DAC_LRCLK_CTRL_DIV(div)	(((div) - 1) << 0)
-+#define AIU_HDMI_CLK_DATA_CTRL_CLK_SEL_MASK	GENMASK(1, 0)
-+#define AIU_HDMI_CLK_DATA_CTRL_CLK_DISABLE	(0 << 0)
-+#define AIU_HDMI_CLK_DATA_CTRL_CLK_PCM		(1 << 0)
-+#define AIU_HDMI_CLK_DATA_CTRL_CLK_I2S		(2 << 0)
-+#define AIU_HDMI_CLK_DATA_CTRL_DATA_SEL_MASK	GENMASK(5, 4)
-+#define AIU_HDMI_CLK_DATA_CTRL_DATA_MUTE	(0 << 4)
-+#define AIU_HDMI_CLK_DATA_CTRL_DATA_PCM		(1 << 4)
-+#define AIU_HDMI_CLK_DATA_CTRL_DATA_I2S		(2 << 4)
- #define AIU_I2S_DAC_CFG_PAYLOAD_SIZE_MASK	GENMASK(1, 0)
- #define AIU_I2S_DAC_CFG_AOCLK_32		(0 << 0)
- #define AIU_I2S_DAC_CFG_AOCLK_48		(2 << 0)
-@@ -221,6 +232,17 @@ static int meson_i2s_dai_hw_params(struct snd_pcm_substream *substream,
- 		return ret;
- 	}
- 
-+	/* Quick and dirty hack for HDMI */
-+	regmap_update_bits(priv->core->aiu, AIU_HDMI_CLK_DATA_CTRL,
-+			   AIU_HDMI_CLK_DATA_CTRL_CLK_SEL_MASK |
-+			   AIU_HDMI_CLK_DATA_CTRL_DATA_SEL_MASK,
-+			   AIU_HDMI_CLK_DATA_CTRL_CLK_I2S |
-+			   AIU_HDMI_CLK_DATA_CTRL_DATA_I2S);
-+
-+	regmap_update_bits(priv->core->aiu, AIU_CLK_CTRL_MORE,
-+			   AIU_CLK_CTRL_MORE_HDMI_TX_SEL_MASK,
-+			   AIU_CLK_CTRL_MORE_HDMI_TX_INT_CLK);
-+
- 	return 0;
- }
- 
-- 
-2.7.4
-
--- a/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0026-drm-meson-select-dw-hdmi-i2s-audio-for-meson-hdmi.patch
+++ b/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0026-drm-meson-select-dw-hdmi-i2s-audio-for-meson-hdmi.patch
@@ -1,23 +0,0 @@
-From e5509c367852ca7a7b52c30fda3dfd2a763ee8f3 Mon Sep 17 00:00:00 2001
-From: Jerome Brunet <jbrunet@baylibre.com>
-Date: Tue, 14 Feb 2017 19:18:04 +0100
-Subject: [PATCH 26/39] drm/meson: select dw-hdmi i2s audio for meson hdmi
-
-Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
-Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
- drivers/gpu/drm/meson/Kconfig | 1 +
- 1 file changed, 1 insertion(+)
-
-diff --git a/drivers/gpu/drm/meson/Kconfig b/drivers/gpu/drm/meson/Kconfig
-index 3ce51d8..02d400b 100644
--- a/drivers/gpu/drm/meson/Kconfig
-+++ b/drivers/gpu/drm/meson/Kconfig
-@@ -13,3 +13,4 @@ config DRM_MESON_DW_HDMI
- 	depends on DRM_MESON
- 	default y if DRM_MESON
- 	select DRM_DW_HDMI
-+	select DRM_DW_HDMI_I2S_AUDIO
-- 
-2.7.4
-
--- a/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0027-ARM64-defconfig-enable-audio-support-for-meson-SoCs-.patch
+++ b/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0027-ARM64-defconfig-enable-audio-support-for-meson-SoCs-.patch
@@ -1,31 +0,0 @@
-From d74574d0836155eadde90e9ba12b8c4d18202d8e Mon Sep 17 00:00:00 2001
-From: Jerome Brunet <jbrunet@baylibre.com>
-Date: Fri, 31 Mar 2017 15:55:03 +0200
-Subject: [PATCH 27/39] ARM64: defconfig: enable audio support for meson SoCs
- as module
-
-Add audio support for meson SoCs. This includes the audio core
-driver and the i2s output interface
-
-Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
-Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
- arch/arm64/configs/defconfig | 2 ++
- 1 file changed, 2 insertions(+)
-
-diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
-index dcf1090..beb5774 100644
--- a/arch/arm64/configs/defconfig
-+++ b/arch/arm64/configs/defconfig
-@@ -405,6 +405,8 @@ CONFIG_SOUND=y
- CONFIG_SND=y
- CONFIG_SND_SOC=y
- CONFIG_SND_BCM2835_SOC_I2S=m
-+CONFIG_SND_SOC_MESON=m
-+CONFIG_SND_SOC_MESON_I2S=m
- CONFIG_SND_SOC_SAMSUNG=y
- CONFIG_SND_SOC_RCAR=m
- CONFIG_SND_SOC_AK4613=m
-- 
-2.7.4
-
--- a/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0028-ARM64-dts-meson-gx-add-audio-controller-nodes.patch
+++ b/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0028-ARM64-dts-meson-gx-add-audio-controller-nodes.patch
@@ -1,89 +0,0 @@
-From 7bd8dcbb1f840fe6d4ae6a1f5f2d3708f09110f9 Mon Sep 17 00:00:00 2001
-From: Jerome Brunet <jbrunet@baylibre.com>
-Date: Wed, 20 Sep 2017 17:22:47 +0200
-Subject: [PATCH 28/39] ARM64: dts: meson-gx: add audio controller nodes
-
-Add audio controller nodes for Amlogic meson gxl.
-This includes the audio-core node, the i2s DAI and i2s
-aiu DMAs.
-
-Audio on this SoC family is still a work in progress. More nodes are likely
-to be added later on (pcm DAIs, input DMAs, SPDIF etc ...)
-
-Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
-Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
- arch/arm64/boot/dts/amlogic/meson-gx.dtsi  | 22 ++++++++++++++++++++++
- arch/arm64/boot/dts/amlogic/meson-gxl.dtsi | 23 +++++++++++++++++++++++
- 2 files changed, 45 insertions(+)
-
-diff --git a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
-index f175db8..ff27ce0 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
-+++ b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
-@@ -224,6 +224,28 @@
- 				#reset-cells = <1>;
- 			};
- 
-+			audio: audio@5400 {
-+				compatible = "amlogic,meson-audio-core";
-+				reg = <0x0 0x5400 0x0 0x2ac>,
-+				      <0x0 0xa000 0x0 0x304>;
-+				reg-names = "aiu", "audin";
-+				status = "disabled";
-+
-+				aiu_i2s_dma: aiu_i2s_dma {
-+					#sound-dai-cells = <0>;
-+					compatible = "amlogic,meson-aiu-i2s-dma";
-+					interrupts = <GIC_SPI 48 IRQ_TYPE_EDGE_RISING>;
-+					status = "disabled";
-+				};
-+
-+				i2s_dai: i2s_dai {
-+					#sound-dai-cells = <0>;
-+					compatible = "amlogic,meson-i2s-dai";
-+					status = "disabled";
-+				};
-+
-+			};
-+
- 			uart_A: serial@84c0 {
- 				compatible = "amlogic,meson-gx-uart", "amlogic,meson-uart";
- 				reg = <0x0 0x84c0 0x0 0x14>;
-diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi
-index 68ea67a..9d2fb46 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi
-+++ b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi
-@@ -691,6 +691,29 @@
- 	};
- };
- 
-+&audio {
-+	clocks = <&clkc CLKID_AIU>,
-+		 <&clkc CLKID_AIU_GLUE>,
-+		 <&clkc CLKID_I2S_SPDIF>;
-+	clock-names = "aiu_top", "aiu_glue", "audin";
-+	resets = <&reset RESET_AIU>,
-+		 <&reset RESET_AUDIN>;
-+	reset-names = "aiu", "audin";
-+};
-+
-+&aiu_i2s_dma {
-+	clocks = <&clkc CLKID_I2S_OUT>;
-+	clock-names = "fast";
-+};
-+
-+&i2s_dai {
-+	clocks = <&clkc CLKID_I2S_OUT>,
-+		 <&clkc CLKID_MIXER_IFACE>,
-+		 <&clkc CLKID_AOCLK_GATE>,
-+		 <&clkc CLKID_CTS_AMCLK>;
-+	clock-names = "fast", "iface", "bclks", "mclk";
-+};
-+
- &saradc {
- 	compatible = "amlogic,meson-gxl-saradc", "amlogic,meson-saradc";
- 	clocks = <&xtal>,
-- 
-2.7.4
-
--- a/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0031-ARM64-dts-meson-gx-add-VPU-power-domain.patch
+++ b/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0031-ARM64-dts-meson-gx-add-VPU-power-domain.patch
@@ -1,165 +0,0 @@
-From 107e323a199087cfb84c22b31d769f0b2e623e4a Mon Sep 17 00:00:00 2001
-From: Neil Armstrong <narmstrong@baylibre.com>
-Date: Fri, 13 Oct 2017 14:47:23 +0200
-Subject: [PATCH 31/39] ARM64: dts: meson-gx: add VPU power domain
-
-This patch adds support for the VPU Power Domain nodes, and attaches the
-VPU power domain to the VPU node.
-
-Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
- arch/arm64/boot/dts/amlogic/meson-gx.dtsi   | 11 ++++++++
- arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi | 43 +++++++++++++++++++++++++++++
- arch/arm64/boot/dts/amlogic/meson-gxl.dtsi  | 43 +++++++++++++++++++++++++++++
- 3 files changed, 97 insertions(+)
-
-diff --git a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
-index ff27ce0..ace0e4b 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
-+++ b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
-@@ -393,6 +393,12 @@
- 				compatible = "amlogic,meson-gx-ao-sysctrl", "syscon", "simple-mfd";
- 				reg =  <0x0 0x0 0x0 0x100>;
- 
-+				pwrc_vpu: power-controller-vpu {
-+					compatible = "amlogic,meson-gx-pwrc-vpu";
-+					#power-domain-cells = <0>;
-+					amlogic,hhi-sysctrl = <&sysctrl>;
-+				};
-+
- 				clkc_AO: clock-controller {
- 					compatible = "amlogic,meson-gx-aoclkc";
- 					#clock-cells = <1>;
-@@ -470,6 +476,11 @@
- 			#size-cells = <2>;
- 			ranges = <0x0 0x0 0x0 0xc883c000 0x0 0x2000>;
- 
-+			sysctrl: system-controller@0 {
-+				compatible = "amlogic,meson-gx-hhi-sysctrl", "syscon", "simple-mfd";
-+				reg = <0 0 0 0x400>;
-+			};
-+
- 			mailbox: mailbox@404 {
- 				compatible = "amlogic,meson-gx-mhu", "amlogic,meson-gxbb-mhu";
- 				reg = <0 0x404 0 0x4c>;
-diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
-index ef12d67..b5b6b33 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
-+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
-@@ -692,6 +692,48 @@
- 	};
- };
- 
-+&pwrc_vpu {
-+	resets = <&reset RESET_VIU>,
-+		 <&reset RESET_VENC>,
-+		 <&reset RESET_VCBUS>,
-+		 <&reset RESET_BT656>,
-+		 <&reset RESET_DVIN_RESET>,
-+		 <&reset RESET_RDMA>,
-+		 <&reset RESET_VENCI>,
-+		 <&reset RESET_VENCP>,
-+		 <&reset RESET_VDAC>,
-+		 <&reset RESET_VDI6>,
-+		 <&reset RESET_VENCL>,
-+		 <&reset RESET_VID_LOCK>;
-+	clocks = <&clkc CLKID_VPU>,
-+	         <&clkc CLKID_VAPB>;
-+	clock-names = "vpu", "vapb";
-+	/*
-+	 * VPU clocking is provided by two identical clock paths
-+	 * VPU_0 and VPU_1 muxed to a single clock by a glitch
-+	 * free mux to safely change frequency while running.
-+	 * Same for VAPB but with a final gate after the glitch free mux.
-+	 */
-+	assigned-clocks = <&clkc CLKID_VPU_0_SEL>,
-+			  <&clkc CLKID_VPU_0>,
-+			  <&clkc CLKID_VPU>, /* Glitch free mux */
-+			  <&clkc CLKID_VAPB_0_SEL>,
-+			  <&clkc CLKID_VAPB_0>,
-+			  <&clkc CLKID_VAPB_SEL>; /* Glitch free mux */
-+	assigned-clock-parents = <&clkc CLKID_FCLK_DIV3>,
-+				 <0>, /* Do Nothing */
-+				 <&clkc CLKID_VPU_0>,
-+				 <&clkc CLKID_FCLK_DIV4>,
-+				 <0>, /* Do Nothing */
-+				 <&clkc CLKID_VAPB_0>;
-+	assigned-clock-rates = <0>, /* Do Nothing */
-+			       <666666666>,
-+			       <0>, /* Do Nothing */
-+			       <0>, /* Do Nothing */
-+			       <250000000>,
-+			       <0>; /* Do Nothing */
-+};
-+
- &saradc {
- 	compatible = "amlogic,meson-gxbb-saradc", "amlogic,meson-saradc";
- 	clocks = <&xtal>,
-@@ -761,4 +803,5 @@
- 
- &vpu {
- 	compatible = "amlogic,meson-gxbb-vpu", "amlogic,meson-gx-vpu";
-+	power-domains = <&pwrc_vpu>;
- };
-diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi
-index 02b52b6..d5c8952 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi
-+++ b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi
-@@ -721,6 +721,48 @@
- 	clock-names = "fast", "iface", "bclks", "mclk";
- };
- 
-+&pwrc_vpu {
-+	resets = <&reset RESET_VIU>,
-+		 <&reset RESET_VENC>,
-+		 <&reset RESET_VCBUS>,
-+		 <&reset RESET_BT656>,
-+		 <&reset RESET_DVIN_RESET>,
-+		 <&reset RESET_RDMA>,
-+		 <&reset RESET_VENCI>,
-+		 <&reset RESET_VENCP>,
-+		 <&reset RESET_VDAC>,
-+		 <&reset RESET_VDI6>,
-+		 <&reset RESET_VENCL>,
-+		 <&reset RESET_VID_LOCK>;
-+	clocks = <&clkc CLKID_VPU>,
-+	         <&clkc CLKID_VAPB>;
-+	clock-names = "vpu", "vapb";
-+	/*
-+	 * VPU clocking is provided by two identical clock paths
-+	 * VPU_0 and VPU_1 muxed to a single clock by a glitch
-+	 * free mux to safely change frequency while running.
-+	 * Same for VAPB but with a final gate after the glitch free mux.
-+	 */
-+	assigned-clocks = <&clkc CLKID_VPU_0_SEL>,
-+			  <&clkc CLKID_VPU_0>,
-+			  <&clkc CLKID_VPU>, /* Glitch free mux */
-+			  <&clkc CLKID_VAPB_0_SEL>,
-+			  <&clkc CLKID_VAPB_0>,
-+			  <&clkc CLKID_VAPB_SEL>; /* Glitch free mux */
-+	assigned-clock-parents = <&clkc CLKID_FCLK_DIV3>,
-+				 <0>, /* Do Nothing */
-+				 <&clkc CLKID_VPU_0>,
-+				 <&clkc CLKID_FCLK_DIV4>,
-+				 <0>, /* Do Nothing */
-+				 <&clkc CLKID_VAPB_0>;
-+	assigned-clock-rates = <0>, /* Do Nothing */
-+			       <666666666>,
-+			       <0>, /* Do Nothing */
-+			       <0>, /* Do Nothing */
-+			       <250000000>,
-+			       <0>; /* Do Nothing */
-+};
-+
- &saradc {
- 	compatible = "amlogic,meson-gxl-saradc", "amlogic,meson-saradc";
- 	clocks = <&xtal>,
-@@ -790,4 +832,5 @@
- 
- &vpu {
- 	compatible = "amlogic,meson-gxl-vpu", "amlogic,meson-gx-vpu";
-+	power-domains = <&pwrc_vpu>;
- };
-- 
-2.7.4
-
--- a/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0033-ARM64-dts-meson-gx-grow-reset-controller-memory-zone.patch
+++ b/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0033-ARM64-dts-meson-gx-grow-reset-controller-memory-zone.patch
@@ -1,29 +0,0 @@
-From 7c3d7dee433538e1450564582da535cac44a2361 Mon Sep 17 00:00:00 2001
-From: Neil Armstrong <narmstrong@baylibre.com>
-Date: Mon, 16 Oct 2017 17:00:59 +0200
-Subject: [PATCH 33/39] ARM64: dts: meson-gx: grow reset controller memory zone
-
-Now the Amlogic Meson GX SoCs datasheet documents all the Reset registers,
-grow the memory in the node to allow usage of the level registers.
-
-Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
- arch/arm64/boot/dts/amlogic/meson-gx.dtsi | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
-index ace0e4b..2e0ee17 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
-+++ b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
-@@ -220,7 +220,7 @@
- 
- 			reset: reset-controller@4404 {
- 				compatible = "amlogic,meson-gx-reset", "amlogic,meson-gxbb-reset";
-				reg = <0x0 0x04404 0x0 0x20>;
-+				reg = <0x0 0x04404 0x0 0x9c>;
- 				#reset-cells = <1>;
- 			};
- 
-- 
-2.7.4
-
--- a/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0034-ARM64-dts-odroid-c2-Add-HDMI-and-CEC-Nodes.patch
+++ b/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0034-ARM64-dts-odroid-c2-Add-HDMI-and-CEC-Nodes.patch
@@ -1,64 +0,0 @@
-From a0cd1597b6b505c8d72406d31cf408933b2993e9 Mon Sep 17 00:00:00 2001
-From: Neil Armstrong <narmstrong@baylibre.com>
-Date: Mon, 16 Oct 2017 17:00:26 +0200
-Subject: [PATCH 34/39] ARM64: dts: odroid-c2: Add HDMI and CEC Nodes
-
-Now the VPU Power Domain has been fixed while boothing from Mainline U-Boot,
-VPU and HDMI nodes can finally be added to the Odroid-C2 DTS.
-
-Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
- .../arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts | 30 ++++++++++++++++++++++
- 1 file changed, 30 insertions(+)
-
-diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts
-index 4221e1f..dc3d1ba 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts
-+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts
-@@ -135,6 +135,24 @@
- 		compatible = "mmc-pwrseq-emmc";
- 		reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>;
- 	};
-+
-+	hdmi-connector {
-+		compatible = "hdmi-connector";
-+		type = "a";
-+
-+		port {
-+			hdmi_connector_in: endpoint {
-+				remote-endpoint = <&hdmi_tx_tmds_out>;
-+			};
-+		};
-+	};
-+};
-+
-+&cec_AO {
-+	status = "okay";
-+	pinctrl-0 = <&ao_cec_pins>;
-+	pinctrl-names = "default";
-+	hdmi-phandle = <&hdmi_tx>;
- };
- 
- &ethmac {
-@@ -177,6 +195,18 @@
- 	};
- };
- 
-+&hdmi_tx {
-+	status = "okay";
-+	pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>;
-+	pinctrl-names = "default";
-+};
-+
-+&hdmi_tx_tmds_port {
-+	hdmi_tx_tmds_out: endpoint {
-+		remote-endpoint = <&hdmi_connector_in>;
-+	};
-+};
-+
- &i2c_A {
- 	status = "okay";
- 	pinctrl-0 = <&i2c_a_pins>;
-- 
-2.7.4
-
--- a/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0035-ARM64-dts-meson-activate-hdmi-audio-HDMI-enabled-boa.patch
+++ b/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0035-ARM64-dts-meson-activate-hdmi-audio-HDMI-enabled-boa.patch
@@ -1,582 +0,0 @@
-From bc1416cbeb6fb588e8573c9904b691259d173093 Mon Sep 17 00:00:00 2001
-From: Jerome Brunet <jbrunet@baylibre.com>
-Date: Wed, 20 Sep 2017 18:10:08 +0200
-Subject: [PATCH 35/39] ARM64: dts: meson: activate hdmi audio HDMI enabled
- boards
-
-This patch activate audio over HDMI on selected boards
-
-Please note that this audio support is based on WIP changes
-This should be considered as preview and it does not reflect
-the audio I expect to see merged
-
-Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
-Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
- .../arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi | 37 +++++++++++++++++++++
- .../boot/dts/amlogic/meson-gxbb-nexbox-a95x.dts    | 38 ++++++++++++++++++++++
- .../arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts | 37 +++++++++++++++++++++
- arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi   | 37 +++++++++++++++++++++
- .../boot/dts/amlogic/meson-gxbb-wetek-play2.dts    | 37 +++++++++++++++++++++
- .../dts/amlogic/meson-gxl-s905x-khadas-vim.dts     | 37 +++++++++++++++++++++
- .../dts/amlogic/meson-gxl-s905x-libretech-cc.dts   | 37 +++++++++++++++++++++
- .../dts/amlogic/meson-gxl-s905x-nexbox-a95x.dts    | 37 +++++++++++++++++++++
- .../boot/dts/amlogic/meson-gxl-s905x-p212.dts      | 37 +++++++++++++++++++++
- .../boot/dts/amlogic/meson-gxm-khadas-vim2.dts     | 37 +++++++++++++++++++++
- .../arm64/boot/dts/amlogic/meson-gxm-nexbox-a1.dts | 37 +++++++++++++++++++++
- 11 files changed, 408 insertions(+)
-
-diff --git a/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi b/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi
-index 979abaf..91b7ac8 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi
-+++ b/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi
-@@ -130,6 +130,31 @@
- 			};
- 		};
- 	};
-+
-+	sound {
-+		compatible = "simple-audio-card";
-+		simple-audio-card,name = "meson-gx-preview";
-+		status = "okay";
-+
-+		simple-audio-card,dai-link@0 {
-+			/* HDMI Output */
-+			format = "i2s";
-+			mclk-fs = <256>;
-+			bitclock-master =  <&i2s_dai>;
-+			frame-master = <&i2s_dai>;
-+			plat {
-+				sound-dai = <&aiu_i2s_dma>;
-+			};
-+
-+			cpu {
-+				sound-dai = <&i2s_dai>;
-+			};
-+
-+			codec {
-+				sound-dai = <&hdmi_tx>;
-+			};
-+		};
-+	};
- };
- 
- &cec_AO {
-@@ -139,6 +164,18 @@
- 	hdmi-phandle = <&hdmi_tx>;
- };
- 
-+&audio {
-+	status = "okay";
-+};
-+
-+&aiu_i2s_dma {
-+	status = "okay";
-+};
-+
-+&i2s_dai {
-+	status = "okay";
-+};
-+
- &cvbs_vdac_port {
- 	cvbs_vdac_out: endpoint {
- 		remote-endpoint = <&cvbs_connector_in>;
-diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-nexbox-a95x.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-nexbox-a95x.dts
-index 9a77323..2357a38 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-nexbox-a95x.dts
-+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-nexbox-a95x.dts
-@@ -143,6 +143,31 @@
- 		clock-names = "ext_clock";
- 	};
- 
-+	sound {
-+		compatible = "simple-audio-card";
-+		simple-audio-card,name = "meson-gx-preview";
-+		status = "okay";
-+
-+		simple-audio-card,dai-link@0 {
-+			/* HDMI Output */
-+			format = "i2s";
-+			mclk-fs = <256>;
-+			bitclock-master =  <&i2s_dai>;
-+			frame-master = <&i2s_dai>;
-+			plat {
-+				sound-dai = <&aiu_i2s_dma>;
-+			};
-+
-+			cpu {
-+				sound-dai = <&i2s_dai>;
-+			};
-+
-+			codec {
-+				sound-dai = <&hdmi_tx>;
-+			};
-+		};
-+	};
-+
- 	cvbs-connector {
- 		compatible = "composite-video-connector";
- 
-@@ -178,6 +203,19 @@
- 	hdmi-phandle = <&hdmi_tx>;
- };
- 
-+
-+&audio {
-+	status = "okay";
-+};
-+
-+&aiu_i2s_dma {
-+	status = "okay";
-+};
-+
-+&i2s_dai {
-+	status = "okay";
-+};
-+
- &ethmac {
- 	status = "okay";
- 	pinctrl-0 = <&eth_rmii_pins>;
-diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts
-index dc3d1ba..4e0b3c7 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts
-+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts
-@@ -146,6 +146,31 @@
- 			};
- 		};
- 	};
-+
-+	sound {
-+		compatible = "simple-audio-card";
-+		simple-audio-card,name = "meson-gx-preview";
-+		status = "okay";
-+
-+		simple-audio-card,dai-link@0 {
-+			/* HDMI Output */
-+			format = "i2s";
-+			mclk-fs = <256>;
-+			bitclock-master =  <&i2s_dai>;
-+			frame-master = <&i2s_dai>;
-+			plat {
-+				sound-dai = <&aiu_i2s_dma>;
-+			};
-+
-+			cpu {
-+				sound-dai = <&i2s_dai>;
-+			};
-+
-+			codec {
-+				sound-dai = <&hdmi_tx>;
-+			};
-+		};
-+	};
- };
- 
- &cec_AO {
-@@ -155,6 +180,18 @@
- 	hdmi-phandle = <&hdmi_tx>;
- };
- 
-+&audio {
-+	status = "okay";
-+};
-+
-+&aiu_i2s_dma {
-+	status = "okay";
-+};
-+
-+&i2s_dai {
-+	status = "okay";
-+};
-+
- &ethmac {
- 	status = "okay";
- 	pinctrl-0 = <&eth_rgmii_pins>;
-diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi
-index 932158a..c9d4870 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi
-+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi
-@@ -149,6 +149,31 @@
- 			};
- 		};
- 	};
-+	
-+	sound {
-+		compatible = "simple-audio-card";
-+		simple-audio-card,name = "meson-gx-preview";
-+		status = "okay";
-+
-+		simple-audio-card,dai-link@0 {
-+			/* HDMI Output */
-+			format = "i2s";
-+			mclk-fs = <256>;
-+			bitclock-master =  <&i2s_dai>;
-+			frame-master = <&i2s_dai>;
-+			plat {
-+				sound-dai = <&aiu_i2s_dma>;
-+			};
-+
-+			cpu {
-+				sound-dai = <&i2s_dai>;
-+			};
-+
-+			codec {
-+				sound-dai = <&hdmi_tx>;
-+			};
-+		};
-+	};
- };
- 
- &cec_AO {
-@@ -158,6 +183,18 @@
- 	hdmi-phandle = <&hdmi_tx>;
- };
- 
-+&audio {
-+	status = "okay";
-+};
-+
-+&aiu_i2s_dma {
-+	status = "okay";
-+};
-+
-+&i2s_dai {
-+	status = "okay";
-+};
-+
- &cvbs_vdac_port {
- 	cvbs_vdac_out: endpoint {
- 		remote-endpoint = <&cvbs_connector_in>;
-diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek-play2.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek-play2.dts
-index f7144fd..58a0f51 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek-play2.dts
-+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek-play2.dts
-@@ -106,6 +106,31 @@
- 			};
- 		};
- 	};
-+
-+	sound {
-+		compatible = "simple-audio-card";
-+		simple-audio-card,name = "meson-gx-preview";
-+		status = "okay";
-+
-+		simple-audio-card,dai-link@0 {
-+			/* HDMI Output */
-+			format = "i2s";
-+			mclk-fs = <256>;
-+			bitclock-master =  <&i2s_dai>;
-+			frame-master = <&i2s_dai>;
-+			plat {
-+				sound-dai = <&aiu_i2s_dma>;
-+			};
-+
-+			cpu {
-+				sound-dai = <&i2s_dai>;
-+			};
-+
-+			codec {
-+				sound-dai = <&hdmi_tx>;
-+			};
-+		};
-+	};
- };
- 
- &cec_AO {
-@@ -115,6 +140,18 @@
- 	hdmi-phandle = <&hdmi_tx>;
- };
- 
-+&audio {
-+	status = "okay";
-+};
-+
-+&aiu_i2s_dma {
-+	status = "okay";
-+};
-+
-+&i2s_dai {
-+	status = "okay";
-+};
-+
- &cvbs_vdac_port {
- 	cvbs_vdac_out: endpoint {
- 		remote-endpoint = <&cvbs_connector_in>;
-diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts
-index f7b37de..ce92ca5 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts
-+++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts
-@@ -65,6 +65,31 @@
- 			};
- 		};
- 	};
-+
-+	sound {
-+		compatible = "simple-audio-card";
-+		simple-audio-card,name = "meson-gx-preview";
-+		status = "okay";
-+
-+		simple-audio-card,dai-link@0 {
-+			/* HDMI Output */
-+			format = "i2s";
-+			mclk-fs = <256>;
-+			bitclock-master =  <&i2s_dai>;
-+			frame-master = <&i2s_dai>;
-+			plat {
-+				sound-dai = <&aiu_i2s_dma>;
-+			};
-+
-+			cpu {
-+				sound-dai = <&i2s_dai>;
-+			};
-+
-+			codec {
-+				sound-dai = <&hdmi_tx>;
-+			};
-+		};
-+	};
- };
- 
- &cec_AO {
-@@ -74,6 +99,18 @@
- 	hdmi-phandle = <&hdmi_tx>;
- };
- 
-+&audio {
-+	status = "okay";
-+};
-+
-+&aiu_i2s_dma {
-+	status = "okay";
-+};
-+
-+&i2s_dai {
-+	status = "okay";
-+};
-+
- &hdmi_tx {
- 	status = "okay";
- 	pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>;
-diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts
-index 0c4ed4e..29d8e01 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts
-+++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts
-@@ -83,6 +83,31 @@
- 		enable-active-high;
- 	};
- 
-+	sound {
-+		compatible = "simple-audio-card";
-+		simple-audio-card,name = "meson-gx-preview";
-+		status = "okay";
-+
-+		simple-audio-card,dai-link@0 {
-+			/* HDMI Output */
-+			format = "i2s";
-+			mclk-fs = <256>;
-+			bitclock-master =  <&i2s_dai>;
-+			frame-master = <&i2s_dai>;
-+			plat {
-+				sound-dai = <&aiu_i2s_dma>;
-+			};
-+
-+			cpu {
-+				sound-dai = <&i2s_dai>;
-+			};
-+
-+			codec {
-+				sound-dai = <&hdmi_tx>;
-+			};
-+		};
-+	};
-+
- 	vcc_3v3: regulator-vcc_3v3 {
- 		compatible = "regulator-fixed";
- 		regulator-name = "VCC_3V3";
-@@ -122,6 +147,18 @@
- 	hdmi-phandle = <&hdmi_tx>;
- };
- 
-+&audio {
-+	status = "okay";
-+};
-+
-+&aiu_i2s_dma {
-+	status = "okay";
-+};
-+
-+&i2s_dai {
-+	status = "okay";
-+};
-+
- &cvbs_vdac_port {
- 	cvbs_vdac_out: endpoint {
- 		remote-endpoint = <&cvbs_connector_in>;
-diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-nexbox-a95x.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-nexbox-a95x.dts
-index 0fdebcc..dcb571a 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-nexbox-a95x.dts
-+++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-nexbox-a95x.dts
-@@ -138,6 +138,31 @@
- 			};
- 		};
- 	};
-+
-+	sound {
-+		compatible = "simple-audio-card";
-+		simple-audio-card,name = "meson-gx-preview";
-+		status = "okay";
-+
-+		simple-audio-card,dai-link@0 {
-+			/* HDMI Output */
-+			format = "i2s";
-+			mclk-fs = <256>;
-+			bitclock-master =  <&i2s_dai>;
-+			frame-master = <&i2s_dai>;
-+			plat {
-+				sound-dai = <&aiu_i2s_dma>;
-+			};
-+
-+			cpu {
-+				sound-dai = <&i2s_dai>;
-+			};
-+
-+			codec {
-+				sound-dai = <&hdmi_tx>;
-+			};
-+		};
-+	};
- };
- 
- &cec_AO {
-@@ -147,6 +172,18 @@
- 	hdmi-phandle = <&hdmi_tx>;
- };
- 
-+&audio {
-+	status = "okay";
-+};
-+
-+&aiu_i2s_dma {
-+	status = "okay";
-+};
-+
-+&i2s_dai {
-+	status = "okay";
-+};
-+
- &cvbs_vdac_port {
- 	cvbs_vdac_out: endpoint {
- 		remote-endpoint = <&cvbs_connector_in>;
-diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dts
-index 4f6b1c9..f23f148 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dts
-+++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dts
-@@ -69,6 +69,31 @@
- 			};
- 		};
- 	};
-+
-+	sound {
-+		compatible = "simple-audio-card";
-+		simple-audio-card,name = "meson-gx-preview";
-+		status = "okay";
-+
-+		simple-audio-card,dai-link@0 {
-+			/* HDMI Output */
-+			format = "i2s";
-+			mclk-fs = <256>;
-+			bitclock-master =  <&i2s_dai>;
-+			frame-master = <&i2s_dai>;
-+			plat {
-+				sound-dai = <&aiu_i2s_dma>;
-+			};
-+
-+			cpu {
-+				sound-dai = <&i2s_dai>;
-+			};
-+
-+			codec {
-+				sound-dai = <&hdmi_tx>;
-+			};
-+		};
-+	};
- };
- 
- &cec_AO {
-@@ -78,6 +103,18 @@
- 	hdmi-phandle = <&hdmi_tx>;
- };
- 
-+&audio {
-+	status = "okay";
-+};
-+
-+&aiu_i2s_dma {
-+	status = "okay";
-+};
-+
-+&i2s_dai {
-+	status = "okay";
-+};
-+
- &cvbs_vdac_port {
- 	cvbs_vdac_out: endpoint {
- 		remote-endpoint = <&cvbs_connector_in>;
-diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm-nexbox-a1.dts b/arch/arm64/boot/dts/amlogic/meson-gxm-nexbox-a1.dts
-index e70b5e2..8444f79 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxm-nexbox-a1.dts
-+++ b/arch/arm64/boot/dts/amlogic/meson-gxm-nexbox-a1.dts
-@@ -111,6 +111,31 @@
- 			};
- 		};
- 	};
-+
-+	sound {
-+		compatible = "simple-audio-card";
-+		simple-audio-card,name = "meson-gx-preview";
-+		status = "okay";
-+
-+		simple-audio-card,dai-link@0 {
-+			/* HDMI Output */
-+			format = "i2s";
-+			mclk-fs = <256>;
-+			bitclock-master =  <&i2s_dai>;
-+			frame-master = <&i2s_dai>;
-+			plat {
-+				sound-dai = <&aiu_i2s_dma>;
-+			};
-+
-+			cpu {
-+				sound-dai = <&i2s_dai>;
-+			};
-+
-+			codec {
-+				sound-dai = <&hdmi_tx>;
-+			};
-+		};
-+	};
- };
- 
- &cec_AO {
-@@ -120,6 +145,18 @@
- 	hdmi-phandle = <&hdmi_tx>;
- };
- 
-+&audio {
-+	status = "okay";
-+};
-+
-+&aiu_i2s_dma {
-+	status = "okay";
-+};
-+
-+&i2s_dai {
-+	status = "okay";
-+};
-+
- &cvbs_vdac_port {
- 	cvbs_vdac_out: endpoint {
- 		remote-endpoint = <&cvbs_connector_in>;
-- 
-2.7.4
-
--- a/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0038-ARM64-dts-meson-bump-mali450-clk-to-744MHz.patch
+++ b/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0038-ARM64-dts-meson-bump-mali450-clk-to-744MHz.patch
@@ -1,66 +0,0 @@
-From 63ffa5db0046106f6c3b8687e200e17599e14b9f Mon Sep 17 00:00:00 2001
-From: Neil Armstrong <narmstrong@baylibre.com>
-Date: Fri, 23 Feb 2018 11:18:11 +0100
-Subject: [PATCH 38/39] ARM64: dts: meson: bump mali450 clk to 744MHz
-
-Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
- arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi     | 11 +++++++----
- arch/arm64/boot/dts/amlogic/meson-gxl-mali.dtsi | 11 +++++++----
- 2 files changed, 14 insertions(+), 8 deletions(-)
-
-diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
-index b5b6b33..d00a9f2 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
-+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
-@@ -288,14 +288,17 @@
- 		 * MALI_0 and MALI_1 muxed to a single clock by a glitch
- 		 * free mux to safely change frequency while running.
- 		 */
-		assigned-clocks = <&clkc CLKID_MALI_0_SEL>,
-+		assigned-clocks = <&clkc CLKID_GP0_PLL>,
-+				  <&clkc CLKID_MALI_0_SEL>,
- 				  <&clkc CLKID_MALI_0>,
- 				  <&clkc CLKID_MALI>; /* Glitch free mux */
-		assigned-clock-parents = <&clkc CLKID_FCLK_DIV3>,
-+		assigned-clock-parents = <0>, /* Do Nothing */
-+					 <&clkc CLKID_GP0_PLL>,
- 					 <0>, /* Do Nothing */
- 					 <&clkc CLKID_MALI_0>;
-		assigned-clock-rates = <0>, /* Do Nothing */
-				       <666666666>,
-+		assigned-clock-rates = <744000000>,
-+				       <0>, /* Do Nothing */
-+				       <744000000>,
- 				       <0>; /* Do Nothing */
- 	};
- };
-diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-mali.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl-mali.dtsi
-index f06cc234..972df67 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxl-mali.dtsi
-+++ b/arch/arm64/boot/dts/amlogic/meson-gxl-mali.dtsi
-@@ -30,14 +30,17 @@
- 		 * MALI_0 and MALI_1 muxed to a single clock by a glitch
- 		 * free mux to safely change frequency while running.
- 		 */
-		assigned-clocks = <&clkc CLKID_MALI_0_SEL>,
-+		assigned-clocks = <&clkc CLKID_GP0_PLL>,
-+				  <&clkc CLKID_MALI_0_SEL>,
- 				  <&clkc CLKID_MALI_0>,
- 				  <&clkc CLKID_MALI>; /* Glitch free mux */
-		assigned-clock-parents = <&clkc CLKID_FCLK_DIV3>,
-+		assigned-clock-parents = <0>, /* Do Nothing */
-+					 <&clkc CLKID_GP0_PLL>,
- 					 <0>, /* Do Nothing */
- 					 <&clkc CLKID_MALI_0>;
-		assigned-clock-rates = <0>, /* Do Nothing */
-				       <666666666>,
-+		assigned-clock-rates = <744000000>,
-+				       <0>, /* Do Nothing */
-+				       <744000000>,
- 				       <0>; /* Do Nothing */
- 	};
- };
-- 
-2.7.4
-
--- a/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0039-drm-meson-Add-support-for-DMT-modes-on-HDMI.patch
+++ b/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0039-drm-meson-Add-support-for-DMT-modes-on-HDMI.patch
@@ -1,773 +0,0 @@
-From 8da289631087c90a3b644cbdd124bee7f7b348f3 Mon Sep 17 00:00:00 2001
-From: Neil Armstrong <narmstrong@baylibre.com>
-Date: Thu, 8 Mar 2018 16:35:34 +0100
-Subject: [PATCH 39/39] drm/meson: Add support for DMT modes on HDMI
-
-This patch adds support for DMT display modes over HDMI.
-The modes timings configurations are from the Amlogic Vendor linux tree
-and tested over multiples monitors.
-Previously only a selected number of CEA modes were supported.
-
-Only these following modes are supported with these changes:
- 640x480@60Hz
- 800x600@60Hz
- 1024x768@60Hz
- 1152x864@75Hz
- 1280x1024@60Hz
- 1600x1200@60Hz
- 1920x1080@60Hz
-
-The associated code to handle the clock rates is also added.
-
-Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
- drivers/gpu/drm/meson/meson_dw_hdmi.c |  22 +--
- drivers/gpu/drm/meson/meson_vclk.c    | 219 ++++++++++++++++++++-
- drivers/gpu/drm/meson/meson_venc.c    | 347 +++++++++++++++++++++++++++++++++-
- drivers/gpu/drm/meson/meson_venc.h    |   1 +
- 4 files changed, 570 insertions(+), 19 deletions(-)
-
-diff --git a/drivers/gpu/drm/meson/meson_dw_hdmi.c b/drivers/gpu/drm/meson/meson_dw_hdmi.c
-index 17de3af..9d70ed6 100644
--- a/drivers/gpu/drm/meson/meson_dw_hdmi.c
-+++ b/drivers/gpu/drm/meson/meson_dw_hdmi.c
-@@ -537,7 +537,6 @@ static irqreturn_t dw_hdmi_top_thread_irq(int irq, void *dev_id)
- 	return IRQ_HANDLED;
- }
- 
-/* TOFIX Enable support for non-vic modes */
- static enum drm_mode_status
- dw_hdmi_mode_valid(struct drm_connector *connector,
- 		   const struct drm_display_mode *mode)
-@@ -554,12 +553,12 @@ dw_hdmi_mode_valid(struct drm_connector *connector,
- 		mode->vdisplay, mode->vsync_start,
- 		mode->vsync_end, mode->vtotal, mode->type, mode->flags);
- 
-	/* For now, only accept VIC modes */
-	if (!vic)
-		return MODE_BAD;
-
-	/* For now, filter by supported VIC modes */
-	if (!meson_venc_hdmi_supported_vic(vic))
-+	/* Check against non-VIC supported modes */
-+	if (!vic) {
-+		if (!meson_venc_hdmi_supported_mode(mode))
-+			return MODE_BAD;
-+	/* Check against supported VIC modes */
-+	} else if (!meson_venc_hdmi_supported_vic(vic))
- 		return MODE_BAD;
- 
- 	vclk_freq = mode->clock;
-@@ -585,9 +584,14 @@ dw_hdmi_mode_valid(struct drm_connector *connector,
- 
- 	/* Finally filter by configurable vclk frequencies */
- 	switch (vclk_freq) {
-+	case 25175:
-+	case 40000:
- 	case 54000:
-+	case 65000:
- 	case 74250:
-+	case 108000:
- 	case 148500:
-+	case 162000:
- 	case 297000:
- 	case 594000:
- 		return MODE_OK;
-@@ -652,10 +656,6 @@ static void meson_venc_hdmi_encoder_mode_set(struct drm_encoder *encoder,
- 	DRM_DEBUG_DRIVER("%d:\"%s\" vic %d\n",
- 			 mode->base.id, mode->name, vic);
- 
-	/* Should have been filtered */
-	if (!vic)
-		return;
-
- 	/* VENC + VENC-DVI Mode setup */
- 	meson_venc_hdmi_mode_set(priv, vic, mode);
- 
-diff --git a/drivers/gpu/drm/meson/meson_vclk.c b/drivers/gpu/drm/meson/meson_vclk.c
-index 4767704..f051122 100644
--- a/drivers/gpu/drm/meson/meson_vclk.c
-+++ b/drivers/gpu/drm/meson/meson_vclk.c
-@@ -328,14 +328,24 @@ static void meson_venci_cvbs_clock_config(struct meson_drm *priv)
- #define MESON_VCLK_HDMI_DDR_54000	2
- /* 2970 /4 /1 /1 /5 /1  => /1 /2 */
- #define MESON_VCLK_HDMI_DDR_148500	3
-+/* 4028 /4 /4 /1 /5 /2  => /1 /1 */
-+#define MESON_VCLK_HDMI_25175		4
-+/* 3200 /4 /2 /1 /5 /2  => /1 /1 */
-+#define MESON_VCLK_HDMI_40000		5
-+/* 5200 /4 /2 /1 /5 /2  => /1 /1 */
-+#define MESON_VCLK_HDMI_65000		6
- /* 2970 /2 /2 /2 /5 /1  => /1 /1 */
-#define MESON_VCLK_HDMI_74250		4
-+#define MESON_VCLK_HDMI_74250		7
-+/* 4320 /4 /1 /1 /5 /2  => /1 /1 */
-+#define MESON_VCLK_HDMI_108000		8
- /* 2970 /1 /2 /2 /5 /1  => /1 /1 */
-#define MESON_VCLK_HDMI_148500		5
-+#define MESON_VCLK_HDMI_148500		9
-+/* 3240 /2 /1 /1 /5 /2  => /1 /1 */
-+#define MESON_VCLK_HDMI_162000		10
- /* 2970 /1 /1 /1 /5 /2  => /1 /1 */
-#define MESON_VCLK_HDMI_297000		6
-+#define MESON_VCLK_HDMI_297000		11
- /* 5940 /1 /1 /2 /5 /1  => /1 /1 */
-#define MESON_VCLK_HDMI_594000		7
-+#define MESON_VCLK_HDMI_594000		12
- 
- struct meson_vclk_params {
- 	unsigned int pll_base_freq;
-@@ -401,6 +411,46 @@ struct meson_vclk_params {
- 		.vid_pll_div = VID_PLL_DIV_5,
- 		.vclk_div = 1,
- 	},
-+	[MESON_VCLK_HDMI_25175] = {
-+		.pll_base_freq = 4028000,
-+		.pll_od1 = 4,
-+		.pll_od2 = 4,
-+		.pll_od3 = 1,
-+		.vid_pll_div = VID_PLL_DIV_5,
-+		.vclk_div = 2,
-+	},
-+	[MESON_VCLK_HDMI_40000] = {
-+		.pll_base_freq = 3200000,
-+		.pll_od1 = 4,
-+		.pll_od2 = 2,
-+		.pll_od3 = 1,
-+		.vid_pll_div = VID_PLL_DIV_5,
-+		.vclk_div = 2,
-+	},
-+	[MESON_VCLK_HDMI_65000] = {
-+		.pll_base_freq = 5200000,
-+		.pll_od1 = 4,
-+		.pll_od2 = 2,
-+		.pll_od3 = 1,
-+		.vid_pll_div = VID_PLL_DIV_5,
-+		.vclk_div = 2,
-+	},
-+	[MESON_VCLK_HDMI_108000] = {
-+		.pll_base_freq = 4320000,
-+		.pll_od1 = 4,
-+		.pll_od2 = 1,
-+		.pll_od3 = 1,
-+		.vid_pll_div = VID_PLL_DIV_5,
-+		.vclk_div = 2,
-+	},
-+	[MESON_VCLK_HDMI_162000] = {
-+		.pll_base_freq = 3240000,
-+		.pll_od1 = 2,
-+		.pll_od2 = 1,
-+		.pll_od3 = 1,
-+		.vid_pll_div = VID_PLL_DIV_5,
-+		.vclk_div = 2,
-+	},
- };
- 
- static inline unsigned int pll_od_to_reg(unsigned int od)
-@@ -451,6 +501,90 @@ void meson_hdmi_pll_set(struct meson_drm *priv,
- 						0xFFFF,  0x4e00);
- 			break;
- 
-+		case 3200000:
-+			regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL, 0x58000242);
-+			regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL2, 0x00000000);
-+			regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL3, 0x0d5c5091);
-+			regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL4, 0x801da72c);
-+			regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL5, 0x71486980);
-+			regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL6, 0x00000e55);
-+
-+			/* unreset */
-+			regmap_update_bits(priv->hhi, HHI_HDMI_PLL_CNTL,
-+						BIT(28), 0);
-+
-+			/* Poll for lock bit */
-+			regmap_read_poll_timeout(priv->hhi, HHI_HDMI_PLL_CNTL,
-+					val, (val & HDMI_PLL_LOCK), 10, 0);
-+
-+			/* div_frac */
-+			regmap_update_bits(priv->hhi, HHI_HDMI_PLL_CNTL2,
-+						0xFFFF,  0x4aab);
-+			break;
-+
-+		case 3240000:
-+			regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL, 0x58000243);
-+			regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL2, 0x00000000);
-+			regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL3, 0x0d5c5091);
-+			regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL4, 0x801da72c);
-+			regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL5, 0x71486980);
-+			regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL6, 0x00000e55);
-+
-+			/* unreset */
-+			regmap_update_bits(priv->hhi, HHI_HDMI_PLL_CNTL,
-+						BIT(28), 0);
-+
-+			/* Poll for lock bit */
-+			regmap_read_poll_timeout(priv->hhi, HHI_HDMI_PLL_CNTL,
-+					val, (val & HDMI_PLL_LOCK), 10, 0);
-+
-+			/* div_frac */
-+			regmap_update_bits(priv->hhi, HHI_HDMI_PLL_CNTL2,
-+						0xFFFF,  0x4800);
-+			break;
-+
-+		case 3865000:
-+			regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL, 0x58000250);
-+			regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL2, 0x00000000);
-+			regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL3, 0x0d5c5091);
-+			regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL4, 0x801da72c);
-+			regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL5, 0x71486980);
-+			regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL6, 0x00000e55);
-+
-+			/* unreset */
-+			regmap_update_bits(priv->hhi, HHI_HDMI_PLL_CNTL,
-+						BIT(28), 0);
-+
-+			/* Poll for lock bit */
-+			regmap_read_poll_timeout(priv->hhi, HHI_HDMI_PLL_CNTL,
-+					val, (val & HDMI_PLL_LOCK), 10, 0);
-+
-+			/* div_frac */
-+			regmap_update_bits(priv->hhi, HHI_HDMI_PLL_CNTL2,
-+						0xFFFF,  0x4855);
-+			break;
-+
-+		case 4028000:
-+			regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL, 0x58000253);
-+			regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL2, 0x00000000);
-+			regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL3, 0x0d5c5091);
-+			regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL4, 0x801da72c);
-+			regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL5, 0x71486980);
-+			regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL6, 0x00000e55);
-+
-+			/* unreset */
-+			regmap_update_bits(priv->hhi, HHI_HDMI_PLL_CNTL,
-+						BIT(28), 0);
-+
-+			/* Poll for lock bit */
-+			regmap_read_poll_timeout(priv->hhi, HHI_HDMI_PLL_CNTL,
-+					val, (val & HDMI_PLL_LOCK), 10, 0);
-+
-+			/* div_frac */
-+			regmap_update_bits(priv->hhi, HHI_HDMI_PLL_CNTL2,
-+						0xFFFF,  0x4eab);
-+			break;
-+
- 		case 4320000:
- 			regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL, 0x5800025a);
- 			regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL2, 0x00000000);
-@@ -485,6 +619,23 @@ void meson_hdmi_pll_set(struct meson_drm *priv,
- 			regmap_read_poll_timeout(priv->hhi, HHI_HDMI_PLL_CNTL,
- 					val, (val & HDMI_PLL_LOCK), 10, 0);
- 			break;
-+
-+		case 5200000:
-+			regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL, 0x5800026c);
-+			regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL2, 0x00000000);
-+			regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL3, 0x135c5091);
-+			regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL4, 0x801da72c);
-+			regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL5, 0x71486980);
-+			regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL6, 0x00000e55);
-+
-+			/* unreset */
-+			regmap_update_bits(priv->hhi, HHI_HDMI_PLL_CNTL,
-+						BIT(28), 0);
-+
-+			/* Poll for lock bit */
-+			regmap_read_poll_timeout(priv->hhi, HHI_HDMI_PLL_CNTL,
-+					val, (val & HDMI_PLL_LOCK), 10, 0);
-+			break;
- 		};
- 	} else if (meson_vpu_is_compatible(priv, "amlogic,meson-gxm-vpu") ||
- 		   meson_vpu_is_compatible(priv, "amlogic,meson-gxl-vpu")) {
-@@ -498,6 +649,42 @@ void meson_hdmi_pll_set(struct meson_drm *priv,
- 			regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL6, 0x01a31500);
- 			break;
- 
-+		case 3200000:
-+			regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL, 0x40000285);
-+			regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL2, 0x800cb155);
-+			regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL3, 0x860f30c4);
-+			regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL4, 0x0c8e0000);
-+			regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL5, 0x001fa729);
-+			regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL6, 0x01a31500);
-+			break;
-+
-+		case 3240000:
-+			regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL, 0x40000287);
-+			regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL2, 0x800cb000);
-+			regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL3, 0x860f30c4);
-+			regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL4, 0x0c8e0000);
-+			regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL5, 0x001fa729);
-+			regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL6, 0x01a31500);
-+			break;
-+
-+		case 3865000:
-+			regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL, 0x400002a1);
-+			regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL2, 0x800cb02b);
-+			regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL3, 0x860f30c4);
-+			regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL4, 0x0c8e0000);
-+			regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL5, 0x001fa729);
-+			regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL6, 0x01a31500);
-+			break;
-+
-+		case 4028000:
-+			regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL, 0x400002a7);
-+			regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL2, 0x800cb355);
-+			regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL3, 0x860f30c4);
-+			regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL4, 0x0c8e0000);
-+			regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL5, 0x001fa729);
-+			regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL6, 0x01a31500);
-+			break;
-+
- 		case 4320000:
- 			regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL, 0x400002b4);
- 			regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL2, 0x800cb000);
-@@ -516,6 +703,15 @@ void meson_hdmi_pll_set(struct meson_drm *priv,
- 			regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL6, 0x01a31500);
- 			break;
- 
-+		case 5200000:
-+			regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL, 0x400002d8);
-+			regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL2, 0x800cb2ab);
-+			regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL3, 0x860f30c4);
-+			regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL4, 0x0c8e0000);
-+			regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL5, 0x001fa729);
-+			regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL6, 0x01a31500);
-+			break;
-+
- 		};
- 
- 		/* Reset PLL */
-@@ -590,15 +786,30 @@ void meson_vclk_setup(struct meson_drm *priv, unsigned int target,
- 		else
- 			freq = MESON_VCLK_HDMI_DDR_54000;
- 		break;
-+	case 25175:
-+		freq = MESON_VCLK_HDMI_25175;
-+		break;
-+	case 40000:
-+		freq = MESON_VCLK_HDMI_40000;
-+		break;
-+	case 65000:
-+		freq = MESON_VCLK_HDMI_65000;
-+		break;
- 	case 74250:
- 		freq = MESON_VCLK_HDMI_74250;
- 		break;
-+	case 108000:
-+		freq = MESON_VCLK_HDMI_108000;
-+		break;
- 	case 148500:
- 		if (dac_freq != 148500)
- 			freq = MESON_VCLK_HDMI_DDR_148500;
- 		else
- 			freq = MESON_VCLK_HDMI_148500;
- 		break;
-+	case 162000:
-+		freq = MESON_VCLK_HDMI_162000;
-+		break;
- 	case 297000:
- 		freq = MESON_VCLK_HDMI_297000;
- 		break;
-diff --git a/drivers/gpu/drm/meson/meson_venc.c b/drivers/gpu/drm/meson/meson_venc.c
-index 9509017..6e27013 100644
--- a/drivers/gpu/drm/meson/meson_venc.c
-+++ b/drivers/gpu/drm/meson/meson_venc.c
-@@ -697,6 +697,314 @@ union meson_hdmi_venc_mode meson_hdmi_encp_mode_1080p60 = {
- 	},
- };
- 
-+union meson_hdmi_venc_mode meson_hdmi_encp_mode_640x480_60 = {
-+	.encp = {
-+		.dvi_settings = 0x21,
-+		.video_mode = 0x4040,
-+		.video_mode_adv = 0x18,
-+		/* video_prog_mode */
-+		/* video_sync_mode */
-+		/* video_yc_dly */
-+		/* video_rgb_ctrl */
-+		/* video_filt_ctrl */
-+		/* video_ofld_voav_ofst */
-+		/* yfp1_htime */
-+		/* yfp2_htime */
-+		.max_pxcnt = 0x31f,
-+		/* hspuls_begin */
-+		/* hspuls_end */
-+		/* hspuls_switch */
-+		/* vspuls_begin */
-+		/* vspuls_end */
-+		/* vspuls_bline */
-+		/* vspuls_eline */
-+		.havon_begin = 0x90,
-+		.havon_end = 0x30f,
-+		.vavon_bline = 0x23,
-+		.vavon_eline = 0x202,
-+		/* eqpuls_begin */
-+		/* eqpuls_end */
-+		/* eqpuls_bline */
-+		/* eqpuls_eline */
-+		.hso_begin = 0,
-+		.hso_end = 0x60,
-+		.vso_begin = 0x1e,
-+		.vso_end = 0x32,
-+		.vso_bline = 0,
-+		.vso_eline = 2,
-+		.vso_eline_present = true,
-+		/* sy_val */
-+		/* sy2_val */
-+		.max_lncnt = 0x20c,
-+	},
-+};
-+
-+union meson_hdmi_venc_mode meson_hdmi_encp_mode_800x600_60 = {
-+	.encp = {
-+		.dvi_settings = 0x21,
-+		.video_mode = 0x4040,
-+		.video_mode_adv = 0x18,
-+		/* video_prog_mode */
-+		/* video_sync_mode */
-+		/* video_yc_dly */
-+		/* video_rgb_ctrl */
-+		/* video_filt_ctrl */
-+		/* video_ofld_voav_ofst */
-+		/* yfp1_htime */
-+		/* yfp2_htime */
-+		.max_pxcnt = 0x41f,
-+		/* hspuls_begin */
-+		/* hspuls_end */
-+		/* hspuls_switch */
-+		/* vspuls_begin */
-+		/* vspuls_end */
-+		/* vspuls_bline */
-+		/* vspuls_eline */
-+		.havon_begin = 0xD8,
-+		.havon_end = 0x3f7,
-+		.vavon_bline = 0x1b,
-+		.vavon_eline = 0x272,
-+		/* eqpuls_begin */
-+		/* eqpuls_end */
-+		/* eqpuls_bline */
-+		/* eqpuls_eline */
-+		.hso_begin = 0,
-+		.hso_end = 0x80,
-+		.vso_begin = 0x1e,
-+		.vso_end = 0x32,
-+		.vso_bline = 0,
-+		.vso_eline = 4,
-+		.vso_eline_present = true,
-+		/* sy_val */
-+		/* sy2_val */
-+		.max_lncnt = 0x273,
-+	},
-+};
-+
-+union meson_hdmi_venc_mode meson_hdmi_encp_mode_1024x768_60 = {
-+	.encp = {
-+		.dvi_settings = 0x21,
-+		.video_mode = 0x4040,
-+		.video_mode_adv = 0x18,
-+		/* video_prog_mode */
-+		/* video_sync_mode */
-+		/* video_yc_dly */
-+		/* video_rgb_ctrl */
-+		/* video_filt_ctrl */
-+		/* video_ofld_voav_ofst */
-+		/* yfp1_htime */
-+		/* yfp2_htime */
-+		.max_pxcnt = 1343,
-+		/* hspuls_begin */
-+		/* hspuls_end */
-+		/* hspuls_switch */
-+		/* vspuls_begin */
-+		/* vspuls_end */
-+		/* vspuls_bline */
-+		/* vspuls_eline */
-+		.havon_begin = 296,
-+		.havon_end = 1319,
-+		.vavon_bline = 35,
-+		.vavon_eline = 802,
-+		/* eqpuls_begin */
-+		/* eqpuls_end */
-+		/* eqpuls_bline */
-+		/* eqpuls_eline */
-+		.hso_begin = 0,
-+		.hso_end = 136,
-+		.vso_begin = 30,
-+		.vso_end = 50,
-+		.vso_bline = 0,
-+		.vso_eline = 6,
-+		.vso_eline_present = true,
-+		/* sy_val */
-+		/* sy2_val */
-+		.max_lncnt = 805,
-+	},
-+};
-+
-+union meson_hdmi_venc_mode meson_hdmi_encp_mode_1152x864_75 = {
-+	.encp = {
-+		.dvi_settings = 0x21,
-+		.video_mode = 0x4040,
-+		.video_mode_adv = 0x18,
-+		/* video_prog_mode */
-+		/* video_sync_mode */
-+		/* video_yc_dly */
-+		/* video_rgb_ctrl */
-+		/* video_filt_ctrl */
-+		/* video_ofld_voav_ofst */
-+		/* yfp1_htime */
-+		/* yfp2_htime */
-+		.max_pxcnt = 0x63f,
-+		/* hspuls_begin */
-+		/* hspuls_end */
-+		/* hspuls_switch */
-+		/* vspuls_begin */
-+		/* vspuls_end */
-+		/* vspuls_bline */
-+		/* vspuls_eline */
-+		.havon_begin = 0x180,
-+		.havon_end = 0x5ff,
-+		.vavon_bline = 0x23,
-+		.vavon_eline = 0x382,
-+		/* eqpuls_begin */
-+		/* eqpuls_end */
-+		/* eqpuls_bline */
-+		/* eqpuls_eline */
-+		.hso_begin = 0,
-+		.hso_end = 0x80,
-+		.vso_begin = 0x1e,
-+		.vso_end = 0x32,
-+		.vso_bline = 0,
-+		.vso_eline = 3,
-+		.vso_eline_present = true,
-+		/* sy_val */
-+		/* sy2_val */
-+		.max_lncnt = 0x383,
-+	},
-+};
-+
-+union meson_hdmi_venc_mode meson_hdmi_encp_mode_1280x1024_60 = {
-+	.encp = {
-+		.dvi_settings = 0x21,
-+		.video_mode = 0x4040,
-+		.video_mode_adv = 0x18,
-+		/* video_prog_mode */
-+		/* video_sync_mode */
-+		/* video_yc_dly */
-+		/* video_rgb_ctrl */
-+		/* video_filt_ctrl */
-+		/* video_ofld_voav_ofst */
-+		/* yfp1_htime */
-+		/* yfp2_htime */
-+		.max_pxcnt = 0x697,
-+		/* hspuls_begin */
-+		/* hspuls_end */
-+		/* hspuls_switch */
-+		/* vspuls_begin */
-+		/* vspuls_end */
-+		/* vspuls_bline */
-+		/* vspuls_eline */
-+		.havon_begin = 0x168,
-+		.havon_end = 0x667,
-+		.vavon_bline = 0x29,
-+		.vavon_eline = 0x428,
-+		/* eqpuls_begin */
-+		/* eqpuls_end */
-+		/* eqpuls_bline */
-+		/* eqpuls_eline */
-+		.hso_begin = 0,
-+		.hso_end = 0x70,
-+		.vso_begin = 0x1e,
-+		.vso_end = 0x32,
-+		.vso_bline = 0,
-+		.vso_eline = 3,
-+		.vso_eline_present = true,
-+		/* sy_val */
-+		/* sy2_val */
-+		.max_lncnt = 0x429,
-+	},
-+};
-+
-+union meson_hdmi_venc_mode meson_hdmi_encp_mode_1600x1200_60 = {
-+	.encp = {
-+		.dvi_settings = 0x21,
-+		.video_mode = 0x4040,
-+		.video_mode_adv = 0x18,
-+		/* video_prog_mode */
-+		/* video_sync_mode */
-+		/* video_yc_dly */
-+		/* video_rgb_ctrl */
-+		/* video_filt_ctrl */
-+		/* video_ofld_voav_ofst */
-+		/* yfp1_htime */
-+		/* yfp2_htime */
-+		.max_pxcnt = 0x86f,
-+		/* hspuls_begin */
-+		/* hspuls_end */
-+		/* hspuls_switch */
-+		/* vspuls_begin */
-+		/* vspuls_end */
-+		/* vspuls_bline */
-+		/* vspuls_eline */
-+		.havon_begin = 0x1f0,
-+		.havon_end = 0x82f,
-+		.vavon_bline = 0x31,
-+		.vavon_eline = 0x4e0,
-+		/* eqpuls_begin */
-+		/* eqpuls_end */
-+		/* eqpuls_bline */
-+		/* eqpuls_eline */
-+		.hso_begin = 0,
-+		.hso_end = 0xc0,
-+		.vso_begin = 0x1e,
-+		.vso_end = 0x32,
-+		.vso_bline = 0,
-+		.vso_eline = 3,
-+		.vso_eline_present = true,
-+		/* sy_val */
-+		/* sy2_val */
-+		.max_lncnt = 0x4e1,
-+	},
-+};
-+
-+struct meson_hdmi_venc_dmt_mode {
-+	struct drm_display_mode drm_mode;
-+	union meson_hdmi_venc_mode *mode;
-+} meson_hdmi_venc_dmt_modes[] = {
-+	/* 640x480@60Hz */
-+	{
-+		{ DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
-+		  752, 800, 0, 480, 490, 492, 525, 0,
-+		  DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
-+		&meson_hdmi_encp_mode_640x480_60,
-+	},
-+	/* 800x600@60Hz */
-+	{
-+		{ DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
-+		  968, 1056, 0, 600, 601, 605, 628, 0,
-+		  DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
-+		&meson_hdmi_encp_mode_800x600_60,
-+	},
-+	/* 1024x768@60Hz */
-+	{
-+		{ DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024,
-+		  1048, 1184, 1344, 0, 768, 771, 777, 806, 0,
-+		  DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
-+		&meson_hdmi_encp_mode_1024x768_60,
-+	},
-+	/* 1152x864@75Hz */
-+	{
-+		{ DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152,
-+		  1216, 1344, 1600, 0, 864, 865, 868, 900, 0,
-+		  DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
-+		&meson_hdmi_encp_mode_1152x864_75,
-+	},
-+	/* 1280x1024@60Hz */
-+	{
-+		{ DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 108000, 1280,
-+		  1328, 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
-+		  DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
-+		&meson_hdmi_encp_mode_1280x1024_60,
-+	},
-+	/* 1600x1200@60Hz */
-+	{
-+		{ DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 162000, 1600,
-+		  1664, 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
-+		  DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
-+		&meson_hdmi_encp_mode_1600x1200_60,
-+	},
-+	/* 1920x1080@60Hz */
-+	{
-+		{ DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920,
-+		  2008, 2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
-+		  DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
-+		&meson_hdmi_encp_mode_1080p60
-+	},
-+	{ }, /* sentinel */
-+};
-+
- struct meson_hdmi_venc_vic_mode {
- 	unsigned int vic;
- 	union meson_hdmi_venc_mode *mode;
-@@ -736,6 +1044,20 @@ static unsigned long modulo(unsigned long a, unsigned long b)
- 		return a;
- }
- 
-+bool meson_venc_hdmi_supported_mode(const struct drm_display_mode *mode)
-+{
-+	struct meson_hdmi_venc_dmt_mode *vmode = meson_hdmi_venc_dmt_modes;
-+
-+	while (vmode->mode) {
-+		if (drm_mode_equal(&vmode->drm_mode, mode))
-+			return true;
-+		vmode++;
-+	}
-+
-+	return false;
-+}
-+EXPORT_SYMBOL_GPL(meson_venc_hdmi_supported_mode);
-+
- bool meson_venc_hdmi_supported_vic(int vic)
- {
- 	struct meson_hdmi_venc_vic_mode *vmode = meson_hdmi_venc_vic_modes;
-@@ -750,6 +1072,20 @@ bool meson_venc_hdmi_supported_vic(int vic)
- }
- EXPORT_SYMBOL_GPL(meson_venc_hdmi_supported_vic);
- 
-+static union meson_hdmi_venc_mode
-+*meson_venc_hdmi_get_dmt_vmode(const struct drm_display_mode *mode)
-+{
-+	struct meson_hdmi_venc_dmt_mode *vmode = meson_hdmi_venc_dmt_modes;
-+
-+	while (vmode->mode) {
-+		if (drm_mode_equal(&vmode->drm_mode, mode))
-+			return vmode->mode;
-+		vmode++;
-+	}
-+
-+	return NULL;
-+}
-+
- static union meson_hdmi_venc_mode *meson_venc_hdmi_get_vic_vmode(int vic)
- {
- 	struct meson_hdmi_venc_vic_mode *vmode = meson_hdmi_venc_vic_modes;
-@@ -811,10 +1147,13 @@ void meson_venc_hdmi_mode_set(struct meson_drm *priv, int vic,
- 	unsigned int sof_lines;
- 	unsigned int vsync_lines;
- 
-	vmode = meson_venc_hdmi_get_vic_vmode(vic);
-+	if (meson_venc_hdmi_supported_vic(vic))
-+		vmode = meson_venc_hdmi_get_vic_vmode(vic);
-+	else
-+		vmode = meson_venc_hdmi_get_dmt_vmode(mode);
- 	if (!vmode) {
-		dev_err(priv->dev, "%s: Fatal Error, unsupported vic %d\n",
-			__func__, vic);
-+		dev_err(priv->dev, "%s: Fatal Error, unsupported mode "
-+			DRM_MODE_FMT "\n", __func__, DRM_MODE_ARG(mode));
- 		return;
- 	}
- 
-@@ -864,7 +1203,7 @@ void meson_venc_hdmi_mode_set(struct meson_drm *priv, int vic,
- 		hsync_pixels_venc *= 2;
- 
- 	/* Disable VDACs */
-	writel_bits_relaxed(0x1f, 0x1f,
-+	writel_bits_relaxed(0xff, 0xff,
- 			priv->io_base + _REG(VENC_VDAC_SETTING));
- 
- 	writel_relaxed(0, priv->io_base + _REG(ENCI_VIDEO_EN));
-diff --git a/drivers/gpu/drm/meson/meson_venc.h b/drivers/gpu/drm/meson/meson_venc.h
-index a1b96e8..7c18a36 100644
--- a/drivers/gpu/drm/meson/meson_venc.h
-+++ b/drivers/gpu/drm/meson/meson_venc.h
-@@ -58,6 +58,7 @@ struct meson_cvbs_enci_mode {
- };
- 
- /* HDMI Clock parameters */
-+bool meson_venc_hdmi_supported_mode(const struct drm_display_mode *mode);
- bool meson_venc_hdmi_supported_vic(int vic);
- bool meson_venc_hdmi_venc_repeat(int vic);
- 
-- 
-2.7.4
-
--- a/buildroot-external/board/hardkernel/odroid-c2/uboot-boot.ush
+++ b/buildroot-external/board/hardkernel/odroid-c2/uboot-boot.ush
--- a/buildroot-external/board/hardkernel/odroid-xu4/boot-env.txt
+++ b/buildroot-external/board/hardkernel/odroid-xu4/boot-env.txt
@@ -0,0 +1,41 @@
+
+macaddr=00:1e:06:61:7a:39
+vout=hdmi
+vout=hdmi
+# - DVI Mode (disables sound over HDMI as per DVI compat)
+# vout=dvi
+
+# --- HDMI CEC Configuration ---
+# ------------------------------------------
+cecenable=false
+# set to true to enable HDMI CEC
+
+# Enable/Disable ODROID-VU7 Touchsreen
+disable_vu7=false
+
+# DRAM Frequency
+# Sets the LPDDR3 memory frequency
+# Supported values: 933 825 728 633 (MHZ)
+ddr_freq 825
+
+# External watchdog board enable
+external_watchdog=false
+# debounce time set to 3 ~ 10 sec, default 3 sec
+external_watchdog_debounce=3
+
+
+#------------------------------------------------------------------------------
+#
+# HDMI Hot Plug detection
+#
+#------------------------------------------------------------------------------
+#
+# Forces the HDMI subsystem to ignore the check if the cable is connected or
+# not.
+# false : disable the detection and force it as connected.
+# true : let cable, board and monitor decide the connection status.
+#
+# default: true
+#
+#------------------------------------------------------------------------------
+HPD=true
--- a/buildroot-external/board/hardkernel/odroid-xu4/hassos-hook.sh
+++ b/buildroot-external/board/hardkernel/odroid-xu4/hassos-hook.sh
@@ -0,0 +1,31 @@
+#!/bin/bash
+# shellcheck disable=SC2155
+
+function hassos_pre_image() {
+    local BOOT_DATA="$(path_boot_dir)"
+    local BL1="${BINARIES_DIR}/bl1.bin.hardkernel"
+    local BL2="${BINARIES_DIR}/bl2.bin.hardkernel.720k_uboot"
+    local BLTZ="${BINARIES_DIR}/tzsw.bin.hardkernel"
+    local UBOOT="${BINARIES_DIR}/u-boot.bin"
+    local spl_img="$(path_spl_img)"
+
+    cp "${BINARIES_DIR}/boot.scr" "${BOOT_DATA}/boot.scr"
+    cp "${BOARD_DIR}/boot-env.txt" "${BOOT_DATA}/config.txt"
+    cp "${BINARIES_DIR}/exynos5422-odroidxu4.dtb" "${BOOT_DATA}/exynos5422-odroidxu4.dtb"
+
+    echo "console=tty1 console=ttySAC2,115200" > "${BOOT_DATA}/cmdline.txt"
+
+    # SPL
+    create_spl_image
+
+    dd if="${BL1}" of="${spl_img}" conv=notrunc bs=512 seek=1
+    dd if="${BL2}" of="${spl_img}" conv=notrunc bs=512 seek=31
+    dd if="${UBOOT}" of="${spl_img}" conv=notrunc bs=512 seek=63
+    dd if="${BLTZ}" of="${spl_img}" conv=notrunc bs=512 seek=1503
+    dd if=/dev/zero of="${spl_img}" conv=notrunc bs=512 count=32 seek=2015
+}
+
+
+function hassos_post_image() {
+    convert_disk_image_gz
+}
--- a/buildroot-external/board/hardkernel/odroid-xu4/kernel.config
+++ b/buildroot-external/board/hardkernel/odroid-xu4/kernel.config
--- a/buildroot-external/board/hardkernel/odroid-xu4/meta
+++ b/buildroot-external/board/hardkernel/odroid-xu4/meta
@@ -0,0 +1,7 @@
+BOARD_ID=odroid-xu4
+BOARD_NAME="Hardkernel Odroid-XU4"
+CHASSIS=embedded
+BOOTLOADER=uboot
+KERNEL_FILE=zImage
+BOOT_SYS=mbr
+BOOT_ENV_SIZE=0x2000
--- a/buildroot-external/board/hardkernel/odroid-xu4/uboot-boot.ush
+++ b/buildroot-external/board/hardkernel/odroid-xu4/uboot-boot.ush
@@ -0,0 +1,98 @@
+
+###########################################
+
+part start mmc ${devnum} 9 mmc_env
+mmc dev ${devnum}
+setenv loadbootstate " \
+    echo 'loading env...'; \
+    mmc read ${ramdisk_addr_r} ${mmc_env} 0x10; \
+    env import -c ${ramdisk_addr_r} 0x2000;"
+
+setenv storebootstate " \
+    echo 'storing env...'; \
+    env export -c -s 0x2000 ${ramdisk_addr_r} BOOT_ORDER BOOT_A_LEFT BOOT_B_LEFT; \
+    mmc write ${ramdisk_addr_r} ${mmc_env} 0x10;"
+
+run loadbootstate
+test -n "${BOOT_ORDER}" || setenv BOOT_ORDER "A B"
+test -n "${BOOT_A_LEFT}" || setenv BOOT_A_LEFT 3
+test -n "${BOOT_B_LEFT}" || setenv BOOT_B_LEFT 3
+
+if load mmc ${devnum}:1 ${ramdisk_addr_r} config.txt; then
+  env import -t ${ramdisk_addr_r} ${filesize};
+fi
+
+# Board bootargs
+setenv hdmi_phy_control "HPD=${HPD} vout=${vout}"
+if test "${cecenable}" = "false"; then fdt rm /cec@101B0000; fi
+if test "${disable_vu7}" = "false"; then setenv hid_quirks "usbhid.quirks=0x0eef:0x0005:0x0004"; fi
+if test "${external_watchdog}" = "true"; then setenv external_watchdog "external_watchdog=${external_watchdog} external_watchdog_debounce=${external_watchdog_debounce}"; fi
+
+setenv bootargs_odroidxu4 "${videoconfig} ${hdmi_phy_control} ${hid_quirks} smsc95xx.macaddr=${macaddr} ${external_watchdog}"
+
+# HassOS bootargs
+setenv bootargs_hassos "zram.enabled=1 zram.num_devices=3 apparmor=1 security=apparmor cgroup_enable=memory"
+
+# HassOS system A/B
+setenv bootargs_a "root=PARTUUID=48617373-06 rootfstype=squashfs ro rootwait"
+setenv bootargs_b "root=PARTUUID=48617373-08 rootfstype=squashfs ro rootwait"
+
+#usb start
+
+# Load extraargs
+fileenv mmc ${devnum}:1 ${ramdisk_addr_r} cmdline.txt cmdline
+fatload mmc ${devnum}:1 ${fdt_addr_r} exynos5422-odroidxu4.dtb
+fdt addr ${fdt_addr_r}
+
+
+# logical volumes get numbered after physical ones.
+# 1. boot
+# 2. Extended partition
+# 3. Overlay
+# 4. Data
+# 5. KernelA
+# 6. SystemA
+# 7. KernelB
+# 8. SystemB
+# 9. BootInfo
+setenv bootargs
+for BOOT_SLOT in "${BOOT_ORDER}"; do
+  if test "x${bootargs}" != "x"; then
+    # skip remaining slots
+  elif test "x${BOOT_SLOT}" = "xA"; then
+    if test ${BOOT_A_LEFT} -gt 0; then
+      setexpr BOOT_A_LEFT ${BOOT_A_LEFT} - 1
+      echo "Found valid slot A, ${BOOT_A_LEFT} attempts remaining"
+      setenv load_kernel "ext4load mmc ${devnum}:5 ${kernel_addr_r} zImage"
+      setenv bootargs "${bootargs_hassos} ${bootargs_odroidxu4} ${bootargs_a} rauc.slot=A ${cmdline}"
+    fi
+  elif test "x${BOOT_SLOT}" = "xB"; then
+    if test ${BOOT_B_LEFT} -gt 0; then
+      setexpr BOOT_B_LEFT ${BOOT_B_LEFT} - 1
+      echo "Found valid slot B, ${BOOT_B_LEFT} attempts remaining"
+      setenv load_kernel "ext4load mmc ${devnum}:7 ${kernel_addr_r} zImage"
+      setenv bootargs "${bootargs_hassos} ${bootargs_odroidxu4} ${bootargs_b} rauc.slot=B ${cmdline}"
+    fi
+  fi
+done
+
+if test -n "${bootargs}"; then
+  run storebootstate
+else
+  echo "No valid slot found, resetting tries to 3"
+  setenv BOOT_A_LEFT 3
+  setenv BOOT_B_LEFT 3
+  run storebootstate
+  reset
+fi
+
+echo "Loading kernel"
+run load_kernel
+echo " Starting kernel"
+printenv load_kernel
+printenv bootargs
+dmc ${ddr_freq}
+bootz ${kernel_addr_r} - ${fdt_addr_r}
+
+echo "Fails on boot"
+reset
--- a/buildroot-external/board/hardkernel/odroid-xu4/uboot.config
+++ b/buildroot-external/board/hardkernel/odroid-xu4/uboot.config
@@ -0,0 +1,6 @@
+# CONFIG_USB_STORAGE is not set
+CONFIG_DOS_PARTITION=y
+# CONFIG_EFI_PARTITION is not set
+CONFIG_CMD_FILEENV=y
+CONFIG_ENV_IS_NOWHERE=Y
+CONFIG_DISPLAY_BOARDINFO=y
--- a/buildroot-external/board/intel/barebox.config
+++ b/buildroot-external/board/intel/barebox.config
--- a/buildroot-external/board/intel/nuc/hassos-hook.sh
+++ b/buildroot-external/board/intel/nuc/hassos-hook.sh
@@ -0,0 +1,20 @@
+#!/bin/bash
+# shellcheck disable=SC2155
+
+function hassos_pre_image() {
+    local BOOT_DATA="$(path_boot_dir)"
+
+    mkdir -p "${BOOT_DATA}/EFI/BOOT"
+    mkdir -p "${BOOT_DATA}/EFI/barebox"
+
+    cp "${BINARIES_DIR}/barebox.bin" "${BOOT_DATA}/EFI/BOOT/BOOTx64.EFI"
+    cp "${BR2_EXTERNAL_HASSOS_PATH}/misc/barebox-state-efi.dtb" "${BOOT_DATA}/EFI/barebox/state.dtb"
+
+    echo "console=tty1" > "${BOOT_DATA}/cmdline.txt"
+}
+
+
+function hassos_post_image() {
+    convert_disk_image_gz
+}
+
--- a/buildroot-external/board/intel/nuc/kernel.config
+++ b/buildroot-external/board/intel/nuc/kernel.config
@@ -0,0 +1,31 @@
+CONFIG_EFI_STUB=y
+
+CONFIG_SCSI_LOWLEVEL=y
+CONFIG_USB_XHCI_HCD=y
+
+CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
+
+CONFIG_IGB=y
+
+CONFIG_IWLWIFI=m
+CONFIG_IWLMVM=m
+
+CONFIG_DRM_I915=m
+CONFIG_DRM_I915_CAPTURE_ERROR=y
+CONFIG_DRM_I915_COMPRESS_ERROR=y
+CONFIG_DRM_I915_USERPTR=y
+
+CONFIG_SND_HDA=m
+CONFIG_SND_HDA_INTEL=m
+CONFIG_SND_HDA_I915=y
+CONFIG_SND_HDA_POWER_SAVE_DEFAULT=1
+
+CONFIG_BT=y
+CONFIG_BT_BREDR=y
+CONFIG_BT_LE=y
+CONFIG_BT_INTEL=m
+CONFIG_BT_BCM=m
+CONFIG_BT_RTL=m
+CONFIG_BT_HCIBTUSB=m
+CONFIG_BT_HCIBTUSB_BCM=y
+CONFIG_BT_HCIBTUSB_RTL=y
--- a/buildroot-external/board/intel/nuc/meta
+++ b/buildroot-external/board/intel/nuc/meta
@@ -0,0 +1,7 @@
+BOARD_ID=intel-nuc
+BOARD_NAME="Intel NUC"
+CHASSIS=embedded
+BOOTLOADER=barebox
+KERNEL_FILE=bzImage
+BOOT_SYS=efi
+DISK_SIZE=6
--- a/buildroot-external/board/intel/ova/hassos-hook.sh
+++ b/buildroot-external/board/intel/ova/hassos-hook.sh
@@ -0,0 +1,24 @@
+#!/bin/bash
+# shellcheck disable=SC2155
+
+function hassos_pre_image() {
+    local BOOT_DATA="$(path_boot_dir)"
+
+    mkdir -p "${BOOT_DATA}/EFI/BOOT"
+    mkdir -p "${BOOT_DATA}/EFI/barebox"
+
+    cp "${BINARIES_DIR}/barebox.bin" "${BOOT_DATA}/EFI/BOOT/BOOTx64.EFI"
+    cp "${BR2_EXTERNAL_HASSOS_PATH}/misc/barebox-state-efi.dtb" "${BOOT_DATA}/EFI/barebox/state.dtb"
+
+    echo "console=tty1" > "${BOOT_DATA}/cmdline.txt"
+}
+
+
+function hassos_post_image() {
+    convert_disk_image_virtual
+
+    convert_disk_image_gz vmdk
+    convert_disk_image_gz vhdx
+    convert_disk_image_gz vdi
+}
+
--- a/buildroot-external/board/intel/ova/kernel.config
+++ b/buildroot-external/board/intel/ova/kernel.config
@@ -0,0 +1,24 @@
+CONFIG_EFI_STUB=y
+
+CONFIG_VIRTIO=y
+CONFIG_VIRTIO_PCI=y
+CONFIG_VIRTIO_NET=y
+CONFIG_VIRTIO_BALLOON=m
+CONFIG_VIRTIO_INPUT=m
+CONFIG_VIRTIO_BLK=y
+CONFIG_HW_RANDOM_VIRTIO=y
+
+CONFIG_SCSI_LOWLEVEL=y
+CONFIG_USB_XHCI_HCD=y
+
+CONFIG_PARAVIRT=y
+CONFIG_XEN=y
+
+CONFIG_HYPERVISOR_GUEST=y
+CONFIG_HYPERV=y
+CONFIG_HYPERV_UTILS=m
+CONFIG_HYPERV_BALLOON=m
+CONFIG_HYPERV_KEYBOARD=m
+CONFIG_HYPERV_STORAGE=y
+CONFIG_HYPERV_NET=y
+CONFIG_FB_HYPERV=y
--- a/buildroot-external/board/intel/ova/meta
+++ b/buildroot-external/board/intel/ova/meta
--- a/buildroot-external/board/intel/patches/dt-utils/0001-get-devicetree-from-file.patch
+++ b/buildroot-external/board/intel/patches/dt-utils/0001-get-devicetree-from-file.patch
--- a/buildroot-external/board/intel/patches/dt-utils/0002-support-finding-devices-by-partuuid.patch
+++ b/buildroot-external/board/intel/patches/dt-utils/0002-support-finding-devices-by-partuuid.patch
--- a/buildroot-external/board/intel/patches/rauc/0001-add-i-argument-to.patch
+++ b/buildroot-external/board/intel/patches/rauc/0001-add-i-argument-to.patch
--- a/buildroot-external/board/orangepi/hassos-hook.sh
+++ b/buildroot-external/board/orangepi/hassos-hook.sh
@@ -0,0 +1,25 @@
+#!/bin/bash
+# shellcheck disable=SC2155
+
+function hassos_pre_image() {
+    local BOOT_DATA="$(path_boot_dir)"
+    local SPL="${BINARIES_DIR}/sunxi-spl.bin"
+    local UBOOT="${BINARIES_DIR}/u-boot.itb"
+    local spl_img="$(path_spl_img)"
+
+    cp "${BINARIES_DIR}/boot.scr" "${BOOT_DATA}/boot.scr"
+    cp "${BINARIES_DIR}/sun50i-h5-orangepi-prime.dtb" "${BOOT_DATA}/sun50i-h5-orangepi-prime.dtb"
+    cp "${BOARD_DIR}/config.txt" "${BOOT_DATA}/config.txt"
+    touch "${BOOT_DATA}/cmdline.txt"
+
+    # SPL
+    create_spl_image
+
+    dd if="${SPL}" of="${spl_img}" conv=notrunc bs=512 seek=16
+    dd if="${UBOOT}" of="${spl_img}" conv=notrunc bs=512 seek=80
+}
+
+
+function hassos_post_image() {
+    convert_disk_image_gz
+}
--- a/buildroot-external/board/orangepi/kernel.config
+++ b/buildroot-external/board/orangepi/kernel.config
@@ -0,0 +1,3 @@
+CONFIG_GPIOLIB=y
+CONFIG_GPIO_SYSFS=y
+
--- a/buildroot-external/board/orangepi/patches/README.md
+++ b/buildroot-external/board/orangepi/patches/README.md
@@ -0,0 +1,5 @@
+## Kernel
+https://github.com/armbian/build/tree/master/patch/kernel/sunxi-next
+
+## u-boot
+https://github.com/armbian/build/tree/master/patch/u-boot/u-boot-sunxi
--- a/buildroot-external/board/orangepi/patches/uboot/0020-sunxi-call-fdt_fixup_ethernet-again-to-set-macaddr-f.patch
+++ b/buildroot-external/board/orangepi/patches/uboot/0020-sunxi-call-fdt_fixup_ethernet-again-to-set-macaddr-f.patch
@@ -0,0 +1,41 @@
+From 55d3cc28b37000d1a3d7224c0ba4a808274e0b33 Mon Sep 17 00:00:00 2001
+From: Icenowy Zheng <icenowy@aosc.io>
+Date: Fri, 27 Oct 2017 17:25:00 +0800
+Subject: [PATCH 20/20] sunxi: call fdt_fixup_ethernet again to set macaddr for
+ more aliases
+
+Sometimes some ethernet aliases do not exist in U-Boot FDT but they
+exist in the FDT used to boot the system. In this situation
+setup_environment is called again in ft_board_setup to generate macaddr
+environment variable for them. However now the call to
+fdt_fixup_ethernet is moved before the call of ft_board_setup.
+
+Call fdt_fixup_ethernet again to add MAC addresses for the extra
+ethernet aliases.
+
+Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
+---
+ board/sunxi/board.c | 6 ++++--
+ 1 file changed, 4 insertions(+), 2 deletions(-)
+
+diff --git a/board/sunxi/board.c b/board/sunxi/board.c
+index 192cf8ca45..0fe70f47cb 100644
+--- a/board/sunxi/board.c
+++ b/board/sunxi/board.c
+@@ -751,10 +751,12 @@ int ft_board_setup(void *blob, bd_t *bd)
+	int __maybe_unused r;
+
+	/*
+-	 * Call setup_environment again in case the boot fdt has
+-	 * ethernet aliases the u-boot copy does not have.
+	 * Call setup_environment and fdt_fixup_ethernet again
+	 * in case the boot fdt has ethernet aliases the u-boot
+	 * copy does not have.
+	 */
+	setup_environment(blob);
+	fdt_fixup_ethernet(blob);
+
+ #ifdef CONFIG_VIDEO_DT_SIMPLEFB
+	r = sunxi_simplefb_setup(blob);
+--
+2.13.6
--- a/buildroot-external/board/orangepi/patches/uboot/4kfix-limit-screen-to-full-hd.patch
+++ b/buildroot-external/board/orangepi/patches/uboot/4kfix-limit-screen-to-full-hd.patch
@@ -0,0 +1,19 @@
+diff --git a/drivers/video/sunxi/sunxi_display.c b/drivers/video/sunxi/sunxi_display.c
+index 92c9d06054..cd16d69e30 100644
+--- a/drivers/video/sunxi/sunxi_display.c
+++ b/drivers/video/sunxi/sunxi_display.c
+@@ -1274,8 +1274,12 @@ void *video_hw_init(void)
+		ret = sunxi_hdmi_hpd_detect(hpd_delay);
+		if (ret) {
+			printf("HDMI connected: ");
+-			if (edid && sunxi_hdmi_edid_get_mode(&custom) == 0)
+-				mode = &custom;
+			if (edid && sunxi_hdmi_edid_get_mode(&custom) == 0) {
+				if ((custom.xres <= 1920) && (custom.yres <= 1080))
+					mode = &custom;
+				else
+					mode = &res_mode_init[RES_MODE_1920x1080];
+			}
+		} else if (hpd) {
+			sunxi_hdmi_shutdown();
+			sunxi_display.monitor = sunxi_get_default_mon(false);
--- a/buildroot-external/board/orangepi/patches/uboot/adjust-default-dram-clockspeeds.patch
+++ b/buildroot-external/board/orangepi/patches/uboot/adjust-default-dram-clockspeeds.patch
@@ -0,0 +1,13 @@
+diff --git a/configs/orangepi_prime_defconfig b/configs/orangepi_prime_defconfig
+index 103936d772..990cf2a8c0 100644
+--- a/configs/orangepi_prime_defconfig
+++ b/configs/orangepi_prime_defconfig
+@@ -1,7 +1,7 @@
+ CONFIG_ARM=y
+ CONFIG_ARCH_SUNXI=y
+ CONFIG_MACH_SUN50I_H5=y
+-CONFIG_DRAM_CLK=672
+CONFIG_DRAM_CLK=624
+ CONFIG_DRAM_ZQ=3881977
+ CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-orangepi-prime"
+ # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
--- a/buildroot-external/board/orangepi/patches/uboot/do-not-relocate-initrd.patch
+++ b/buildroot-external/board/orangepi/patches/uboot/do-not-relocate-initrd.patch
@@ -0,0 +1,27 @@
+diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h
+index 64a190059a..bbec551cac 100644
+--- a/include/configs/sunxi-common.h
+++ b/include/configs/sunxi-common.h
+@@ -503,6 +503,12 @@ extern int soft_i2c_gpio_scl;
+ #define FDTFILE CONFIG_DEFAULT_DEVICE_TREE ".dtb"
+ #endif
+
+#ifdef CONFIG_MACH_SUN8I_H3
+#define INITRD_HIGH_ENV "initrd_high=0xFFFFFFFF\0"
+#else
+#define INITRD_HIGH_ENV
+#endif
+
+ #define CONFIG_EXTRA_ENV_SETTINGS \
+	CONSOLE_ENV_SETTINGS \
+	MEM_LAYOUT_ENV_SETTINGS \
+@@ -512,7 +518,8 @@ extern int soft_i2c_gpio_scl;
+	SUNXI_MTDIDS_DEFAULT \
+	SUNXI_MTDPARTS_DEFAULT \
+	BOOTCMD_SUNXI_COMPAT \
+-	BOOTENV
+	BOOTENV \
+	INITRD_HIGH_ENV
+
+ #else /* ifndef CONFIG_SPL_BUILD */
+ #define CONFIG_EXTRA_ENV_SETTINGS
--- a/buildroot-external/board/orangepi/patches/uboot/enable-DT-overlays-support.patch
+++ b/buildroot-external/board/orangepi/patches/uboot/enable-DT-overlays-support.patch
@@ -0,0 +1,13 @@
+diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
+index 0ed36cded..822ebb812 100644
+--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
+@@ -578,6 +578,8 @@ config ARCH_SUNXI
+	select CMD_GPIO
+	select CMD_MMC if MMC
+	select CMD_USB if DISTRO_DEFAULTS
+	select OF_LIBFDT
+	select OF_LIBFDT_OVERLAY
+	select DM
+	select DM_ETH
+	select DM_GPIO
--- a/buildroot-external/board/orangepi/patches/uboot/enable-r_pio-gpio-access-h3-h5.patch
+++ b/buildroot-external/board/orangepi/patches/uboot/enable-r_pio-gpio-access-h3-h5.patch
@@ -0,0 +1,24 @@
+diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c
+index 7ac8360..0484e7a 100644
+--- a/arch/arm/mach-sunxi/board.c
+++ b/arch/arm/mach-sunxi/board.c
+@@ -23,6 +23,7 @@
+ #include <asm/arch/timer.h>
+ #include <asm/arch/tzpc.h>
+ #include <asm/arch/mmc.h>
+#include <asm/arch/prcm.h>
+
+ #include <linux/compiler.h>
+
+@@ -65,6 +66,11 @@ struct mm_region *mem_map = sunxi_mem_map;
+
+ static int gpio_init(void)
+ {
+#if defined(CONFIG_MACH_SUNXI_H3_H5)
+	/* enable R_PIO GPIO access */
+	prcm_apb0_enable(PRCM_APB0_GATE_PIO);
+#endif
+
+ #if CONFIG_CONS_INDEX == 1 && defined(CONFIG_UART0_PORT_F)
+ #if defined(CONFIG_MACH_SUN4I) || \
+     defined(CONFIG_MACH_SUN7I) || \
--- a/buildroot-external/board/orangepi/patches/uboot/fdt-setprop-fix-unaligned-access.patch
+++ b/buildroot-external/board/orangepi/patches/uboot/fdt-setprop-fix-unaligned-access.patch
@@ -0,0 +1,23 @@
+diff --git a/cmd/fdt.c b/cmd/fdt.c
+index d7654b2c4f..a71b7713a8 100644
+--- a/cmd/fdt.c
+++ b/cmd/fdt.c
+@@ -17,6 +17,7 @@
+ #include <fdt_support.h>
+ #include <mapmem.h>
+ #include <asm/io.h>
+#include <asm/unaligned.h>
+
+ #define MAX_LEVEL	32		/* how deeply nested we will go */
+ #define SCRATCHPAD	1024		/* bytes of scratchpad memory */
+@@ -781,7 +782,10 @@ static int fdt_parse_prop(char * const *newval, int count, char *data, int *len)
+			cp = newp;
+			tmp = simple_strtoul(cp, &newp, 0);
+			if (*cp != '?')
+-				*(fdt32_t *)data = cpu_to_fdt32(tmp);
+			{
+				tmp = cpu_to_fdt32(tmp);
+				put_unaligned(tmp, (fdt32_t *)data);
+			}
+			else
+				newp++;
--- a/buildroot-external/board/orangepi/patches/uboot/h3-Fix-PLL1-setup-to-never-use-dividers.patch
+++ b/buildroot-external/board/orangepi/patches/uboot/h3-Fix-PLL1-setup-to-never-use-dividers.patch
@@ -0,0 +1,32 @@
+From 7f5071f906f79bdc99d6b4b0ccf0cb280abe740b Mon Sep 17 00:00:00 2001
+From: Ondrej Jirman <megous@megous.com>
+Date: Tue, 20 Dec 2016 11:25:12 +0100
+Subject: [PATCH] sunxi: h3: Fix PLL1 setup to never use dividers
+
+Kernel would lower the divider on first CLK change and cause the
+lock up.
+---
+ arch/arm/mach-sunxi/clock_sun6i.c | 7 +++----
+ 1 file changed, 3 insertions(+), 4 deletions(-)
+
+diff --git a/arch/arm/mach-sunxi/clock_sun6i.c b/arch/arm/mach-sunxi/clock_sun6i.c
+index 50fb302a19..91aa2a0478 100644
+--- a/arch/arm/mach-sunxi/clock_sun6i.c
+++ b/arch/arm/mach-sunxi/clock_sun6i.c
+@@ -94,11 +94,10 @@ void clock_set_pll1(unsigned int clk)
+	int k = 1;
+	int m = 1;
+
+-	if (clk > 1152000000) {
+-		k = 2;
+-	} else if (clk > 768000000) {
+	if (clk >= 1368000000) {
+		k = 3;
+-		m = 2;
+	} else if (clk >= 768000000) {
+		k = 2;
+	}
+
+	/* Switch to 24MHz clock while changing PLL1 */
+--
+2.11.0
--- a/buildroot-external/board/orangepi/patches/uboot/h3-enable-power-led.patch
+++ b/buildroot-external/board/orangepi/patches/uboot/h3-enable-power-led.patch
@@ -0,0 +1,16 @@
+diff --git a/board/sunxi/board.c b/board/sunxi/board.c
+index 3cf3614..89cf7f5 100644
+--- a/board/sunxi/board.c
+++ b/board/sunxi/board.c
+@@ -478,6 +478,11 @@ void sunxi_board_init(void)
+	int power_failed = 0;
+	unsigned long ramsize;
+
+#ifdef CONFIG_MACH_SUN8I_H3
+	/* turn on power LED (PL10) on H3 boards */
+	gpio_direction_output(SUNXI_GPL(10), 1);
+#endif
+
+ #ifdef CONFIG_SY8106A_POWER
+	power_failed = sy8106a_set_vout1(CONFIG_SY8106A_VOUT1_VOLT);
+ #endif
--- a/buildroot-external/board/orangepi/patches/uboot/h3-set-safe-axi_apb-clock-dividers.patch
+++ b/buildroot-external/board/orangepi/patches/uboot/h3-set-safe-axi_apb-clock-dividers.patch
@@ -0,0 +1,42 @@
+diff --git a/arch/arm/mach-sunxi/clock_sun6i.c b/arch/arm/mach-sunxi/clock_sun6i.c
+index 15272c9..cedddc2 100644
+--- a/arch/arm/mach-sunxi/clock_sun6i.c
+++ b/arch/arm/mach-sunxi/clock_sun6i.c
+@@ -117,8 +117,8 @@ void clock_set_pll1(unsigned int clk)
+	sdelay(200);
+
+	/* Switch CPU to PLL1 */
+-	writel(AXI_DIV_3 << AXI_DIV_SHIFT |
+-	       ATB_DIV_2 << ATB_DIV_SHIFT |
+	writel(AXI_DIV_4 << AXI_DIV_SHIFT |
+	       ATB_DIV_4 << ATB_DIV_SHIFT |
+	       CPU_CLK_SRC_PLL1 << CPU_CLK_SRC_SHIFT,
+	       &ccm->cpu_axi_cfg);
+ }
+diff --git a/arch/arm/include/asm/arch-sunxi/clock_sun6i.h b/arch/arm/include/asm/arch-sunxi/clock_sun6i.h
+index f2990db..b3a8575 100644
+--- a/arch/arm/include/asm/arch-sunxi/clock_sun6i.h
+++ b/arch/arm/include/asm/arch-sunxi/clock_sun6i.h
+@@ -180,6 +180,7 @@ struct sunxi_ccm_reg {
+ #define CCM_PLL1_CTRL_N(n)		((((n) - 1) & 0x1f) << 8)
+ #define CCM_PLL1_CTRL_P(n)		(((n) & 0x3) << 16)
+ #define CCM_PLL1_CTRL_EN		(0x1 << 31)
+#define CCM_PLL1_CTRL_LOCK		(0x1 << 28)
+
+ #define CCM_PLL3_CTRL_M_SHIFT		0
+ #define CCM_PLL3_CTRL_M_MASK		(0xf << CCM_PLL3_CTRL_M_SHIFT)
+diff --git a/arch/arm/mach-sunxi/clock_sun6i.c b/arch/arm/mach-sunxi/clock_sun6i.c
+index cedddc2..3fe9305 100644
+--- a/arch/arm/mach-sunxi/clock_sun6i.c
+++ b/arch/arm/mach-sunxi/clock_sun6i.c
+@@ -114,7 +114,9 @@ void clock_set_pll1(unsigned int clk)
+	writel(CCM_PLL1_CTRL_EN | CCM_PLL1_CTRL_P(p) |
+	       CCM_PLL1_CTRL_N(clk / (24000000 * k / m)) |
+	       CCM_PLL1_CTRL_K(k) | CCM_PLL1_CTRL_M(m), &ccm->pll1_cfg);
+-	sdelay(200);
+
+	while (!(readl(&ccm->pll1_cfg) & CCM_PLL1_CTRL_LOCK))
+		;
+
+	/* Switch CPU to PLL1 */
+	writel(AXI_DIV_4 << AXI_DIV_SHIFT |
--- a/buildroot-external/board/orangepi/patches/uboot/lower-default-DRAM-freq-A64-H5.patch.disabled
+++ b/buildroot-external/board/orangepi/patches/uboot/lower-default-DRAM-freq-A64-H5.patch.disabled
@@ -0,0 +1,13 @@
+diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig
+index 2309f59999..716e9c5e26 100644
+--- a/arch/arm/mach-sunxi/Kconfig
+++ b/arch/arm/mach-sunxi/Kconfig
+@@ -278,7 +278,7 @@ config DRAM_CLK
+	default 312 if MACH_SUN6I || MACH_SUN8I
+	default 360 if MACH_SUN4I || MACH_SUN5I || MACH_SUN7I || \
+		       MACH_SUN8I_V3S
+-	default 672 if MACH_SUN50I
+	default 648 if MACH_SUN50I || MACH_SUN50I_H5
+	---help---
+	Set the dram clock speed, valid range 240 - 480 (prior to sun9i),
+	must be a multiple of 24. For the sun9i (A80), the tested values
--- a/buildroot-external/board/orangepi/patches/uboot/sun8i-set-machid.patch
+++ b/buildroot-external/board/orangepi/patches/uboot/sun8i-set-machid.patch
@@ -0,0 +1,11 @@
+diff --git a/include/configs/sun8i.h b/include/configs/sun8i.h
+index a4c3fb69e..47ce2e9e6 100644
+--- a/include/configs/sun8i.h
+++ b/include/configs/sun8i.h
+@@ -30,4 +30,6 @@
+  */
+ #include <configs/sunxi-common.h>
+
+#define CONFIG_MACH_TYPE	(0x1029)
+
+ #endif /* __CONFIG_H */
--- a/buildroot-external/board/orangepi/patches/uboot/sunxi-boot-splash.patch
+++ b/buildroot-external/board/orangepi/patches/uboot/sunxi-boot-splash.patch
@@ -0,0 +1,62 @@
+diff --git a/cmd/Kconfig b/cmd/Kconfig
+index d6d130edfa..92795119ea 100644
+--- a/cmd/Kconfig
+++ b/cmd/Kconfig
+@@ -1029,6 +1029,7 @@ menu "Misc commands"
+ config CMD_BMP
+	bool "Enable 'bmp' command"
+	depends on LCD || DM_VIDEO || VIDEO
+	default y
+	help
+	  This provides a way to obtain information about a BMP-format iamge
+	  and to display it. BMP (which presumably stands for BitMaP) is a
+diff --git a/include/config_distro_bootcmd.h b/include/config_distro_bootcmd.h
+index 9ed6b9892c..75d5176edf 100644
+--- a/include/config_distro_bootcmd.h
+++ b/include/config_distro_bootcmd.h
+@@ -323,6 +323,15 @@
+	BOOTENV_SHARED_UBIFS \
+	BOOTENV_SHARED_EFI \
+	"boot_prefixes=/ /boot/\0" \
+	"splashpos=m,m\0" \
+	"splashimage=66000000\0" \
+	"loadsplash= " \
+		"for prefix in ${boot_prefixes}; do " \
+			"if test -e mmc 0 ${prefix}boot.bmp; then " \
+				"load mmc 0 ${splashimage} ${prefix}boot.bmp; " \
+				"bmp d ${splashimage}; " \
+			"fi; " \
+		"done\0" \
+	"boot_scripts=boot.scr.uimg boot.scr\0" \
+	"boot_script_dhcp=boot.scr.uimg\0" \
+	BOOTENV_BOOT_TARGETS \
+diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h
+index 02d7be0849..cbdea20d08 100644
+--- a/include/configs/sunxi-common.h
+++ b/include/configs/sunxi-common.h
+@@ -284,6 +284,16 @@ extern int soft_i2c_gpio_scl;
+
+ #endif /* CONFIG_VIDEO */
+
+#if defined CONFIG_VIDEO || defined CONFIG_DM_VIDEO
+#define CONFIG_VIDEO_LOGO
+#define CONFIG_SPLASH_SCREEN
+#define CONFIG_SPLASH_SCREEN_ALIGN
+#define CONFIG_BMP_16BPP
+#define CONFIG_BMP_24BPP
+#define CONFIG_BMP_32BPP
+#define CONFIG_VIDEO_BMP_RLE8
+#endif
+
+ /* Ethernet support */
+ #ifdef CONFIG_SUNXI_EMAC
+ #define CONFIG_PHY_ADDR		1
+@@ -444,7 +454,7 @@ extern int soft_i2c_gpio_scl;
+
+ #ifdef CONFIG_USB_KEYBOARD
+ #define CONSOLE_STDIN_SETTINGS \
+-	"preboot=usb start\0" \
+	"preboot=run loadsplash; usb start\0" \
+	"stdin=serial,usbkbd\0"
+ #else
+ #define CONSOLE_STDIN_SETTINGS \
--- a/buildroot-external/board/orangepi/prime/config.txt
+++ b/buildroot-external/board/orangepi/prime/config.txt
@@ -0,0 +1,3 @@
+i2c0_enable=true
+i2c1_enable=false
+i2c2_enable=false
--- a/buildroot-external/board/orangepi/prime/meta
+++ b/buildroot-external/board/orangepi/prime/meta
@@ -0,0 +1,7 @@
+BOARD_ID=opi-prime
+BOARD_NAME="Orange Pi Prime"
+CHASSIS=embedded
+BOOTLOADER=uboot
+KERNEL_FILE=Image
+BOOT_SYS=spl
+BOOT_ENV_SIZE=0x8000
--- a/buildroot-external/board/orangepi/prime/uboot-boot.ush
+++ b/buildroot-external/board/orangepi/prime/uboot-boot.ush
@@ -0,0 +1,88 @@
+
+part start mmc ${devnum} 6 mmc_env
+mmc dev ${devnum}
+setenv loadbootstate " \
+    echo 'loading env...'; \
+    mmc read ${ramdisk_addr_r} ${mmc_env} 0x40; \
+    env import -c ${ramdisk_addr_r} 0x8000;"
+
+setenv storebootstate " \
+    echo 'storing env...'; \
+    env export -c -s 0x8000 ${ramdisk_addr_r} BOOT_ORDER BOOT_A_LEFT BOOT_B_LEFT; \
+    mmc write ${ramdisk_addr_r} ${mmc_env} 0x40;"
+
+run loadbootstate
+test -n "${BOOT_ORDER}" || setenv BOOT_ORDER "A B"
+test -n "${BOOT_A_LEFT}" || setenv BOOT_A_LEFT 3
+test -n "${BOOT_B_LEFT}" || setenv BOOT_B_LEFT 3
+
+# HassOS bootargs
+setenv bootargs_hassos "zram.enabled=1 zram.num_devices=3 apparmor=1 security=apparmor cgroup_enable=memory rootwait"
+
+# HassOS system A/B
+setenv bootargs_a "root=PARTUUID=8d3d53e3-6d49-4c38-8349-aff6859e82fd rootfstype=squashfs ro"
+setenv bootargs_b "root=PARTUUID=a3ec664e-32ce-4665-95ea-7ae90ce9aa20 rootfstype=squashfs ro"
+
+# Load extraargs
+fileenv mmc ${devnum}:1 ${ramdisk_addr_r} cmdline.txt cmdline
+
+# Load device tree
+fatload mmc ${devnum}:1 ${fdt_addr_r} sun50i-h5-orangepi-prime.dtb
+fdt addr ${fdt_addr_r}
+
+if load mmc ${devnum}:1 ${ramdisk_addr_r} config.txt; then
+  env import -t ${ramdisk_addr_r} ${filesize};
+fi
+
+if test "${i2c0_enable}" != "false"; then
+  fdt set /soc/i2c@1c2ac00 status "okay"
+fi
+
+if test "${i2c1_enable}" != "false"; then
+  fdt set /soc/i2c@1c2b000 status "okay"
+fi
+
+if test "${i2c2_enable}" != "false"; then
+  fdt set /soc/i2c@1c2b400 status "okay"
+fi
+
+setenv bootargs
+for BOOT_SLOT in "${BOOT_ORDER}"; do
+  if test "x${bootargs}" != "x"; then
+    # skip remaining slots
+  elif test "x${BOOT_SLOT}" = "xA"; then
+    if test ${BOOT_A_LEFT} -gt 0; then
+      setexpr BOOT_A_LEFT ${BOOT_A_LEFT} - 1
+      echo "Found valid slot A, ${BOOT_A_LEFT} attempts remaining"
+      setenv load_kernel "ext4load mmc ${devnum}:2 ${kernel_addr_r} Image"
+      setenv bootargs "${bootargs_hassos} ${bootargs_a} rauc.slot=A ${cmdline}"
+    fi
+  elif test "x${BOOT_SLOT}" = "xB"; then
+    if test ${BOOT_B_LEFT} -gt 0; then
+      setexpr BOOT_B_LEFT ${BOOT_B_LEFT} - 1
+      echo "Found valid slot B, ${BOOT_B_LEFT} attempts remaining"
+      setenv load_kernel "ext4load mmc ${devnum}:4 ${kernel_addr_r} Image"
+      setenv bootargs "${bootargs_hassos} ${bootargs_b} rauc.slot=B ${cmdline}"
+    fi
+  fi
+done
+
+if test -n "${bootargs}"; then
+  run storebootstate
+else
+  echo "No valid slot found, resetting tries to 3"
+  setenv BOOT_A_LEFT 3
+  setenv BOOT_B_LEFT 3
+  run storebootstate
+  reset
+fi
+
+echo "Loading kernel"
+run load_kernel
+echo " Starting kernel"
+printenv load_kernel
+printenv bootargs
+booti ${kernel_addr_r} - ${fdt_addr_r}
+
+echo "Fails on boot"
+reset
--- a/buildroot-external/board/orangepi/prime/uboot.config
+++ b/buildroot-external/board/orangepi/prime/uboot.config
@@ -0,0 +1,8 @@
+# CONFIG_USB_STORAGE is not set
+# CONFIG_DOS_PARTITIONcs not set
+CONFIG_EFI_PARTITION is not set
+CONFIG_USB=y
+CONFIG_CMD_USB=y
+CONFIG_DM_USB=y
+CONFIG_CMD_FILEENV=y
+CONFIG_ENV_IS_NOWHERE=Y
--- a/buildroot-external/board/ova/hassos-hook.sh
+++ b/buildroot-external/board/ova/hassos-hook.sh
@@ -1,20 +0,0 @@
-#!/bin/bash
-
-function hassos_pre_image() {
-    local BOOT_DATA="$(path_boot_dir)"
-
-    mkdir -p ${BOOT_DATA}/EFI/BOOT
-    mkdir -p ${BOOT_DATA}/EFI/barebox
-
-    cp ${BINARIES_DIR}/barebox.bin ${BOOT_DATA}/EFI/BOOT/BOOTx64.EFI
-    cp ${BR2_EXTERNAL_HASSOS_PATH}/misc/barebox-state-efi.dtb ${BOOT_DATA}/EFI/barebox/state.dtb
-
-    echo "console=tty1" > ${BOOT_DATA}/cmdline.txt
-}
-
-
-function hassos_post_image() {
-    convert_disk_image_vmdk
-    convert_disk_image_gz vmdk
-}
-
--- a/buildroot-external/board/ova/kernel.config
+++ b/buildroot-external/board/ova/kernel.config
@@ -1,10 +0,0 @@
-CONFIG_EFI_STUB=y
-
-CONFIG_VIRTIO=y
-CONFIG_VIRTIO_PCI=y
-CONFIG_VIRTIO_NET=y
-CONFIG_VIRTIO_BALLOON=m
-CONFIG_VIRTIO_INPUT=m
-CONFIG_VIRTIO_BLK=m
-
-CONFIG_USB_XHCI_HCD=y
--- a/buildroot-external/board/raspberrypi/hassos-hook.sh
+++ b/buildroot-external/board/raspberrypi/hassos-hook.sh
@@ -1,25 +1,26 @@
 #!/bin/bash
+# shellcheck disable=SC2155

 function hassos_pre_image() {
    local BOOT_DATA="$(path_boot_dir)"

-    cp -t ${BOOT_DATA} \
-        ${BINARIES_DIR}/u-boot.bin \
-        ${BINARIES_DIR}/boot.scr
-    cp -t ${BOOT_DATA} \
-        ${BINARIES_DIR}/*.dtb \
-        ${BINARIES_DIR}/rpi-firmware/bootcode.bin \
-        ${BINARIES_DIR}/rpi-firmware/fixup.dat \
-        ${BINARIES_DIR}/rpi-firmware/start.elf
-    cp -r ${BINARIES_DIR}/rpi-firmware/overlays ${BOOT_DATA}/
-    cp -f ${BOARD_DIR}/../boot-env.txt ${BOOT_DATA}/config.txt
+    cp -t "${BOOT_DATA}" \
+        "${BINARIES_DIR}/u-boot.bin" \
+        "${BINARIES_DIR}/boot.scr"
+    cp -t "${BOOT_DATA}" \
+        "${BINARIES_DIR}"/*.dtb \
+        "${BINARIES_DIR}/rpi-firmware/bootcode.bin" \
+        "${BINARIES_DIR}/rpi-firmware/fixup.dat" \
+        "${BINARIES_DIR}/rpi-firmware/start.elf"
+    cp -r "${BINARIES_DIR}/rpi-firmware/overlays" "${BOOT_DATA}/"
+    cp -f "${BOARD_DIR}/../boot-env.txt" "${BOOT_DATA}/config.txt"

    # Set cmd options
-    echo "dwc_otg.lpm_enable=0 console=tty1" > ${BOOT_DATA}/cmdline.txt
+    echo "dwc_otg.lpm_enable=0 console=tty1" > "${BOOT_DATA}/cmdline.txt"

    # Enable 64bit support
    if [ "${BOARD_ID}" == "rpi3-64" ]; then
-        echo "arm_64bit=1" >> ${BOOT_DATA}/config.txt
+        echo "arm_64bit=1" >> "${BOOT_DATA}/config.txt"
    fi
 }

--- a/buildroot-external/board/raspberrypi/rpi3-64/uboot-boot.ush
+++ b/buildroot-external/board/raspberrypi/rpi3-64/uboot-boot.ush
--- a/buildroot-external/board/raspberrypi/uboot-boot.ush
+++ b/buildroot-external/board/raspberrypi/uboot-boot.ush
--- a/buildroot-external/configs/intel_nuc_defconfig
+++ b/buildroot-external/configs/intel_nuc_defconfig
@@ -0,0 +1,105 @@
+BR2_x86_64=y
+BR2_DL_DIR="/cache/dl"
+BR2_CCACHE=y
+BR2_CCACHE_DIR="/cache/cc"
+BR2_GLOBAL_PATCH_DIR="$(BR2_EXTERNAL_HASSOS_PATH)/patches $(BR2_EXTERNAL_HASSOS_PATH)/board/intel/patches"
+BR2_TOOLCHAIN_BUILDROOT_GLIBC=y
+BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_4_14=y
+BR2_GCC_VERSION_7_X=y
+BR2_TOOLCHAIN_BUILDROOT_CXX=y
+BR2_BINUTILS_ENABLE_LTO=y
+BR2_GCC_ENABLE_LTO=y
+BR2_TARGET_GENERIC_HOSTNAME="hassio"
+BR2_TARGET_GENERIC_ISSUE="Welcome to HassOS"
+BR2_INIT_SYSTEMD=y
+BR2_TARGET_GENERIC_GETTY_PORT="tty1"
+# BR2_TARGET_GENERIC_REMOUNT_ROOTFS_RW is not set
+BR2_ROOTFS_OVERLAY="$(BR2_EXTERNAL_HASSOS_PATH)/rootfs-overlay"
+BR2_ROOTFS_POST_BUILD_SCRIPT="$(BR2_EXTERNAL_HASSOS_PATH)/scripts/post-build.sh"
+BR2_ROOTFS_POST_IMAGE_SCRIPT="$(BR2_EXTERNAL_HASSOS_PATH)/scripts/post-image.sh"
+BR2_ROOTFS_POST_SCRIPT_ARGS="$(BR2_EXTERNAL_HASSOS_PATH)/board/intel/nuc $(BR2_EXTERNAL_HASSOS_PATH)/board/intel/nuc/hassos-hook.sh"
+BR2_LINUX_KERNEL=y
+BR2_LINUX_KERNEL_CUSTOM_VERSION=y
+BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="4.14.82"
+BR2_LINUX_KERNEL_DEFCONFIG="x86_64"
+BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config $(BR2_EXTERNAL_HASSOS_PATH)/board/intel/nuc/kernel.config"
+BR2_LINUX_KERNEL_LZ4=y
+BR2_LINUX_KERNEL_NEEDS_HOST_OPENSSL=y
+BR2_LINUX_KERNEL_NEEDS_HOST_LIBELF=y
+BR2_PACKAGE_BUSYBOX_CONFIG="$(BR2_EXTERNAL_HASSOS_PATH)/busybox.config"
+BR2_PACKAGE_BUSYBOX_INDIVIDUAL_BINARIES=y
+BR2_PACKAGE_JQ=y
+BR2_PACKAGE_E2FSPROGS=y
+BR2_PACKAGE_E2FSPROGS_RESIZE2FS=y
+BR2_PACKAGE_SQUASHFS=y
+BR2_PACKAGE_LINUX_FIRMWARE=y
+BR2_PACKAGE_LINUX_FIRMWARE_IBT=y
+BR2_PACKAGE_LINUX_FIRMWARE_IWLWIFI_3160=y
+BR2_PACKAGE_LINUX_FIRMWARE_IWLWIFI_3168=y
+BR2_PACKAGE_LINUX_FIRMWARE_IWLWIFI_7260=y
+BR2_PACKAGE_LINUX_FIRMWARE_IWLWIFI_7265=y
+BR2_PACKAGE_LINUX_FIRMWARE_IWLWIFI_7265D=y
+BR2_PACKAGE_LINUX_FIRMWARE_IWLWIFI_8000=y
+BR2_PACKAGE_LINUX_FIRMWARE_IWLWIFI_8265=y
+BR2_PACKAGE_LINUX_FIRMWARE_IWLWIFI_9XXX=y
+BR2_PACKAGE_LINUX_FIRMWARE_I915=y
+BR2_PACKAGE_DT_UTILS=y
+BR2_PACKAGE_GPTFDISK=y
+BR2_PACKAGE_GPTFDISK_SGDISK=y
+BR2_PACKAGE_CA_CERTIFICATES=y
+BR2_PACKAGE_LIBCGROUP=y
+BR2_PACKAGE_LIBCGROUP_TOOLS=y
+BR2_PACKAGE_AVAHI=y
+# BR2_PACKAGE_AVAHI_AUTOIPD is not set
+BR2_PACKAGE_AVAHI_DAEMON=y
+BR2_PACKAGE_AVAHI_LIBDNSSD_COMPATIBILITY=y
+BR2_PACKAGE_BLUEZ5_UTILS=y
+BR2_PACKAGE_BLUEZ5_UTILS_CLIENT=y
+BR2_PACKAGE_DHCP=y
+BR2_PACKAGE_DHCP_CLIENT=y
+BR2_PACKAGE_WIREGUARD=y
+BR2_PACKAGE_DROPBEAR=y
+# BR2_PACKAGE_DROPBEAR_CLIENT is not set
+# BR2_PACKAGE_IFUPDOWN_SCRIPTS is not set
+BR2_PACKAGE_NETWORK_MANAGER=y
+BR2_PACKAGE_NETWORK_MANAGER_MODEM_MANAGER=y
+BR2_PACKAGE_TINI=y
+BR2_PACKAGE_DOCKER_ENGINE=y
+BR2_PACKAGE_DOCKER_CLI=y
+BR2_PACKAGE_OPENVMTOOLS=y
+BR2_PACKAGE_RAUC=y
+BR2_PACKAGE_RAUC_NETWORK=y
+BR2_PACKAGE_RNG_TOOLS=y
+# BR2_PACKAGE_SYSTEMD_HWDB is not set
+# BR2_PACKAGE_SYSTEMD_NETWORKD is not set
+BR2_PACKAGE_SYSTEMD_RANDOMSEED=y
+# BR2_PACKAGE_SYSTEMD_RESOLVED is not set
+BR2_PACKAGE_UTIL_LINUX_PARTX=y
+BR2_PACKAGE_UTIL_LINUX_ZRAMCTL=y
+BR2_TARGET_ROOTFS_SQUASHFS=y
+BR2_TARGET_ROOTFS_SQUASHFS4_LZ4=y
+# BR2_TARGET_ROOTFS_TAR is not set
+BR2_TARGET_BAREBOX=y
+BR2_TARGET_BAREBOX_CUSTOM_VERSION=y
+BR2_TARGET_BAREBOX_CUSTOM_VERSION_VALUE="2018.05.0"
+BR2_TARGET_BAREBOX_USE_CUSTOM_CONFIG=y
+BR2_TARGET_BAREBOX_CUSTOM_CONFIG_FILE="$(BR2_EXTERNAL_HASSOS_PATH)/board/intel/barebox.config"
+BR2_TARGET_BAREBOX_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/bootloader/barebox.config"
+BR2_TARGET_BAREBOX_CUSTOM_EMBEDDED_ENV_PATH="$(BR2_EXTERNAL_HASSOS_PATH)/bootloader/barebox"
+BR2_PACKAGE_HOST_DOSFSTOOLS=y
+BR2_PACKAGE_HOST_E2FSPROGS=y
+BR2_PACKAGE_HOST_GPTFDISK=y
+BR2_PACKAGE_HOST_MTOOLS=y
+BR2_PACKAGE_HOST_RAUC=y
+BR2_PACKAGE_HASSOS=y
+BR2_PACKAGE_HASSOS_SUPERVISOR="homeassistant/amd64-hassio-supervisor"
+BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="142"
+BR2_PACKAGE_HASSOS_SUPERVISOR_ARGS="-e HOMEASSISTANT_REPOSITORY=homeassistant/intel-nuc-homeassistant"
+BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE="hassio-supervisor"
+BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE_URL="http://s3.amazonaws.com/hassio-version/apparmor.txt"
+BR2_PACKAGE_HASSOS_CLI="homeassistant/amd64-hassio-cli"
+BR2_PACKAGE_HASSOS_CLI_VERSION="8"
+BR2_PACKAGE_HASSOS_CLI_ARGS="--network=hassio --add-host hassio:172.30.32.2"
+BR2_PACKAGE_HASSOS_CLI_PROFILE="docker-default"
+BR2_PACKAGE_HASSOS_APPARMOR_DIR="supervisor/apparmor"
+BR2_PACKAGE_APPARMOR=y
--- a/buildroot-external/configs/odroid_c2_defconfig
+++ b/buildroot-external/configs/odroid_c2_defconfig
@@ -4,9 +4,10 @@ BR2_CCACHE=y
 BR2_CCACHE_DIR="/cache/cc"
 BR2_GLOBAL_PATCH_DIR="$(BR2_EXTERNAL_HASSOS_PATH)/patches $(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/odroid-c2/patches"
 BR2_TOOLCHAIN_BUILDROOT_GLIBC=y
-BR2_KERNEL_HEADERS_4_14=y
 BR2_GCC_VERSION_7_X=y
 BR2_TOOLCHAIN_BUILDROOT_CXX=y
+BR2_BINUTILS_ENABLE_LTO=y
+BR2_GCC_ENABLE_LTO=y
 BR2_TARGET_GENERIC_HOSTNAME="hassio"
 BR2_TARGET_GENERIC_ISSUE="Welcome to HassOS"
 BR2_INIT_SYSTEMD=y
@@ -18,10 +19,10 @@ BR2_ROOTFS_POST_IMAGE_SCRIPT="$(BR2_EXTERNAL_HASSOS_PATH)/scripts/post-image.sh"
 BR2_ROOTFS_POST_SCRIPT_ARGS="$(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/odroid-c2 $(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/odroid-c2/hassos-hook.sh"
 BR2_LINUX_KERNEL=y
 BR2_LINUX_KERNEL_CUSTOM_VERSION=y
-BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="4.14.67"
+BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="4.19.15"
 BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y
 BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="$(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/odroid-c2/kernel.config"
-BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos-4_14.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config"
+BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config"
 BR2_LINUX_KERNEL_LZ4=y
 BR2_LINUX_KERNEL_DTS_SUPPORT=y
 BR2_LINUX_KERNEL_INTREE_DTS_NAME="amlogic/meson-gxbb-odroidc2"
@@ -49,6 +50,7 @@ BR2_PACKAGE_BLUEZ5_UTILS_CLIENT=y
 BR2_PACKAGE_BLUEZ5_UTILS_DEPRECATED=y
 BR2_PACKAGE_DHCP=y
 BR2_PACKAGE_DHCP_CLIENT=y
+BR2_PACKAGE_WIREGUARD=y
 BR2_PACKAGE_DROPBEAR=y
 # BR2_PACKAGE_DROPBEAR_CLIENT is not set
 # BR2_PACKAGE_IFUPDOWN_SCRIPTS is not set
@@ -56,8 +58,10 @@ BR2_PACKAGE_NETWORK_MANAGER=y
 BR2_PACKAGE_NETWORK_MANAGER_MODEM_MANAGER=y
 BR2_PACKAGE_TINI=y
 BR2_PACKAGE_DOCKER_ENGINE=y
+BR2_PACKAGE_DOCKER_CLI=y
 BR2_PACKAGE_RAUC=y
 BR2_PACKAGE_RAUC_NETWORK=y
+BR2_PACKAGE_RNG_TOOLS=y
 # BR2_PACKAGE_SYSTEMD_HWDB is not set
 # BR2_PACKAGE_SYSTEMD_NETWORKD is not set
 BR2_PACKAGE_SYSTEMD_RANDOMSEED=y
@@ -74,7 +78,7 @@ BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2018.07"
 BR2_TARGET_UBOOT_BOARD_DEFCONFIG="odroid-c2"
 BR2_TARGET_UBOOT_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/bootloader/uboot.config $(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/odroid-c2/uboot.config"
 BR2_TARGET_UBOOT_BOOT_SCRIPT=y
-BR2_TARGET_UBOOT_BOOT_SCRIPT_SOURCE="$(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/odroid-c2/uboot-boot.sh"
+BR2_TARGET_UBOOT_BOOT_SCRIPT_SOURCE="$(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/odroid-c2/uboot-boot.ush"
 BR2_PACKAGE_HOST_DOSFSTOOLS=y
 BR2_PACKAGE_HOST_E2FSPROGS=y
 BR2_PACKAGE_HOST_GPTFDISK=y
@@ -82,12 +86,12 @@ BR2_PACKAGE_HOST_MTOOLS=y
 BR2_PACKAGE_HOST_RAUC=y
 BR2_PACKAGE_HASSOS=y
 BR2_PACKAGE_HASSOS_SUPERVISOR="homeassistant/aarch64-hassio-supervisor"
-BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="127"
+BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="142"
 BR2_PACKAGE_HASSOS_SUPERVISOR_ARGS="-e HOMEASSISTANT_REPOSITORY=homeassistant/odroid-c2-homeassistant"
 BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE="hassio-supervisor"
 BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE_URL="http://s3.amazonaws.com/hassio-version/apparmor.txt"
 BR2_PACKAGE_HASSOS_CLI="homeassistant/aarch64-hassio-cli"
-BR2_PACKAGE_HASSOS_CLI_VERSION="6"
+BR2_PACKAGE_HASSOS_CLI_VERSION="8"
 BR2_PACKAGE_HASSOS_CLI_ARGS="--network=hassio --add-host hassio:172.30.32.2"
 BR2_PACKAGE_HASSOS_CLI_PROFILE="docker-default"
 BR2_PACKAGE_HASSOS_APPARMOR_DIR="supervisor/apparmor"
--- a/buildroot-external/configs/odroid_xu4_defconfig
+++ b/buildroot-external/configs/odroid_xu4_defconfig
@@ -0,0 +1,108 @@
+BR2_arm=y
+BR2_cortex_a7=y
+BR2_DL_DIR="/cache/dl"
+BR2_CCACHE=y
+BR2_CCACHE_DIR="/cache/cc"
+BR2_GLOBAL_PATCH_DIR="$(BR2_EXTERNAL_HASSOS_PATH)/patches"
+BR2_TOOLCHAIN_BUILDROOT_GLIBC=y
+BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_4_19=y
+BR2_GCC_VERSION_7_X=y
+BR2_TOOLCHAIN_BUILDROOT_CXX=y
+BR2_BINUTILS_ENABLE_LTO=y
+BR2_GCC_ENABLE_LTO=y
+BR2_TARGET_GENERIC_HOSTNAME="hassio"
+BR2_TARGET_GENERIC_ISSUE="Welcome to HassOS"
+BR2_INIT_SYSTEMD=y
+BR2_TARGET_GENERIC_GETTY_PORT="tty1"
+# BR2_TARGET_GENERIC_REMOUNT_ROOTFS_RW is not set
+BR2_ROOTFS_OVERLAY="$(BR2_EXTERNAL_HASSOS_PATH)/rootfs-overlay"
+BR2_ROOTFS_POST_BUILD_SCRIPT="$(BR2_EXTERNAL_HASSOS_PATH)/scripts/post-build.sh"
+BR2_ROOTFS_POST_IMAGE_SCRIPT="$(BR2_EXTERNAL_HASSOS_PATH)/scripts/post-image.sh"
+BR2_ROOTFS_POST_SCRIPT_ARGS="$(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/odroid-xu4 $(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/odroid-xu4/hassos-hook.sh"
+BR2_LINUX_KERNEL=y
+#BR2_LINUX_KERNEL_CUSTOM_GIT=y
+#BR2_LINUX_KERNEL_CUSTOM_REPO_URL="https://github.com/hardkernel/linux.git"
+#BR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="4.14.87-153"
+BR2_LINUX_KERNEL_CUSTOM_VERSION=y
+BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="4.19.15"
+BR2_LINUX_KERNEL_DTS_SUPPORT=y
+BR2_LINUX_KERNEL_INTREE_DTS_NAME="exynos5422-odroidxu4"
+#BR2_LINUX_KERNEL_DEFCONFIG="odroidxu4"
+BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y
+BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="$(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/odroid-xu4/kernel.config"
+BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config"
+BR2_LINUX_KERNEL_LZ4=y
+BR2_LINUX_KERNEL_NEEDS_HOST_OPENSSL=y
+BR2_LINUX_KERNEL_NEEDS_HOST_LIBELF=y
+BR2_PACKAGE_BUSYBOX_CONFIG="$(BR2_EXTERNAL_HASSOS_PATH)/busybox.config"
+BR2_PACKAGE_BUSYBOX_INDIVIDUAL_BINARIES=y
+BR2_PACKAGE_JQ=y
+BR2_PACKAGE_E2FSPROGS=y
+BR2_PACKAGE_E2FSPROGS_RESIZE2FS=y
+BR2_PACKAGE_SQUASHFS=y
+BR2_PACKAGE_GPTFDISK=y
+BR2_PACKAGE_GPTFDISK_SGDISK=y
+BR2_PACKAGE_UBOOT_TOOLS=y
+BR2_PACKAGE_CA_CERTIFICATES=y
+BR2_PACKAGE_LIBDNET=y
+BR2_PACKAGE_LIBCGROUP=y
+BR2_PACKAGE_LIBCGROUP_TOOLS=y
+BR2_PACKAGE_AVAHI=y
+# BR2_PACKAGE_AVAHI_AUTOIPD is not set
+BR2_PACKAGE_AVAHI_DAEMON=y
+BR2_PACKAGE_AVAHI_LIBDNSSD_COMPATIBILITY=y
+BR2_PACKAGE_BLUEZ5_UTILS=y
+BR2_PACKAGE_BLUEZ5_UTILS_CLIENT=y
+BR2_PACKAGE_BLUEZ5_UTILS_DEPRECATED=y
+BR2_PACKAGE_DHCP=y
+BR2_PACKAGE_DHCP_CLIENT=y
+BR2_PACKAGE_WIREGUARD=y
+BR2_PACKAGE_DROPBEAR=y
+# BR2_PACKAGE_DROPBEAR_CLIENT is not set
+# BR2_PACKAGE_IFUPDOWN_SCRIPTS is not set
+BR2_PACKAGE_NETWORK_MANAGER=y
+BR2_PACKAGE_NETWORK_MANAGER_MODEM_MANAGER=y
+BR2_PACKAGE_TINI=y
+BR2_PACKAGE_DOCKER_ENGINE=y
+BR2_PACKAGE_DOCKER_CLI=y
+BR2_PACKAGE_RAUC=y
+BR2_PACKAGE_RAUC_NETWORK=y
+BR2_PACKAGE_RNG_TOOLS=y
+# BR2_PACKAGE_SYSTEMD_HWDB is not set
+# BR2_PACKAGE_SYSTEMD_NETWORKD is not set
+BR2_PACKAGE_SYSTEMD_RANDOMSEED=y
+# BR2_PACKAGE_SYSTEMD_RESOLVED is not set
+BR2_PACKAGE_UTIL_LINUX_PARTX=y
+BR2_PACKAGE_UTIL_LINUX_ZRAMCTL=y
+BR2_TARGET_ROOTFS_SQUASHFS=y
+BR2_TARGET_ROOTFS_SQUASHFS4_LZ4=y
+# BR2_TARGET_ROOTFS_TAR is not set
+BR2_TARGET_UBOOT=y
+BR2_TARGET_UBOOT_BUILD_SYSTEM_KCONFIG=y
+BR2_TARGET_UBOOT_CUSTOM_VERSION=y
+BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2018.07"
+BR2_TARGET_UBOOT_BOARD_DEFCONFIG="odroid-xu3"
+BR2_TARGET_UBOOT_NEEDS_DTC=y
+BR2_TARGET_UBOOT_FORMAT_DTB_BIN=y
+BR2_TARGET_UBOOT_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/bootloader/uboot.config $(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/odroid-xu4/uboot.config"
+BR2_TARGET_UBOOT_BOOT_SCRIPT=y
+BR2_TARGET_UBOOT_BOOT_SCRIPT_SOURCE="$(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/odroid-xu4/uboot-boot.ush"
+BR2_PACKAGE_HOST_DOSFSTOOLS=y
+BR2_PACKAGE_HOST_E2FSPROGS=y
+BR2_PACKAGE_HOST_GPTFDISK=y
+BR2_PACKAGE_HOST_MTOOLS=y
+BR2_PACKAGE_HOST_RAUC=y
+BR2_PACKAGE_HASSOS=y
+BR2_PACKAGE_HASSOS_SUPERVISOR="homeassistant/armhf-hassio-supervisor"
+BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="142"
+BR2_PACKAGE_HASSOS_SUPERVISOR_ARGS="-e HOMEASSISTANT_REPOSITORY=homeassistant/odroid-xu-homeassistant"
+BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE="hassio-supervisor"
+BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE_URL="http://s3.amazonaws.com/hassio-version/apparmor.txt"
+BR2_PACKAGE_HASSOS_CLI="homeassistant/armhf-hassio-cli"
+BR2_PACKAGE_HASSOS_CLI_VERSION="8"
+BR2_PACKAGE_HASSOS_CLI_ARGS="--network=hassio --add-host hassio:172.30.32.2"
+BR2_PACKAGE_HASSOS_CLI_PROFILE="docker-default"
+BR2_PACKAGE_HASSOS_APPARMOR_DIR="supervisor/apparmor"
+BR2_PACKAGE_APPARMOR=y
+BR2_PACKAGE_HARDKERNEL_BOOT=y
+BR2_PACKAGE_HARDKERNEL_BOOT_ODROID_XU4=y
--- a/buildroot-external/configs/opi_prime_defconfig
+++ b/buildroot-external/configs/opi_prime_defconfig
@@ -0,0 +1,113 @@
+BR2_aarch64=y
+BR2_cortex_a53=y
+BR2_ARM_FPU_VFPV4=y
+BR2_DL_DIR="/cache/dl"
+BR2_CCACHE=y
+BR2_CCACHE_DIR="/cache/cc"
+BR2_GLOBAL_PATCH_DIR="$(BR2_EXTERNAL_HASSOS_PATH)/patches $(BR2_EXTERNAL_HASSOS_PATH)/board/orangepi/patches"
+BR2_TOOLCHAIN_BUILDROOT_GLIBC=y
+BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_4_19=y
+BR2_GCC_VERSION_7_X=y
+BR2_TOOLCHAIN_BUILDROOT_CXX=y
+BR2_BINUTILS_ENABLE_LTO=y
+BR2_GCC_ENABLE_LTO=y
+BR2_TARGET_GENERIC_HOSTNAME="hassio"
+BR2_TARGET_GENERIC_ISSUE="Welcome to HassOS"
+BR2_INIT_SYSTEMD=y
+BR2_TARGET_GENERIC_GETTY_PORT="tty0"
+# BR2_TARGET_GENERIC_REMOUNT_ROOTFS_RW is not set
+BR2_TARGET_ARM_TRUSTED_FIRMWARE=y
+BR2_TARGET_ARM_TRUSTED_FIRMWARE_CUSTOM_GIT=y
+BR2_TARGET_ARM_TRUSTED_FIRMWARE_CUSTOM_REPO_URL="https://github.com/apritzel/arm-trusted-firmware.git"
+BR2_TARGET_ARM_TRUSTED_FIRMWARE_PLATFORM="sun50iw1p1"
+BR2_TARGET_ARM_TRUSTED_FIRMWARE_CUSTOM_REPO_VERSION="aa75c8da415158a94b82a430b2b40000778e851f"
+BR2_TARGET_ARM_TRUSTED_FIRMWARE_BL31=y
+BR2_TARGET_UBOOT=y
+BR2_TARGET_UBOOT_BUILD_SYSTEM_KCONFIG=y
+BR2_TARGET_UBOOT_CUSTOM_VERSION=y
+BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2018.11"
+BR2_TARGET_UBOOT_BOARD_DEFCONFIG="orangepi_prime"
+BR2_TARGET_UBOOT_NEEDS_DTC=y
+BR2_TARGET_UBOOT_NEEDS_ATF_BL31=y
+BR2_TARGET_UBOOT_FORMAT_CUSTOM=y
+BR2_TARGET_UBOOT_FORMAT_CUSTOM_NAME="u-boot.itb"
+BR2_TARGET_UBOOT_SPL=y
+BR2_TARGET_UBOOT_SPL_NAME="spl/sunxi-spl.bin"
+BR2_TARGET_UBOOT_BOOT_SCRIPT=y
+BR2_TARGET_UBOOT_BOOT_SCRIPT_SOURCE="$(BR2_EXTERNAL_HASSOS_PATH)/board/orangepi/prime/uboot-boot.ush"
+BR2_TARGET_UBOOT_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/bootloader/uboot.config $(BR2_EXTERNAL_HASSOS_PATH)/board/orangepi/prime/uboot.config"
+BR2_LINUX_KERNEL=y
+BR2_LINUX_KERNEL_CUSTOM_VERSION=y
+BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="4.19.13"
+BR2_LINUX_KERNEL_DTS_SUPPORT=y
+BR2_LINUX_KERNEL_INTREE_DTS_NAME="allwinner/sun50i-h5-orangepi-prime"
+BR2_LINUX_KERNEL_LZ4=y
+BR2_LINUX_KERNEL_NEEDS_HOST_OPENSSL=y
+BR2_LINUX_KERNEL_NEEDS_HOST_LIBELF=y
+BR2_LINUX_KERNEL_USE_ARCH_DEFAULT_CONFIG=y
+BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config $(BR2_EXTERNAL_HASSOS_PATH)/board/orangepi/kernel.config"
+BR2_ROOTFS_OVERLAY="$(BR2_EXTERNAL_HASSOS_PATH)/rootfs-overlay"
+BR2_ROOTFS_POST_BUILD_SCRIPT="$(BR2_EXTERNAL_HASSOS_PATH)/scripts/post-build.sh"
+BR2_ROOTFS_POST_IMAGE_SCRIPT="$(BR2_EXTERNAL_HASSOS_PATH)/scripts/post-image.sh"
+BR2_ROOTFS_POST_SCRIPT_ARGS="$(BR2_EXTERNAL_HASSOS_PATH)/board/orangepi/prime $(BR2_EXTERNAL_HASSOS_PATH)/board/orangepi/hassos-hook.sh"
+BR2_PACKAGE_BUSYBOX_CONFIG="$(BR2_EXTERNAL_HASSOS_PATH)/busybox.config"
+BR2_PACKAGE_BUSYBOX_INDIVIDUAL_BINARIES=y
+BR2_PACKAGE_JQ=y
+BR2_PACKAGE_E2FSPROGS=y
+BR2_PACKAGE_E2FSPROGS_RESIZE2FS=y
+BR2_PACKAGE_SQUASHFS=y
+BR2_PACKAGE_LINUX_FIRMWARE=y
+BR2_PACKAGE_LINUX_FIRMWARE_RTL_87XX=y
+BR2_PACKAGE_GPTFDISK=y
+BR2_PACKAGE_GPTFDISK_SGDISK=y
+BR2_PACKAGE_UBOOT_TOOLS=y
+BR2_PACKAGE_CA_CERTIFICATES=y
+BR2_PACKAGE_LIBDNET=y
+BR2_PACKAGE_LIBCGROUP=y
+BR2_PACKAGE_LIBCGROUP_TOOLS=y
+BR2_PACKAGE_AVAHI=y
+# BR2_PACKAGE_AVAHI_AUTOIPD is not set
+BR2_PACKAGE_AVAHI_DAEMON=y
+BR2_PACKAGE_AVAHI_LIBDNSSD_COMPATIBILITY=y
+BR2_PACKAGE_BLUEZ5_UTILS=y
+BR2_PACKAGE_BLUEZ5_UTILS_CLIENT=y
+BR2_PACKAGE_DHCP=y
+BR2_PACKAGE_DHCP_CLIENT=y
+BR2_PACKAGE_WIREGUARD=y
+BR2_PACKAGE_DROPBEAR=y
+# BR2_PACKAGE_DROPBEAR_CLIENT is not set
+# BR2_PACKAGE_IFUPDOWN_SCRIPTS is not set
+BR2_PACKAGE_NETWORK_MANAGER=y
+BR2_PACKAGE_NETWORK_MANAGER_MODEM_MANAGER=y
+BR2_PACKAGE_TINI=y
+BR2_PACKAGE_DOCKER_ENGINE=y
+BR2_PACKAGE_DOCKER_CLI=y
+BR2_PACKAGE_RAUC=y
+BR2_PACKAGE_RAUC_NETWORK=y
+# BR2_PACKAGE_SYSTEMD_HWDB is not set
+# BR2_PACKAGE_SYSTEMD_NETWORKD is not set
+BR2_PACKAGE_SYSTEMD_RANDOMSEED=y
+# BR2_PACKAGE_SYSTEMD_RESOLVED is not set
+BR2_PACKAGE_UTIL_LINUX_PARTX=y
+BR2_PACKAGE_UTIL_LINUX_ZRAMCTL=y
+BR2_TARGET_ROOTFS_SQUASHFS=y
+BR2_TARGET_ROOTFS_SQUASHFS4_LZ4=y
+# BR2_TARGET_ROOTFS_TAR is not set
+BR2_PACKAGE_HOST_DOSFSTOOLS=y
+BR2_PACKAGE_HOST_E2FSPROGS=y
+BR2_PACKAGE_HOST_GPTFDISK=y
+BR2_PACKAGE_HOST_MTOOLS=y
+BR2_PACKAGE_HOST_RAUC=y
+BR2_PACKAGE_HOST_SWIG=y
+BR2_PACKAGE_HASSOS=y
+BR2_PACKAGE_HASSOS_SUPERVISOR="homeassistant/aarch64-hassio-supervisor"
+BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="142"
+BR2_PACKAGE_HASSOS_SUPERVISOR_ARGS="-e HOMEASSISTANT_REPOSITORY=homeassistant/orangepi-prime-homeassistant"
+BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE="hassio-supervisor"
+BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE_URL="http://s3.amazonaws.com/hassio-version/apparmor.txt"
+BR2_PACKAGE_HASSOS_CLI="homeassistant/aarch64-hassio-cli"
+BR2_PACKAGE_HASSOS_CLI_VERSION="8"
+BR2_PACKAGE_HASSOS_CLI_ARGS="--network=hassio --add-host hassio:172.30.32.2"
+BR2_PACKAGE_HASSOS_CLI_PROFILE="docker-default"
+BR2_PACKAGE_HASSOS_APPARMOR_DIR="supervisor/apparmor"
+BR2_PACKAGE_APPARMOR=y
--- a/buildroot-external/configs/ova_defconfig
+++ b/buildroot-external/configs/ova_defconfig
@@ -2,11 +2,12 @@ BR2_x86_64=y
 BR2_DL_DIR="/cache/dl"
 BR2_CCACHE=y
 BR2_CCACHE_DIR="/cache/cc"
-BR2_GLOBAL_PATCH_DIR="$(BR2_EXTERNAL_HASSOS_PATH)/patches $(BR2_EXTERNAL_HASSOS_PATH)/board/ova/patches"
+BR2_GLOBAL_PATCH_DIR="$(BR2_EXTERNAL_HASSOS_PATH)/patches $(BR2_EXTERNAL_HASSOS_PATH)/board/intel/patches"
 BR2_TOOLCHAIN_BUILDROOT_GLIBC=y
-BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_4_14=y
 BR2_GCC_VERSION_7_X=y
 BR2_TOOLCHAIN_BUILDROOT_CXX=y
+BR2_BINUTILS_ENABLE_LTO=y
+BR2_GCC_ENABLE_LTO=y
 BR2_TARGET_GENERIC_HOSTNAME="hassio"
 BR2_TARGET_GENERIC_ISSUE="Welcome to HassOS"
 BR2_INIT_SYSTEMD=y
@@ -15,12 +16,12 @@ BR2_TARGET_GENERIC_GETTY_PORT="tty1"
 BR2_ROOTFS_OVERLAY="$(BR2_EXTERNAL_HASSOS_PATH)/rootfs-overlay"
 BR2_ROOTFS_POST_BUILD_SCRIPT="$(BR2_EXTERNAL_HASSOS_PATH)/scripts/post-build.sh"
 BR2_ROOTFS_POST_IMAGE_SCRIPT="$(BR2_EXTERNAL_HASSOS_PATH)/scripts/post-image.sh"
-BR2_ROOTFS_POST_SCRIPT_ARGS="$(BR2_EXTERNAL_HASSOS_PATH)/board/ova $(BR2_EXTERNAL_HASSOS_PATH)/board/ova/hassos-hook.sh"
+BR2_ROOTFS_POST_SCRIPT_ARGS="$(BR2_EXTERNAL_HASSOS_PATH)/board/intel/ova $(BR2_EXTERNAL_HASSOS_PATH)/board/intel/ova/hassos-hook.sh"
 BR2_LINUX_KERNEL=y
 BR2_LINUX_KERNEL_CUSTOM_VERSION=y
-BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="4.14.82"
+BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="4.19.18"
 BR2_LINUX_KERNEL_DEFCONFIG="x86_64"
-BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos-4_14.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config $(BR2_EXTERNAL_HASSOS_PATH)/board/ova/kernel.config"
+BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config $(BR2_EXTERNAL_HASSOS_PATH)/board/intel/ova/kernel.config"
 BR2_LINUX_KERNEL_LZ4=y
 BR2_LINUX_KERNEL_NEEDS_HOST_OPENSSL=y
 BR2_LINUX_KERNEL_NEEDS_HOST_LIBELF=y
@@ -44,6 +45,7 @@ BR2_PACKAGE_BLUEZ5_UTILS=y
 BR2_PACKAGE_BLUEZ5_UTILS_CLIENT=y
 BR2_PACKAGE_DHCP=y
 BR2_PACKAGE_DHCP_CLIENT=y
+BR2_PACKAGE_WIREGUARD=y
 BR2_PACKAGE_DROPBEAR=y
 # BR2_PACKAGE_DROPBEAR_CLIENT is not set
 # BR2_PACKAGE_IFUPDOWN_SCRIPTS is not set
@@ -51,9 +53,11 @@ BR2_PACKAGE_NETWORK_MANAGER=y
 BR2_PACKAGE_NETWORK_MANAGER_MODEM_MANAGER=y
 BR2_PACKAGE_TINI=y
 BR2_PACKAGE_DOCKER_ENGINE=y
+BR2_PACKAGE_DOCKER_CLI=y
 BR2_PACKAGE_OPENVMTOOLS=y
 BR2_PACKAGE_RAUC=y
 BR2_PACKAGE_RAUC_NETWORK=y
+BR2_PACKAGE_RNG_TOOLS=y
 # BR2_PACKAGE_SYSTEMD_HWDB is not set
 # BR2_PACKAGE_SYSTEMD_NETWORKD is not set
 BR2_PACKAGE_SYSTEMD_RANDOMSEED=y
@@ -67,7 +71,7 @@ BR2_TARGET_BAREBOX=y
 BR2_TARGET_BAREBOX_CUSTOM_VERSION=y
 BR2_TARGET_BAREBOX_CUSTOM_VERSION_VALUE="2018.05.0"
 BR2_TARGET_BAREBOX_USE_CUSTOM_CONFIG=y
-BR2_TARGET_BAREBOX_CUSTOM_CONFIG_FILE="$(BR2_EXTERNAL_HASSOS_PATH)/board/ova/barebox.config"
+BR2_TARGET_BAREBOX_CUSTOM_CONFIG_FILE="$(BR2_EXTERNAL_HASSOS_PATH)/board/intel/barebox.config"
 BR2_TARGET_BAREBOX_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/bootloader/barebox.config"
 BR2_TARGET_BAREBOX_CUSTOM_EMBEDDED_ENV_PATH="$(BR2_EXTERNAL_HASSOS_PATH)/bootloader/barebox"
 BR2_PACKAGE_HOST_DOSFSTOOLS=y
@@ -77,12 +81,12 @@ BR2_PACKAGE_HOST_MTOOLS=y
 BR2_PACKAGE_HOST_RAUC=y
 BR2_PACKAGE_HASSOS=y
 BR2_PACKAGE_HASSOS_SUPERVISOR="homeassistant/amd64-hassio-supervisor"
-BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="127"
+BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="142"
 BR2_PACKAGE_HASSOS_SUPERVISOR_ARGS="-e HOMEASSISTANT_REPOSITORY=homeassistant/qemux86-64-homeassistant"
 BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE="hassio-supervisor"
 BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE_URL="http://s3.amazonaws.com/hassio-version/apparmor.txt"
 BR2_PACKAGE_HASSOS_CLI="homeassistant/amd64-hassio-cli"
-BR2_PACKAGE_HASSOS_CLI_VERSION="6"
+BR2_PACKAGE_HASSOS_CLI_VERSION="8"
 BR2_PACKAGE_HASSOS_CLI_ARGS="--network=hassio --add-host hassio:172.30.32.2"
 BR2_PACKAGE_HASSOS_CLI_PROFILE="docker-default"
 BR2_PACKAGE_HASSOS_APPARMOR_DIR="supervisor/apparmor"
--- a/buildroot-external/configs/rpi0_w_defconfig
+++ b/buildroot-external/configs/rpi0_w_defconfig
@@ -9,6 +9,8 @@ BR2_TOOLCHAIN_BUILDROOT_GLIBC=y
 BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_4_14=y
 BR2_GCC_VERSION_7_X=y
 BR2_TOOLCHAIN_BUILDROOT_CXX=y
+BR2_BINUTILS_ENABLE_LTO=y
+BR2_GCC_ENABLE_LTO=y
 BR2_TARGET_GENERIC_HOSTNAME="hassio"
 BR2_TARGET_GENERIC_ISSUE="Welcome to HassOS"
 BR2_INIT_SYSTEMD=y
@@ -23,7 +25,7 @@ BR2_LINUX_KERNEL_CUSTOM_GIT=y
 BR2_LINUX_KERNEL_CUSTOM_REPO_URL="https://github.com/raspberrypi/linux"
 BR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="f6878de4d2818c2256b2a340eaeeabfb0b24c71b"
 BR2_LINUX_KERNEL_DEFCONFIG="bcmrpi"
-BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos-4_14.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/kernel.config"
+BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/kernel.config"
 BR2_LINUX_KERNEL_LZ4=y
 BR2_LINUX_KERNEL_DTS_SUPPORT=y
 BR2_LINUX_KERNEL_INTREE_DTS_NAME="bcm2708-rpi-0-w"
@@ -52,6 +54,7 @@ BR2_PACKAGE_BLUEZ5_UTILS=y
 BR2_PACKAGE_BLUEZ5_UTILS_CLIENT=y
 BR2_PACKAGE_DHCP=y
 BR2_PACKAGE_DHCP_CLIENT=y
+BR2_PACKAGE_WIREGUARD=y
 BR2_PACKAGE_DROPBEAR=y
 # BR2_PACKAGE_DROPBEAR_CLIENT is not set
 # BR2_PACKAGE_IFUPDOWN_SCRIPTS is not set
@@ -59,8 +62,10 @@ BR2_PACKAGE_NETWORK_MANAGER=y
 BR2_PACKAGE_NETWORK_MANAGER_MODEM_MANAGER=y
 BR2_PACKAGE_TINI=y
 BR2_PACKAGE_DOCKER_ENGINE=y
+BR2_PACKAGE_DOCKER_CLI=y
 BR2_PACKAGE_RAUC=y
 BR2_PACKAGE_RAUC_NETWORK=y
+BR2_PACKAGE_RNG_TOOLS=y
 # BR2_PACKAGE_SYSTEMD_HWDB is not set
 # BR2_PACKAGE_SYSTEMD_NETWORKD is not set
 BR2_PACKAGE_SYSTEMD_RANDOMSEED=y
@@ -77,7 +82,7 @@ BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2018.07"
 BR2_TARGET_UBOOT_BOARD_DEFCONFIG="rpi_0_w"
 BR2_TARGET_UBOOT_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/bootloader/uboot.config $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/uboot.config"
 BR2_TARGET_UBOOT_BOOT_SCRIPT=y
-BR2_TARGET_UBOOT_BOOT_SCRIPT_SOURCE="$(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/uboot-boot.sh"
+BR2_TARGET_UBOOT_BOOT_SCRIPT_SOURCE="$(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/uboot-boot.ush"
 BR2_PACKAGE_HOST_DOSFSTOOLS=y
 BR2_PACKAGE_HOST_E2FSPROGS=y
 BR2_PACKAGE_HOST_GPTFDISK=y
@@ -85,12 +90,12 @@ BR2_PACKAGE_HOST_MTOOLS=y
 BR2_PACKAGE_HOST_RAUC=y
 BR2_PACKAGE_HASSOS=y
 BR2_PACKAGE_HASSOS_SUPERVISOR="homeassistant/armhf-hassio-supervisor"
-BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="127"
+BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="142"
 BR2_PACKAGE_HASSOS_SUPERVISOR_ARGS="-e HOMEASSISTANT_REPOSITORY=homeassistant/raspberrypi-homeassistant"
 BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE="hassio-supervisor"
 BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE_URL="http://s3.amazonaws.com/hassio-version/apparmor.txt"
 BR2_PACKAGE_HASSOS_CLI="homeassistant/armhf-hassio-cli"
-BR2_PACKAGE_HASSOS_CLI_VERSION="6"
+BR2_PACKAGE_HASSOS_CLI_VERSION="8"
 BR2_PACKAGE_HASSOS_CLI_ARGS="--network=hassio --add-host hassio:172.30.32.2"
 BR2_PACKAGE_HASSOS_CLI_PROFILE="docker-default"
 BR2_PACKAGE_HASSOS_APPARMOR_DIR="supervisor/apparmor"
--- a/buildroot-external/configs/rpi2_defconfig
+++ b/buildroot-external/configs/rpi2_defconfig
@@ -9,6 +9,8 @@ BR2_TOOLCHAIN_BUILDROOT_GLIBC=y
 BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_4_14=y
 BR2_GCC_VERSION_7_X=y
 BR2_TOOLCHAIN_BUILDROOT_CXX=y
+BR2_BINUTILS_ENABLE_LTO=y
+BR2_GCC_ENABLE_LTO=y
 BR2_TARGET_GENERIC_HOSTNAME="hassio"
 BR2_TARGET_GENERIC_ISSUE="Welcome to HassOS"
 BR2_INIT_SYSTEMD=y
@@ -23,7 +25,7 @@ BR2_LINUX_KERNEL_CUSTOM_GIT=y
 BR2_LINUX_KERNEL_CUSTOM_REPO_URL="https://github.com/raspberrypi/linux"
 BR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="f6878de4d2818c2256b2a340eaeeabfb0b24c71b"
 BR2_LINUX_KERNEL_DEFCONFIG="bcm2709"
-BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos-4_14.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/kernel.config"
+BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/kernel.config"
 BR2_LINUX_KERNEL_LZ4=y
 BR2_LINUX_KERNEL_DTS_SUPPORT=y
 BR2_LINUX_KERNEL_INTREE_DTS_NAME="bcm2709-rpi-2-b"
@@ -51,6 +53,7 @@ BR2_PACKAGE_BLUEZ5_UTILS=y
 BR2_PACKAGE_BLUEZ5_UTILS_CLIENT=y
 BR2_PACKAGE_DHCP=y
 BR2_PACKAGE_DHCP_CLIENT=y
+BR2_PACKAGE_WIREGUARD=y
 BR2_PACKAGE_DROPBEAR=y
 # BR2_PACKAGE_DROPBEAR_CLIENT is not set
 # BR2_PACKAGE_IFUPDOWN_SCRIPTS is not set
@@ -58,8 +61,10 @@ BR2_PACKAGE_NETWORK_MANAGER=y
 BR2_PACKAGE_NETWORK_MANAGER_MODEM_MANAGER=y
 BR2_PACKAGE_TINI=y
 BR2_PACKAGE_DOCKER_ENGINE=y
+BR2_PACKAGE_DOCKER_CLI=y
 BR2_PACKAGE_RAUC=y
 BR2_PACKAGE_RAUC_NETWORK=y
+BR2_PACKAGE_RNG_TOOLS=y
 # BR2_PACKAGE_SYSTEMD_HWDB is not set
 # BR2_PACKAGE_SYSTEMD_NETWORKD is not set
 BR2_PACKAGE_SYSTEMD_RANDOMSEED=y
@@ -76,7 +81,7 @@ BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2018.07"
 BR2_TARGET_UBOOT_BOARD_DEFCONFIG="rpi_2"
 BR2_TARGET_UBOOT_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/bootloader/uboot.config $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/uboot.config"
 BR2_TARGET_UBOOT_BOOT_SCRIPT=y
-BR2_TARGET_UBOOT_BOOT_SCRIPT_SOURCE="$(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/uboot-boot.sh"
+BR2_TARGET_UBOOT_BOOT_SCRIPT_SOURCE="$(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/uboot-boot.ush"
 BR2_PACKAGE_HOST_DOSFSTOOLS=y
 BR2_PACKAGE_HOST_E2FSPROGS=y
 BR2_PACKAGE_HOST_GPTFDISK=y
@@ -84,12 +89,12 @@ BR2_PACKAGE_HOST_MTOOLS=y
 BR2_PACKAGE_HOST_RAUC=y
 BR2_PACKAGE_HASSOS=y
 BR2_PACKAGE_HASSOS_SUPERVISOR="homeassistant/armhf-hassio-supervisor"
-BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="127"
+BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="142"
 BR2_PACKAGE_HASSOS_SUPERVISOR_ARGS="-e HOMEASSISTANT_REPOSITORY=homeassistant/raspberrypi2-homeassistant"
 BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE="hassio-supervisor"
 BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE_URL="http://s3.amazonaws.com/hassio-version/apparmor.txt"
 BR2_PACKAGE_HASSOS_CLI="homeassistant/armhf-hassio-cli"
-BR2_PACKAGE_HASSOS_CLI_VERSION="6"
+BR2_PACKAGE_HASSOS_CLI_VERSION="8"
 BR2_PACKAGE_HASSOS_CLI_ARGS="--network=hassio --add-host hassio:172.30.32.2"
 BR2_PACKAGE_HASSOS_CLI_PROFILE="docker-default"
 BR2_PACKAGE_HASSOS_APPARMOR_DIR="supervisor/apparmor"
--- a/buildroot-external/configs/rpi3_64_defconfig
+++ b/buildroot-external/configs/rpi3_64_defconfig
@@ -9,6 +9,8 @@ BR2_TOOLCHAIN_BUILDROOT_GLIBC=y
 BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_4_14=y
 BR2_GCC_VERSION_7_X=y
 BR2_TOOLCHAIN_BUILDROOT_CXX=y
+BR2_BINUTILS_ENABLE_LTO=y
+BR2_GCC_ENABLE_LTO=y
 BR2_TARGET_GENERIC_HOSTNAME="hassio"
 BR2_TARGET_GENERIC_ISSUE="Welcome to HassOS"
 BR2_INIT_SYSTEMD=y
@@ -23,7 +25,7 @@ BR2_LINUX_KERNEL_CUSTOM_GIT=y
 BR2_LINUX_KERNEL_CUSTOM_REPO_URL="https://github.com/raspberrypi/linux"
 BR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="f6878de4d2818c2256b2a340eaeeabfb0b24c71b"
 BR2_LINUX_KERNEL_DEFCONFIG="bcmrpi3"
-BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos-4_14.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/kernel.config"
+BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/kernel.config"
 BR2_LINUX_KERNEL_LZ4=y
 BR2_LINUX_KERNEL_DTS_SUPPORT=y
 BR2_LINUX_KERNEL_INTREE_DTS_NAME="broadcom/bcm2710-rpi-3-b broadcom/bcm2837-rpi-3-b broadcom/bcm2710-rpi-3-b-plus"
@@ -52,6 +54,7 @@ BR2_PACKAGE_BLUEZ5_UTILS=y
 BR2_PACKAGE_BLUEZ5_UTILS_CLIENT=y
 BR2_PACKAGE_DHCP=y
 BR2_PACKAGE_DHCP_CLIENT=y
+BR2_PACKAGE_WIREGUARD=y
 BR2_PACKAGE_DROPBEAR=y
 # BR2_PACKAGE_DROPBEAR_CLIENT is not set
 # BR2_PACKAGE_IFUPDOWN_SCRIPTS is not set
@@ -59,8 +62,10 @@ BR2_PACKAGE_NETWORK_MANAGER=y
 BR2_PACKAGE_NETWORK_MANAGER_MODEM_MANAGER=y
 BR2_PACKAGE_TINI=y
 BR2_PACKAGE_DOCKER_ENGINE=y
+BR2_PACKAGE_DOCKER_CLI=y
 BR2_PACKAGE_RAUC=y
 BR2_PACKAGE_RAUC_NETWORK=y
+BR2_PACKAGE_RNG_TOOLS=y
 # BR2_PACKAGE_SYSTEMD_HWDB is not set
 # BR2_PACKAGE_SYSTEMD_NETWORKD is not set
 BR2_PACKAGE_SYSTEMD_RANDOMSEED=y
@@ -77,7 +82,7 @@ BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2018.07"
 BR2_TARGET_UBOOT_BOARD_DEFCONFIG="rpi_3"
 BR2_TARGET_UBOOT_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/bootloader/uboot.config $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/uboot.config"
 BR2_TARGET_UBOOT_BOOT_SCRIPT=y
-BR2_TARGET_UBOOT_BOOT_SCRIPT_SOURCE="$(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/rpi3-64/uboot-boot.sh"
+BR2_TARGET_UBOOT_BOOT_SCRIPT_SOURCE="$(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/rpi3-64/uboot-boot.ush"
 BR2_PACKAGE_HOST_DOSFSTOOLS=y
 BR2_PACKAGE_HOST_E2FSPROGS=y
 BR2_PACKAGE_HOST_GPTFDISK=y
@@ -85,12 +90,12 @@ BR2_PACKAGE_HOST_MTOOLS=y
 BR2_PACKAGE_HOST_RAUC=y
 BR2_PACKAGE_HASSOS=y
 BR2_PACKAGE_HASSOS_SUPERVISOR="homeassistant/aarch64-hassio-supervisor"
-BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="127"
+BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="142"
 BR2_PACKAGE_HASSOS_SUPERVISOR_ARGS="-e HOMEASSISTANT_REPOSITORY=homeassistant/raspberrypi3-64-homeassistant"
 BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE="hassio-supervisor"
 BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE_URL="http://s3.amazonaws.com/hassio-version/apparmor.txt"
 BR2_PACKAGE_HASSOS_CLI="homeassistant/aarch64-hassio-cli"
-BR2_PACKAGE_HASSOS_CLI_VERSION="6"
+BR2_PACKAGE_HASSOS_CLI_VERSION="8"
 BR2_PACKAGE_HASSOS_CLI_ARGS="--network=hassio --add-host hassio:172.30.32.2"
 BR2_PACKAGE_HASSOS_CLI_PROFILE="docker-default"
 BR2_PACKAGE_HASSOS_APPARMOR_DIR="supervisor/apparmor"
--- a/buildroot-external/configs/rpi3_defconfig
+++ b/buildroot-external/configs/rpi3_defconfig
@@ -9,6 +9,8 @@ BR2_TOOLCHAIN_BUILDROOT_GLIBC=y
 BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_4_14=y
 BR2_GCC_VERSION_7_X=y
 BR2_TOOLCHAIN_BUILDROOT_CXX=y
+BR2_BINUTILS_ENABLE_LTO=y
+BR2_GCC_ENABLE_LTO=y
 BR2_TARGET_GENERIC_HOSTNAME="hassio"
 BR2_TARGET_GENERIC_ISSUE="Welcome to HassOS"
 BR2_INIT_SYSTEMD=y
@@ -23,7 +25,7 @@ BR2_LINUX_KERNEL_CUSTOM_GIT=y
 BR2_LINUX_KERNEL_CUSTOM_REPO_URL="https://github.com/raspberrypi/linux"
 BR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="f6878de4d2818c2256b2a340eaeeabfb0b24c71b"
 BR2_LINUX_KERNEL_DEFCONFIG="bcm2709"
-BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos-4_14.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/kernel.config"
+BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/kernel.config"
 BR2_LINUX_KERNEL_LZ4=y
 BR2_LINUX_KERNEL_DTS_SUPPORT=y
 BR2_LINUX_KERNEL_INTREE_DTS_NAME="bcm2710-rpi-3-b bcm2710-rpi-3-b-plus bcm2710-rpi-cm3"
@@ -52,6 +54,7 @@ BR2_PACKAGE_BLUEZ5_UTILS=y
 BR2_PACKAGE_BLUEZ5_UTILS_CLIENT=y
 BR2_PACKAGE_DHCP=y
 BR2_PACKAGE_DHCP_CLIENT=y
+BR2_PACKAGE_WIREGUARD=y
 BR2_PACKAGE_DROPBEAR=y
 # BR2_PACKAGE_DROPBEAR_CLIENT is not set
 # BR2_PACKAGE_IFUPDOWN_SCRIPTS is not set
@@ -59,8 +62,10 @@ BR2_PACKAGE_NETWORK_MANAGER=y
 BR2_PACKAGE_NETWORK_MANAGER_MODEM_MANAGER=y
 BR2_PACKAGE_TINI=y
 BR2_PACKAGE_DOCKER_ENGINE=y
+BR2_PACKAGE_DOCKER_CLI=y
 BR2_PACKAGE_RAUC=y
 BR2_PACKAGE_RAUC_NETWORK=y
+BR2_PACKAGE_RNG_TOOLS=y
 # BR2_PACKAGE_SYSTEMD_HWDB is not set
 # BR2_PACKAGE_SYSTEMD_NETWORKD is not set
 BR2_PACKAGE_SYSTEMD_RANDOMSEED=y
@@ -77,7 +82,7 @@ BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2018.07"
 BR2_TARGET_UBOOT_BOARD_DEFCONFIG="rpi_3_32b"
 BR2_TARGET_UBOOT_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/bootloader/uboot.config $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/uboot.config"
 BR2_TARGET_UBOOT_BOOT_SCRIPT=y
-BR2_TARGET_UBOOT_BOOT_SCRIPT_SOURCE="$(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/uboot-boot.sh"
+BR2_TARGET_UBOOT_BOOT_SCRIPT_SOURCE="$(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/uboot-boot.ush"
 BR2_PACKAGE_HOST_DOSFSTOOLS=y
 BR2_PACKAGE_HOST_E2FSPROGS=y
 BR2_PACKAGE_HOST_GPTFDISK=y
@@ -85,12 +90,12 @@ BR2_PACKAGE_HOST_MTOOLS=y
 BR2_PACKAGE_HOST_RAUC=y
 BR2_PACKAGE_HASSOS=y
 BR2_PACKAGE_HASSOS_SUPERVISOR="homeassistant/armhf-hassio-supervisor"
-BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="127"
+BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="142"
 BR2_PACKAGE_HASSOS_SUPERVISOR_ARGS="-e HOMEASSISTANT_REPOSITORY=homeassistant/raspberrypi3-homeassistant"
 BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE="hassio-supervisor"
 BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE_URL="http://s3.amazonaws.com/hassio-version/apparmor.txt"
 BR2_PACKAGE_HASSOS_CLI="homeassistant/armhf-hassio-cli"
-BR2_PACKAGE_HASSOS_CLI_VERSION="6"
+BR2_PACKAGE_HASSOS_CLI_VERSION="8"
 BR2_PACKAGE_HASSOS_CLI_ARGS="--network=hassio --add-host hassio:172.30.32.2"
 BR2_PACKAGE_HASSOS_CLI_PROFILE="docker-default"
 BR2_PACKAGE_HASSOS_APPARMOR_DIR="supervisor/apparmor"
--- a/buildroot-external/configs/rpi_defconfig
+++ b/buildroot-external/configs/rpi_defconfig
@@ -9,6 +9,8 @@ BR2_TOOLCHAIN_BUILDROOT_GLIBC=y
 BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_4_14=y
 BR2_GCC_VERSION_7_X=y
 BR2_TOOLCHAIN_BUILDROOT_CXX=y
+BR2_BINUTILS_ENABLE_LTO=y
+BR2_GCC_ENABLE_LTO=y
 BR2_TARGET_GENERIC_HOSTNAME="hassio"
 BR2_TARGET_GENERIC_ISSUE="Welcome to HassOS"
 BR2_INIT_SYSTEMD=y
@@ -23,7 +25,7 @@ BR2_LINUX_KERNEL_CUSTOM_GIT=y
 BR2_LINUX_KERNEL_CUSTOM_REPO_URL="https://github.com/raspberrypi/linux"
 BR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="f6878de4d2818c2256b2a340eaeeabfb0b24c71b"
 BR2_LINUX_KERNEL_DEFCONFIG="bcmrpi"
-BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos-4_14.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/kernel.config"
+BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/kernel.config"
 BR2_LINUX_KERNEL_LZ4=y
 BR2_LINUX_KERNEL_DTS_SUPPORT=y
 BR2_LINUX_KERNEL_INTREE_DTS_NAME="bcm2708-rpi-b bcm2708-rpi-b-plus bcm2708-rpi-cm"
@@ -51,6 +53,7 @@ BR2_PACKAGE_BLUEZ5_UTILS=y
 BR2_PACKAGE_BLUEZ5_UTILS_CLIENT=y
 BR2_PACKAGE_DHCP=y
 BR2_PACKAGE_DHCP_CLIENT=y
+BR2_PACKAGE_WIREGUARD=y
 BR2_PACKAGE_DROPBEAR=y
 # BR2_PACKAGE_DROPBEAR_CLIENT is not set
 # BR2_PACKAGE_IFUPDOWN_SCRIPTS is not set
@@ -58,8 +61,10 @@ BR2_PACKAGE_NETWORK_MANAGER=y
 BR2_PACKAGE_NETWORK_MANAGER_MODEM_MANAGER=y
 BR2_PACKAGE_TINI=y
 BR2_PACKAGE_DOCKER_ENGINE=y
+BR2_PACKAGE_DOCKER_CLI=y
 BR2_PACKAGE_RAUC=y
 BR2_PACKAGE_RAUC_NETWORK=y
+BR2_PACKAGE_RNG_TOOLS=y
 # BR2_PACKAGE_SYSTEMD_HWDB is not set
 # BR2_PACKAGE_SYSTEMD_NETWORKD is not set
 BR2_PACKAGE_SYSTEMD_RANDOMSEED=y
@@ -76,7 +81,7 @@ BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2018.07"
 BR2_TARGET_UBOOT_BOARD_DEFCONFIG="rpi"
 BR2_TARGET_UBOOT_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/bootloader/uboot.config $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/uboot.config"
 BR2_TARGET_UBOOT_BOOT_SCRIPT=y
-BR2_TARGET_UBOOT_BOOT_SCRIPT_SOURCE="$(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/uboot-boot.sh"
+BR2_TARGET_UBOOT_BOOT_SCRIPT_SOURCE="$(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/uboot-boot.ush"
 BR2_PACKAGE_HOST_DOSFSTOOLS=y
 BR2_PACKAGE_HOST_E2FSPROGS=y
 BR2_PACKAGE_HOST_GPTFDISK=y
@@ -84,12 +89,12 @@ BR2_PACKAGE_HOST_MTOOLS=y
 BR2_PACKAGE_HOST_RAUC=y
 BR2_PACKAGE_HASSOS=y
 BR2_PACKAGE_HASSOS_SUPERVISOR="homeassistant/armhf-hassio-supervisor"
-BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="127"
+BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="142"
 BR2_PACKAGE_HASSOS_SUPERVISOR_ARGS="-e HOMEASSISTANT_REPOSITORY=homeassistant/raspberrypi-homeassistant"
 BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE="hassio-supervisor"
 BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE_URL="http://s3.amazonaws.com/hassio-version/apparmor.txt"
 BR2_PACKAGE_HASSOS_CLI="homeassistant/armhf-hassio-cli"
-BR2_PACKAGE_HASSOS_CLI_VERSION="6"
+BR2_PACKAGE_HASSOS_CLI_VERSION="8"
 BR2_PACKAGE_HASSOS_CLI_ARGS="--network=hassio --add-host hassio:172.30.32.2"
 BR2_PACKAGE_HASSOS_CLI_PROFILE="docker-default"
 BR2_PACKAGE_HASSOS_APPARMOR_DIR="supervisor/apparmor"
--- a/buildroot-external/configs/tinker_defconfig
+++ b/buildroot-external/configs/tinker_defconfig
@@ -9,6 +9,8 @@ BR2_TOOLCHAIN_BUILDROOT_GLIBC=y
 BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_4_14=y
 BR2_GCC_VERSION_7_X=y
 BR2_TOOLCHAIN_BUILDROOT_CXX=y
+BR2_BINUTILS_ENABLE_LTO=y
+BR2_GCC_ENABLE_LTO=y
 BR2_TARGET_GENERIC_HOSTNAME="hassio"
 BR2_TARGET_GENERIC_ISSUE="Welcome to HassOS"
 BR2_INIT_SYSTEMD=y
@@ -23,7 +25,7 @@ BR2_LINUX_KERNEL_CUSTOM_VERSION=y
 BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="4.14.82"
 BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y
 BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="$(BR2_EXTERNAL_HASSOS_PATH)/board/asus/tinker/kernel.config"
-BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos-4_14.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config"
+BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config"
 BR2_LINUX_KERNEL_LZ4=y
 BR2_LINUX_KERNEL_DTS_SUPPORT=y
 BR2_LINUX_KERNEL_INTREE_DTS_NAME="rk3288-tinker"
@@ -52,6 +54,7 @@ BR2_PACKAGE_BLUEZ5_UTILS=y
 BR2_PACKAGE_BLUEZ5_UTILS_CLIENT=y
 BR2_PACKAGE_DHCP=y
 BR2_PACKAGE_DHCP_CLIENT=y
+BR2_PACKAGE_WIREGUARD=y
 BR2_PACKAGE_DROPBEAR=y
 # BR2_PACKAGE_DROPBEAR_CLIENT is not set
 # BR2_PACKAGE_IFUPDOWN_SCRIPTS is not set
@@ -59,8 +62,10 @@ BR2_PACKAGE_NETWORK_MANAGER=y
 BR2_PACKAGE_NETWORK_MANAGER_MODEM_MANAGER=y
 BR2_PACKAGE_TINI=y
 BR2_PACKAGE_DOCKER_ENGINE=y
+BR2_PACKAGE_DOCKER_CLI=y
 BR2_PACKAGE_RAUC=y
 BR2_PACKAGE_RAUC_NETWORK=y
+BR2_PACKAGE_RNG_TOOLS=y
 # BR2_PACKAGE_SYSTEMD_HWDB is not set
 # BR2_PACKAGE_SYSTEMD_NETWORKD is not set
 BR2_PACKAGE_SYSTEMD_RANDOMSEED=y
@@ -81,7 +86,7 @@ BR2_TARGET_UBOOT_FORMAT_DTB_IMG=y
 BR2_TARGET_UBOOT_SPL=y
 BR2_TARGET_UBOOT_SPL_NAME="spl/u-boot-spl-dtb.bin"
 BR2_TARGET_UBOOT_BOOT_SCRIPT=y
-BR2_TARGET_UBOOT_BOOT_SCRIPT_SOURCE="$(BR2_EXTERNAL_HASSOS_PATH)/board/asus/tinker/uboot-boot.sh"
+BR2_TARGET_UBOOT_BOOT_SCRIPT_SOURCE="$(BR2_EXTERNAL_HASSOS_PATH)/board/asus/tinker/uboot-boot.ush"
 BR2_PACKAGE_HOST_DOSFSTOOLS=y
 BR2_PACKAGE_HOST_E2FSPROGS=y
 BR2_PACKAGE_HOST_GPTFDISK=y
@@ -89,12 +94,12 @@ BR2_PACKAGE_HOST_MTOOLS=y
 BR2_PACKAGE_HOST_RAUC=y
 BR2_PACKAGE_HASSOS=y
 BR2_PACKAGE_HASSOS_SUPERVISOR="homeassistant/armhf-hassio-supervisor"
-BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="127"
+BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="142"
 BR2_PACKAGE_HASSOS_SUPERVISOR_ARGS="-e HOMEASSISTANT_REPOSITORY=homeassistant/tinker-homeassistant"
 BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE="hassio-supervisor"
 BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE_URL="http://s3.amazonaws.com/hassio-version/apparmor.txt"
 BR2_PACKAGE_HASSOS_CLI="homeassistant/armhf-hassio-cli"
-BR2_PACKAGE_HASSOS_CLI_VERSION="6"
+BR2_PACKAGE_HASSOS_CLI_VERSION="8"
 BR2_PACKAGE_HASSOS_CLI_ARGS="--network=hassio --add-host hassio:172.30.32.2"
 BR2_PACKAGE_HASSOS_CLI_PROFILE="docker-default"
 BR2_PACKAGE_HASSOS_APPARMOR_DIR="supervisor/apparmor"
--- a/buildroot-external/kernel/device-support.config
+++ b/buildroot-external/kernel/device-support.config
@@ -4,5 +4,6 @@ CONFIG_USB_SERIAL_SIMPLE=m
 CONFIG_USB_SERIAL_CP210X=m
 CONFIG_USB_SERIAL_FTDI_SIO=m
 CONFIG_USB_SERIAL_PL2303=m
+CONFIG_USB_SERIAL_CH341=m
 CONFIG_USB_ACM=m

--- a/buildroot-external/kernel/hassos-4_14.config
+++ b/buildroot-external/kernel/hassos-4_14.config
@@ -1,9 +1,3 @@
-CONFIG_KERNEL_LZ4=y
-CONFIG_CMDLINE=""
-
-CONFIG_ZRAM=y
-CONFIG_ZSMALLOC=y
-
 CONFIG_POSIX_MQUEUE=y
 CONFIG_CFQ_GROUP_IOSCHED=y
 CONFIG_CFS_BANDWIDTH=y
@@ -12,6 +6,7 @@ CONFIG_RT_GROUP_SCHED=y
 CONFIG_NET_SCHED=y

 CONFIG_CGROUPS=y
+CONFIG_HUGETLB_PAGE=y
 CONFIG_BLK_CGROUP=y
 CONFIG_BLK_DEV_THROTTLING=y
 CONFIG_CGROUP_SCHED=y
@@ -21,6 +16,7 @@ CONFIG_CGROUP_HUGETLB=y
 CONFIG_CGROUP_DEVICE=y
 CONFIG_CGROUP_CPUACCT=y
 CONFIG_CGROUP_PERF=y
+CONFIG_CGROUP_HUGETLB=y
 CONFIG_NET_CLS_CGROUP=y
 CONFIG_CGROUP_NET_PRIO=y
 CONFIG_CGROUP_BPF=y
@@ -36,19 +32,15 @@ CONFIG_IPC_NS=y
 CONFIG_UTS_NS=y

 CONFIG_NETDEVICES=y
-CONFIG_DUMMY=y
-CONFIG_MACVLAN=y
-CONFIG_IPVLAN=y
-CONFIG_VXLAN=y
-
-CONFIG_VLAN_8021Q=m
-CONFIG_VLAN_8021Q_GVRP=y
-CONFIG_VLAN_8021Q_MVRP=y
+CONFIG_DUMMY=m
+CONFIG_MACVLAN=m
+CONFIG_IPVLAN=m
+CONFIG_VXLAN=m

 CONFIG_INET=y
 CONFIG_IPV6=y
-CONFIG_INET_ESP=y
-CONFIG_INET_XFRM_MODE_TRANSPORT=y
+CONFIG_INET_ESP=m
+CONFIG_INET_XFRM_MODE_TRANSPORT=m
 CONFIG_NETCONSOLE=y
 CONFIG_VETH=y
 CONFIG_NETFILTER=y
@@ -56,8 +48,6 @@ CONFIG_NF_CONNTRACK=y
 CONFIG_NF_NAT=y
 CONFIG_NF_NAT_NEEDED=y
 CONFIG_NF_CONNTRACK_IPV4=y
-CONFIG_NF_CONNTRACK_FTP=y
-CONFIG_NF_CONNTRACK_TFTP=y
 CONFIG_NETFILTER_ADVANCED=y
 CONFIG_NETFILTER_XT_MATCH_ADDRTYPE=y
 CONFIG_NETFILTER_XT_MATCH_CONNTRACK=y
@@ -69,40 +59,20 @@ CONFIG_IP_NF_IPTABLES=y
 CONFIG_IP_NF_FILTER=y
 CONFIG_IP_NF_NAT=y
 CONFIG_IP_NF_TARGET_MASQUERADE=y
+CONFIG_IP_NF_TARGET_REDIRECT=y
 CONFIG_BRIDGE=y
 CONFIG_BRIDGE_NETFILTER=y
-CONFIG_XFRM=y
-CONFIG_XFRM_USER=y
-CONFIG_XFRM_ALGO=y
+CONFIG_XFRM=m
+CONFIG_XFRM_USER=m
+CONFIG_XFRM_ALGO=m
 CONFIG_NET_L3_MASTER_DEV=y

-CONFIG_MISC_FILESYSTEMS=y
-CONFIG_BLOCK=y
 CONFIG_EXT4_FS=y
 CONFIG_EXT4_FS_POSIX_ACL=y
 CONFIG_EXT4_FS_SECURITY=y
 CONFIG_OVERLAY_FS=y
-CONFIG_MSDOS_FS=y
-CONFIG_VFAT_FS=y
-CONFIG_SQUASHFS=y
-CONFIG_SQUASHFS_XATTR=y
-CONFIG_SQUASHFS_LZ4=y

-# CONFIG_SECCOMP is not set
-CONFIG_SECURITY=y
-CONFIG_SECURITY_APPARMOR=y
-CONFIG_SECURITY_APPARMOR_BOOTPARAM_VALUE=1
-CONFIG_KEYS=y
-
-CONFIG_CRYPTO_CCM=y
-CONFIG_CRYPTO_GCM=y
-CONFIG_CRYPTO_CMAC=y
-CONFIG_CRYPTO_ARC4=y
-CONFIG_CRYPTO_LZ4=y
-
-CONFIG_PARTITION_ADVANCED=y
-CONFIG_EFI_PARTITION=y
-
-# CONFIG_LOGO is not set
-# CONFIG_VIRTUALIZATION is not set
-# CONFIG_DEBUG_STACK_USAGE is not set
+CONFIG_CRYPTO_CCM=m
+CONFIG_CRYPTO_GCM=m
+CONFIG_CRYPTO_CMAC=m
+CONFIG_CRYPTO_ARC4=m
--- a/buildroot-external/kernel/hassos.config
+++ b/buildroot-external/kernel/hassos.config
@@ -0,0 +1,35 @@
+CONFIG_KERNEL_LZ4=y
+CONFIG_CMDLINE=""
+
+CONFIG_ZRAM=y
+CONFIG_ZSMALLOC=y
+
+CONFIG_MISC_FILESYSTEMS=y
+CONFIG_BLOCK=y
+CONFIG_EXT4_FS=y
+CONFIG_MSDOS_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_SQUASHFS=y
+CONFIG_SQUASHFS_XATTR=y
+CONFIG_SQUASHFS_LZ4=y
+
+# CONFIG_SECCOMP is not set
+CONFIG_AUDIT=y
+CONFIG_SECURITY=y
+CONFIG_SECURITY_APPARMOR=y
+
+CONFIG_CRYPTO=y
+CONFIG_CRYPTO_LZ4=y
+
+CONFIG_PARTITION_ADVANCED=y
+CONFIG_EFI_PARTITION=y
+CONFIG_MSDOS_PARTITION=y
+
+# CONFIG_LOGO is not set
+# CONFIG_VIRTUALIZATION is not set
+# CONFIG_DEBUG_STACK_USAGE is not set
+# CONFIG_BTRFS_FS is not set
+
+CONFIG_VLAN_8021Q=m
+CONFIG_VLAN_8021Q_GVRP=y
+CONFIG_VLAN_8021Q_MVRP=y
--- a/Show More
+++ b/Show More
Author	SHA1	Message	Date
Pascal Vizeli	0973ea8130	Bump version 2.8 stable	2019-02-03 15:59:24 +00:00
Pascal Vizeli	7abbbbab22	Odroid XU4: Use ondemand (#341 )	2019-02-03 15:58:26 +00:00
Pascal Vizeli	32d4b18c1f	Build: speedup uboot kernel load (#338 )	2019-02-03 15:58:16 +00:00
Ryan Bray	8f8817cacd	OdroidC2: fix long-running ethernet issues (#337 )	2019-02-03 15:58:08 +00:00
Pascal Vizeli	abdf83c17d	Bump version to 2.7 (RC)	2019-01-28 21:05:57 +01:00
Pascal Vizeli	69d1f39bc8	OVA: update kernel 4.19.18 (#335 )	2019-01-28 20:05:00 +00:00
Pascal Vizeli	88dd3d31aa	OVA: fix openvmtools load (#334 )	2019-01-28 20:04:50 +00:00
Bryan Berg	cb5343a6fa	Migrate from LABEL= to /dev/disk/by-label/* (#318 )	2019-01-28 20:04:35 +00:00
Simon Holzmayer	b403b7a73e	Fix modules import from USB-Stick (#331 )	2019-01-28 20:04:25 +00:00
Pascal Vizeli	8e56d8b8c8	Bump version to 2.6 (RC)	2019-01-18 00:15:08 +01:00
Pascal Vizeli	c37a6d4c8c	Merge pull request #323 from home-assistant/dev Prepare new release tree	2019-01-18 00:11:34 +01:00
Pascal Vizeli	d677e2d5b2	OS: update supervisor to version 142	2019-01-17 23:05:49 +00:00
Pascal Vizeli	2d44748080	OS: update cli to version 8	2019-01-17 23:05:18 +00:00
Pascal Vizeli	b959d9c805	OS: update AppArmor to 2.13.2 (#325 )	2019-01-18 00:02:40 +01:00
Pascal Vizeli	5e9ba3bb7a	OS: Add kernel support for wireguard (#324 )	2019-01-17 21:49:52 +01:00
Ryan Bray	3d91ac2374	Odroid-C2: Updating to 4.19 kernel (#321 ) * Odroid-C2: Updating to 4.19 kernel * Fix and tested config.	2019-01-17 12:16:13 +01:00
Pascal Vizeli	b0f95fcaec	Update deployment.md	2019-01-17 11:27:38 +01:00
Ryan Bray	fffa24ed1e	Odroid-XU4: Initial commit (#303 )	2019-01-17 11:02:47 +01:00
Jasper van der Neut - Stulen	07bec45d8a	NUC: Enable bluetooth support (#320 ) * NUC: Enable bluetooth support Enable kernel support for the intel bt-wifi-combo devices and usb bluetooth modules. This will make Bluetooth and Bluetooth LE device trackers work. * BUILD: Make bluetooth kernel config the same for all boards. The defconfig for a board may include more drivers, but this set should be enough to get device trackers working. BLE support is also enabled. * Revert "BUILD: Make bluetooth kernel config the same for all boards." This reverts commit `58f9b7c651`.	2019-01-14 23:55:35 +01:00
Jasper van der Neut - Stulen	5835b6a683	OS: Fix unmount of busy mounts (#319 ) dhclient and systemd-journald will be running during shutdown and are only killed in the final shutdown fase. Unmounting the directories they use will fail. Use lazy unmouting to fix this.	2019-01-13 21:04:57 +01:00
Pascal Vizeli	2d870984e2	Merge pull request #312 from home-assistant/dev Release 2.5	2019-01-09 22:23:28 +01:00
Alastair D'Silva	e858c774d2	Opi prime updates (#315 ) * Backport support for Linux 4.19 Signed-off-by: Alastair D'Silva <alastair@d-silva.org> * OPI: Update Orange Pi Prime config to use Linux 4.19 Signed-off-by: Alastair D'Silva <alastair@d-silva.org> * OPI: Enable I2C0 on the Orange Pi Prime Signed-off-by: Alastair D'Silva <alastair@d-silva.org> * OPI: Enable GPIO via sysfs Signed-off-by: Alastair D'Silva <alastair@d-silva.org>	2019-01-09 16:27:20 +01:00
Jasper van der Neut - Stulen	4aa07960d8	BUILD: Build with make (#306 ) * Use a Makefile to configure,build or clean the images. * Update docs * Remove old build script.	2019-01-04 22:01:43 +01:00
Jasper van der Neut - Stulen	5fc32d2eb7	OS: Run ash as login shell, so $PATH is set correctly. (#305 )	2019-01-04 22:00:03 +01:00
Pascal Vizeli	2be8aecfbd	OS: Fix docker-init (#302 )	2019-01-03 21:47:44 +01:00
Pascal Vizeli	e0e87141c6	Build: Enable LTO for GCC/Binutils (#301 ) * Build: Enable LTO for GCC/Binutils * Update odroid_c2_defconfig * Update ova_defconfig * Update rpi0_w_defconfig * Update rpi2_defconfig * Update rpi3_64_defconfig * Update rpi3_defconfig * Update rpi_defconfig * Update tinker_defconfig	2019-01-01 15:46:33 +01:00
Pascal Vizeli	76553bf984	OPI: Fix kernel config path	2019-01-01 15:17:03 +01:00
Alastair D'Silva	96e7e57fc4	Add support for the Orange Pi Prime (#298 ) * Add support for the Orange Pi Prime Signed-off-by: Alastair D'Silva <alastair@d-silva.org> * Update opi_prime_defconfig * Delete kernel.config * Update opi_prime_defconfig	2018-12-31 11:58:41 +01:00
Pascal Vizeli	26d427ef1d	Update README.md	2018-12-31 11:18:22 +01:00
Pascal Vizeli	f7eb215016	Build: Update buildroot 2018-11.1 (#300 ) * Build: Update buildroot 2018-11.1 * Add cli to image	2018-12-31 02:32:21 +01:00
Jasper van der Neut - Stulen	8810b0409c	OS: Make use of hardware rng devices (#299 )	2018-12-30 23:04:01 +01:00
Pascal Vizeli	5adc9d0080	Kernel: Add support for RFLink (#297 )	2018-12-29 22:25:57 +01:00
Jasper van der Neut - Stulen	59dba51f38	OVA: Make image bootable from virtio disk (#296 )	2018-12-29 18:24:02 +01:00
Jasper van der Neut - Stulen	f711123582	Documentation: Add for intel-nuc board (#295 ) Documentation: Add for intel-nuc board	2018-12-28 22:38:50 +01:00
Pascal Vizeli	3cbe6c9816	Bump version to 2.5	2018-12-28 17:42:33 +01:00
Pascal Vizeli	a5aaf01042	Build: Split kernel files for maintaining (#294 ) * Build: Split kernel files for maintaining * Update hassos.config * Update odroid_c2_defconfig * Update ova_defconfig * Update rpi0_w_defconfig * Update rpi2_defconfig * Update rpi3_64_defconfig * Update rpi_defconfig * Update tinker_defconfig * Update hassos.config * Update intel_nuc_defconfig * Delete misc.config * Update hassos.config * Update intel_nuc_defconfig * Update odroid_c2_defconfig * Update ova_defconfig * Update rpi0_w_defconfig * Update rpi2_defconfig * Update rpi3_64_defconfig * Update rpi3_defconfig * Update rpi_defconfig * Update tinker_defconfig * Update hassos.config	2018-12-28 17:34:30 +01:00
Pascal Vizeli	934b276a3c	Revert "Build: Split kernel files for maintaining (#291 )" (#293 ) This reverts commit `615daddbf6`.	2018-12-28 14:16:31 +01:00
Pascal Vizeli	615daddbf6	Build: Split kernel files for maintaining (#291 ) * Build: Split kernel files for maintaining * Update hassos.config * Update odroid_c2_defconfig * Update ova_defconfig * Update rpi0_w_defconfig * Update rpi2_defconfig * Update rpi3_64_defconfig * Update rpi_defconfig * Update tinker_defconfig * Update hassos.config * Update intel_nuc_defconfig	2018-12-28 14:15:22 +01:00
Jasper van der Neut - Stulen	9bc61e6318	Intel NUC support (#288 ) * Add hassos configuration for intel-nuc: * Cloned from ova config * Use default amd64 kernel config * Add support for Intel IGB type nics * Add rng-tools for better random * Build with iwlwifi module & firmware (only newer modules with iwlmvm firmware) * Include firmware for 915, which should improve power efficiency. Build display and audio as a module to make it all work. * Add intel_nuc to build script. * Change directory structure as proposed by @pvizeli * * Fix paths * Remove unused patch directory * Unduplicate barebox config.	2018-12-28 11:09:24 +01:00
Pascal Vizeli	a860374d64	Merge pull request #285 from home-assistant/dev Release 2.4	2018-12-18 21:21:11 +01:00
Justin Otherguy	42c2f88588	Build: Replace "~/hassos-cache" with "$HOME/hassos-cache" (#281 ) Build: Replace "~/hassos-cache" with "$HOME/hassos-cache"	2018-12-10 23:54:50 +01:00
Pascal Vizeli	2107a6b64d	Build: Add patch source to tinker (#278 )	2018-12-06 10:20:42 +01:00
Ryan Bray	75e721e77e	OdroidC2: Updating Kernel (#277 )	2018-12-06 10:09:16 +01:00
Pascal Vizeli	fd707ba270	Build: Fix bug with glibc dt-utils (#275 ) * Fix bug with glibc dt-utils * Fix openvmtools * Fix openvmtools p2	2018-12-05 07:33:15 +01:00
Pascal Vizeli	76fad70ebe	Update buildroot 2018.11 (#274 )	2018-12-02 16:25:21 +01:00
Pascal Vizeli	d6ad746fda	Documentation: maintain local changes for ntp (#271 )	2018-11-30 17:00:56 +01:00
Pascal Vizeli	60c9013535	Travis (#269 ) * Update build-all.sh * Delete ovf-create.sh * Update patches.sh * Update hdd-image.sh * Create .travis.yml * Update hdd-image.sh * Update hdd-image.sh * Update hdd-image.sh * Update hdd-image.sh * Update ota.sh * Update post-build.sh * Update post-image.sh * Update rauc.sh * Update rootfs-layer.sh * Update hassos-cli * Update hassos-supervisor * Update hassos-config * Update hassos-apparmor * Update hassos-expand * Update hassos-persists-journald * Update hassos-rate * Update hassos-hook.sh * Update hassos-hook.sh * Rename uboot-boot.sh to uboot-boot.ush * Rename uboot-boot.sh to uboot-boot.ush * Update hassos-hook.sh * Rename uboot-boot.sh to uboot-boot.ush * Rename uboot-boot.sh to uboot-boot.ush * Update hassos-hook.sh * Update odroid_c2_defconfig * Update rpi0_w_defconfig * Update rpi2_defconfig * Update rpi3_64_defconfig * Update rpi3_defconfig * Update rpi_defconfig * Update tinker_defconfig * Update enter.sh * Update .travis.yml	2018-11-30 16:22:04 +01:00
Pascal Vizeli	ae0a2fe264	OS: move service scripts into libexec	2018-11-29 16:01:16 +00:00
Pascal Vizeli	bc3cc20629	Don't use a bind mount for docker data (#266 )	2018-11-29 15:20:58 +01:00
Pascal Vizeli	d94095a565	OVA: Add driver support for Xen, Hyper-V (#265 ) * OVA: Add driver support for Xen, Hyper-V * Fix devices	2018-11-28 01:04:18 +01:00
Pascal Vizeli	8ed63a9aab	Fix tini static for docker (#263 )	2018-11-27 21:34:54 +01:00
Pascal Vizeli	27a94565ea	Update containerd to 1.2.0 (#262 )	2018-11-27 09:20:21 +01:00
Pascal Vizeli	d46e2a808f	Revert "Update containerd to 1.2.0 (#260 )" (#261 ) This reverts commit `50bc0451d0`.	2018-11-27 00:06:46 +01:00
Pascal Vizeli	50bc0451d0	Update containerd to 1.2.0 (#260 )	2018-11-26 16:35:54 +01:00
Pascal Vizeli	5ff51846e2	Build: Support VDI, VDHX, VMDK (#259 ) * Support VDI, VDHX, VMDK * Update hassos-hook.sh * Update hdd-image.sh	2018-11-26 12:14:44 +01:00
Pascal Vizeli	4411307353	Buildroot 2018-11 (#258 ) * Update to buildroot 2018.11 * containerd update * runc update * runc docker engine * runc docker proxy * update rpi firmware * update network manager * update dhcpd * update wait on network * update rpi wifi * revert glibc	2018-11-26 11:04:01 +01:00
Pascal Vizeli	a9bbc7babe	Bump version 2.4	2018-11-25 16:31:10 +01:00
Pascal Vizeli	80f5fe0722	Delete release-drafter.yml	2018-11-23 08:06:20 +01:00
Pascal Vizeli	519acca46d	CLI: Update to version 7	2018-11-22 23:52:50 +00:00
Pascal Vizeli	566641bf8a	Supervisor: Update to version 140	2018-11-22 23:52:29 +00:00