Merge pull request #157 from home-assistant/dev

Beta 2.1

.gitignore

@@ -0,0 +1,2 @@
+/release
+*.pem

Dockerfile

@@ -1,4 +1,4 @@
-FROM ubuntu:16.04
+FROM ubuntu:18.04
 
 # Docker
 RUN apt-get update && apt-get install -y \
@@ -15,7 +15,7 @@ RUN apt-get update && apt-get install -y \
 # Build Tools
 RUN apt-get update && apt-get install -y \
         wget patch vim cpio python unzip rsync bc bzip2 ncurses-dev \
-        git make g++ file perl bash binutils locales qemu-utils \
+        git make g++ file perl bash binutils locales qemu-utils bison flex \
     && rm -rf /var/lib/apt/lists/*
 
 # Init entry

Documentation/bluetooth.md

@@ -0,0 +1,12 @@
+# Bluetooth
+
+We support `bluetoothctl` on host. Later we want also support bluetooth trought UI.
+All pairs and settings are persistent over reboots and updates.
+
+If you want setup bluetooth on host, use the *bluetoothctl* utility.
+
+## Scan devices
+
+```
+[bluetooth]# scan on
+```

Documentation/boards/ova.md

@@ -0,0 +1,16 @@
+# OVA
+
+The OVA stay for open virtual appliance. Currently we had remove the ova files and publish a vmdk virtual disk,
+until we have better OVF template to generate our OVA. This vmdk work with (maybe you need convert the disk):
+- HyperV
+- VirtualBox
+- VMware
+
+## Virtual Machine
+
+You can use this vmdk in a virtual machine with follow requirements:
+- OS: Linux 64bit
+- UEFI boot
+- min. 1GB RAM
+- 2x vcpu
+- 1x Network

Documentation/boards/raspberrypi.md

@@ -1,5 +1,35 @@
 # Raspberry PI
 
+Supported Hardware:
+
+| Device | Board | 
+|--------|-----------|
+| Raspberry Pi A+/B/B+| rpi |
+| Raspberry Pi Zero | rpi |
+| Raspberry Pi Zero W | rpi0-w |
+| Raspberry Pi 2 B | rpi2 |
+| Raspberry Pi 3 B/B+ | rpi3 / rpi3-64 |
+
+## Limitation 64bit
+
+The 64bit version is under development by RPi-Team. It work very nice but it could have some impacts. Actual we see that the SDcard access with ext4 are a bit slower than on 32bit.
+
 ## Serial console
 
-For access to terminal over serial console, add `console=ttyAMA0,115200` to `cmdline.txt`.
+For access to terminal over serial console, add `console=ttyAMA0,115200` to `cmdline.txt` and `enable_uart=1` into `config.txt`. GPIO pins are: 6 = GND / 8 = UART TXD / 10 = UART RXD.
+
+## I2C
+
+Add `dtparam=i2c1=on` and `dtparam=i2c_arm=on` to `config.txt`. After that we create a module file on host with [config usb stick][config] or direct into `/etc/modules-load.d`. 
+
+rpi-i2c.conf:
+```
+i2c-dev
+i2c-bcm2708
+```
+
+## Tweaks
+
+If you don't need bluetooth, disabled it with add `dtoverlay=pi3-disable-bt` into `config.txt`.
+
+[config]: ../configuration.md#automatic

Documentation/boards/tinker.md

@@ -0,0 +1,17 @@
+# Tinker Board
+
+Supported Hardware:
+
+| Device | Board | 
+|--------|-----------|
+| Tinker RK3288 | tinker |
+| Tinker S RK3288 | tinker |
+
+## EMMC
+
+Actual we support only SD cards. The support for EMMC will follow.
+
+## Serial console
+
+For access to terminal over serial console, add `console=ttyS2,115200` to `cmdline.txt`. GPIO pins are: 34 = GND / 32 = UART TXD / 33 = UART RXD.
+

Documentation/build.md

@@ -0,0 +1,21 @@
+# Building
+
+Running `sudo ./enter.sh` will get you into the build Docker container.   
+`make -C /build/buildroot BR2_EXTERNAL=/build/buildroot-external xy_defconfig`
+
+## Scripts
+
+
+
+## Helpers
+
+- `make -C /build/buildroot BR2_EXTERNAL=/build/buildroot-external xy_defconfig`
+- `make -C /build/buildroot BR2_EXTERNAL=/build/buildroot-external menuconfig`
+- `make -C /build/buildroot BR2_EXTERNAL=/build/buildroot-external linux-menuconfig`
+- `make -C /build/buildroot BR2_EXTERNAL=/build/buildroot-external barebox-menuconfig`
+- `make -C /build/buildroot BR2_EXTERNAL=/build/buildroot-external busybox-menuconfig`
+
+- `make -C /build/buildroot BR2_EXTERNAL=/build/buildroot-external savedefconfig`
+- `make -C /build/buildroot BR2_EXTERNAL=/build/buildroot-external linux-update-defconfig`
+- `make -C /build/buildroot BR2_EXTERNAL=/build/buildroot-external barebox-update-defconfig`
+- `make -C /build/buildroot BR2_EXTERNAL=/build/buildroot-external busybox-update-config`

Documentation/configuration.md

@@ -2,18 +2,23 @@
 
 ## Automatic
 
-You can format a USB stick with FAT32 and name it with `hassos-config`. The layout could be look like:
+You can use a USB drive with HassOS to configure network options, ssh access to the host, and to install updates.
+Format a USB stick with FAT32/EXT4/NTFS and name it `CONFIG`. Use the following directory structure within the USB drive:
+
 ```
 network/
 modules/
-known_hosts
-hassos-xy.rauc
+authorized_keys
+hassos-xy.raucb
 ```
 
-- On `network` folder can hold any kind of NetworkManager connections files.
-- The folder `modules` is for modules-load configuration files.
-- `known_hosts` file activate debug SSH access of port `22222`.
-- For firmware updates you can but the `hassos-*.rauc` OTA update they should be install. 
+- The `network` folder can contain any kind of NetworkManager connection files. For more information see [Network][network.md]. 
+- The `modules` folder is for modules-load configuration files.
+- The `authorized_keys` file activates debug SSH access on port `22222`. See [Debugging Hassio][debug-hassio].
+- The `hassos-*.raucb` file is a firmware OTA update which will be installed. These can be found on on the [release][hassos-release] page. 
+
+You can put this USB stick into the device and it will be read on startup. You can also trigger this process later over the
+API/UI or by calling `systemctl restart hassos-config` on the host.
 
 ## Local
 
@@ -25,5 +30,11 @@ You can edit or create a `cmdline.txt` into your boot partition. That will be re
 
 The kernel module folder `/etc/modules-load.d` is persistent and you can add your config files there. See [Systemd modules load][systemd-modules].
 
+### Network
+
+You can manual add, edit or remove connections configs from `/etc/NetworkManager/system-connections`.
 
 [systemd-modules]: https://www.freedesktop.org/software/systemd/man/modules-load.d.html
+[network.md]: network.md
+[hassos-release]: https://github.com/home-assistant/hassos/releases/
+[debug-hassio]: https://developers.home-assistant.io/docs/en/hassio_debugging.html

Documentation/deployment.md

@@ -0,0 +1,27 @@
+# Deployment
+
+We know 3 types of release builds:
+- development (beta/dev)
+- staging (rc)
+- production (stable)
+
+## Versioning
+The format of version is *MAJOR.BUILD*. Everytime we create a new release with same userland, we bump the build number.
+The development use here own major number they will be bump for the stable version and the development version go to next major number.
+
+```
+0.x = development
+1.x = stable
+2.x = development
+3.x = stable
+```
+
+## GIT Branch/Tag
+The branch `dev` ist the actual development branch and from there we never make a release. The `master` branch hould the development
+version from they we build a beta release.
+
+If we create a new staging/productive release, we create a new branch `rel-{MAJOR}`. They will be used for the hole cycle of this release.
+
+## Upload release files
+
+We use [ghr](https://github.com/tcnksm/ghr) to upload files to our repository. A binary version is available inside `scripts`.

Documentation/kernel.md

@@ -0,0 +1,7 @@
+
+# Kernel Version
+
+| Board | Version |
+|-------|---------|
+| Open Virtual Applicance | 4.14.59 |
+| Raspberry Pi | 4.14.58 |

Documentation/network.md

@@ -0,0 +1,97 @@
+# Network
+
+HassOS uses NetworkManager to control the host network. In future releases, you will be able to set up the configuration using the API/UI. Currently only manual configuration using NetworkManager connection files is supported. Without a configuration file, the device will use DHCP by default. These network connection files can be placed on a USB drive as described in [Configuration][configuration-usb].
+
+## Configuration Examples
+
+You can also read the [Official Manual][keyfile] or there are a lot of examples accross internet. The system is read only, if you don't want the IP address to change every boot, you should set the uuid property with a generic [UUID4][uuid]. Inside the `network` folder create the file `my-network` and add the appropriate contents below:
+
+### Default
+
+We have a preinstalled connection profile:
+```
+[connection]
+id=HassOS default
+uuid=f62bf7c2-e565-49ff-bbfc-a4cf791e6add
+type=802-3-ethernet
+
+[ipv4]
+method=auto
+
+[ipv6]
+addr-gen-mode=stable-privacy
+method=auto
+```
+
+### LAN
+```ini
+[connection]
+id=hassos-network
+uuid=d55162b4-6152-4310-9312-8f4c54d86afa
+type=802-3-ethernet
+
+[ipv4]
+method=auto
+
+[ipv6]
+addr-gen-mode=stable-privacy
+method=auto
+```
+
+### Wireless WPA/PSK
+```ini
+[connection]
+id=hassos-network
+uuid=72111c67-4a5d-4d5c-925e-f8ee26efb3c3
+type=802-11-wireless
+
+[802-11-wireless]
+mode=infrastructure
+ssid=MY_SSID
+
+[802-11-wireless-security]
+auth-alg=open
+key-mgmt=wpa-psk
+psk=MY_WLAN_SECRED_KEY
+
+[ipv4]
+method=auto
+
+[ipv6]
+addr-gen-mode=stable-privacy
+method=auto
+```
+
+### Static IP
+
+Replace follow configs:
+```ini
+[ipv4]
+method=manual
+address1=192.168.1.111/24,192.168.1.1
+dns=8.8.8.8;8.8.4.4;
+```
+
+## Tips
+
+### Reset network
+
+If you want reset the network configuration to default, use follow commands on host:
+```bash
+$ rm /etc/NetworkManager/system-connections/*
+$ cp /usr/share/system-connections/* /etc/NetworkManager/system-connections/
+$ nmcli con reload
+```
+
+### Powersave
+
+If you have trouble with powersave you can do following:
+```ini
+[wifi]
+# Values are 0 (use default), 1 (ignore/don't touch), 2 (disable) or 3 (enable).
+powersave=0
+```
+
+[keyfile]: https://developer.gnome.org/NetworkManager/stable/nm-settings.html
+[configuration-usb]: configuration.md
+[uuid]: https://www.uuidgenerator.net/

README.md

@@ -4,44 +4,11 @@ Hass.io OS based on [buildroot](https://buildroot.org/). It's a hypervisor for D
 ## Focus
 
 - Linux kernel 4.14 (LT)
-- Barebox as bootloader
+- Barebox as bootloader on EFI
+- U-Boot as bootloader on IoT
 - RAUC for OTA updates
 - SquashFS LZ4 as filesystem
-- Docker 17.12.1
+- Docker 18.03.1
 - AppArmor protected
 - ZRAM LZ4 for /tmp, /var, swap
 - Run every supervisor
-
-## Schemas
-![](misc/hassio-os-partition.png?raw=true)
-
-# Customize
-
-Provide a file with the name `hassos.json` in your data partition and the following structure:
-
-```json
-{
-  "supervisor": "repo/image",
-  "supervisor_args": "optional / custom docker arguments",
-  "cli": "repo/image",
-  "cli_args": "optional / custom docker arguments",
-  "hostname": "default hostname"
-}
-```
-
-# Building
-Running `sudo ./enter.sh` will get you into the build Docker container.   
-`make -C /build/buildroot BR2_EXTERNAL=/build/buildroot-external xy_defconfig`
-
-## Helpers
-
-- `make -C /build/buildroot BR2_EXTERNAL=/build/buildroot-external xy_defconfig`
-- `make -C /build/buildroot BR2_EXTERNAL=/build/buildroot-external menuconfig`
-- `make -C /build/buildroot BR2_EXTERNAL=/build/buildroot-external linux-menuconfig`
-- `make -C /build/buildroot BR2_EXTERNAL=/build/buildroot-external barebox-menuconfig`
-- `make -C /build/buildroot BR2_EXTERNAL=/build/buildroot-external busybox-menuconfig`
-
-- `make -C /build/buildroot BR2_EXTERNAL=/build/buildroot-external savedefconfig`
-- `make -C /build/buildroot BR2_EXTERNAL=/build/buildroot-external linux-update-defconfig`
-- `make -C /build/buildroot BR2_EXTERNAL=/build/buildroot-external barebox-update-defconfig`
-- `make -C /build/buildroot BR2_EXTERNAL=/build/buildroot-external busybox-update-config`

buildroot-external/Config.in

@@ -1,3 +1,5 @@
 source "$BR2_EXTERNAL_HASSOS_PATH/package/hassos/Config.in"
 source "$BR2_EXTERNAL_HASSOS_PATH/package/libapparmor/Config.in"
 source "$BR2_EXTERNAL_HASSOS_PATH/package/apparmor/Config.in"
+source "$BR2_EXTERNAL_HASSOS_PATH/package/bluetooth-bcm43xx/Config.in"
+source "$BR2_EXTERNAL_HASSOS_PATH/package/bluetooth-rtl8723/Config.in"

buildroot-external/apparmor/hassio-supervisor

@@ -1,75 +0,0 @@
-#include <tunables/global>
-
-profile hassio-supervisor flags=(attach_disconnected,mediate_deleted) {
-  #include <abstractions/base>
-  #include <abstractions/python>
-
-  network,
-  deny network raw,
-
-  signal (send) set=(kill,term),
-
-  /bin/busybox ix,
-  /usr/bin/python{,3,3.[0-9]} ix,
-  /usr/bin/git cx,
-  /usr/bin/socat cx,
-  /usr/bin/gdbus cx,
-
-  deny /proc/** wl,
-  deny /root/** wl,
-  deny /sys/** wl,
-
-  /** r,
-  /tmp/** rw,
-  /data/** rw,
-  /{,var/}run/docker.sock rw,
-
-  capability net_bind_service,
-
-  profile /usr/bin/socat flags=(attach_disconnected,mediate_deleted) {
-    #include <abstractions/base>
-
-    network inet udp,
-    network inet tcp,
-
-    deny network raw,
-    deny network packet,
-
-    signal (receive) set=(kill,term),
-    capability net_bind_service,
-
-    /lib/* mr,
-    /usr/bin/socat mr,
-  }
-
-  profile /usr/bin/gdbus flags=(attach_disconnected,mediate_deleted) {
-    #include <abstractions/base>
-    #include <abstractions/dbus>
-
-    unix (send, receive) type=stream,
-
-    /usr/bin/gdbus mr,
-    /lib/* mr,
-    /{,var/}run/dbus/system_bus_socket rw,
-  }
-
-  profile /usr/bin/git flags=(attach_disconnected,mediate_deleted) {
-    #include <abstractions/base>
-
-    network,
-    deny network raw,
-
-    /bin/busybox ix,
-    /usr/bin/git mr,
-    /usr/libexec/git-core/* ix,
-
-    deny /data/homeassistant rw,
-    deny /data/ssl rw,
-
-    /** r,
-    /lib/* mr,
-    /data/addons/** lrw,
-
-    capability dac_override,
-  }
-}

buildroot-external/barebox-env/boot/system0

@@ -1,12 +0,0 @@
-#!/bin/sh
-
-global linux.bootargs.dyn.root="root=PARTUUID=8d3d53e3-6d49-4c38-8349-aff6859e82fd rootfstype=squashfs ro"
-
-mkdir -p /mnt/system
-mount -t squashfs /dev/disk0.hassos-system0 /mnt/system
-
-if [ -f "/mnt/system/boot/bzImage" ]; then
-    global bootm.image="/mnt/system/boot/bzImage"
-else
-    global bootm.image="/mnt/system/boot/zImage"
-fi

buildroot-external/barebox-env/boot/system1

@@ -1,13 +0,0 @@
-#!/bin/sh
-
-global linux.bootargs.dyn.root="root=PARTUUID=a3ec664e-32ce-4665-95ea-7ae90ce9aa20 rootfstype=squashfs ro"
-
-mkdir -p /mnt/system
-mount -t squashfs /dev/disk0.hassos-system1 /mnt/system
-
-if [ -f "/mnt/system/boot/bzImage" ]; then
-    global bootm.image="/mnt/system/boot/bzImage"
-else
-    global bootm.image="/mnt/system/boot/zImage"
-fi
-

buildroot-external/barebox-env/menu/10-boot-system0/action

@@ -1,3 +0,0 @@
-#!/bin/sh
-
-boot system0

buildroot-external/barebox-env/menu/20-boot-system1/action

@@ -1,3 +0,0 @@
-#!/bin/sh
-
-boot system1

buildroot-external/barebox-env/nv/bootchooser.targets

@@ -1 +0,0 @@
-system0 system1

buildroot-external/barebox-env/overlay/load

@@ -1,5 +0,0 @@
-#!/bin/sh
-
-for i in /env/overlay/*.dtbo; do
-	oftree -o $i
-done

buildroot-external/board/ova/info

@@ -1,3 +1,6 @@
 BOARD_ID=ova
 BOARD_NAME="Open Virtual Appliance"
 CHASSIS=vm
+BOOTLOADER=barebox
+KERNEL_FILE=bzImage
+BOOT_SYS=gpt

buildroot-external/board/ova/kernel.config

@@ -1 +1,9 @@
-CONFIG_EFI_STUB=y
+CONFIG_EFI_STUB=y
+
+CONFIG_VIRTIO=y
+CONFIG_VIRTIO_PCI=y
+CONFIG_VIRTIO_NET=y
+CONFIG_VIRTIO_BALLOON=m
+CONFIG_VIRTIO_INPUT=m
+CONFIG_VIRTIO_BLK=m
+

buildroot-external/board/ova/patches/rauc/0001-add-i-argument-to.patch

@@ -17,7 +17,7 @@ index d5efc0c..c57c2f7 100644
  	g_ptr_array_add(args, g_strdup_printf(BOOTSTATE_PREFIX ".%s.remaining_attempts", bootname));
 +
 +	g_ptr_array_add(args, g_strdup("-i"));
-+	g_ptr_array_add(args, g_strdup("/mnt/boot/EFI/barebox/state.dtb"));
++	g_ptr_array_add(args, g_strdup("/etc/barebox-state.dtb"));
  	g_ptr_array_add(args, NULL);
  
  	sub = g_subprocess_newv((const gchar * const *)args->pdata,
@@ -27,7 +27,7 @@ index d5efc0c..c57c2f7 100644
  	}
 +
 +	g_ptr_array_add(args, g_strdup("-i"));
-+	g_ptr_array_add(args, g_strdup("/mnt/boot/EFI/barebox/state.dtb"));
++	g_ptr_array_add(args, g_strdup("/etc/barebox-state.dtb"));
  	g_ptr_array_add(args, NULL);
  
  	sub = g_subprocess_newv((const gchar * const *)args->pdata,

buildroot-external/board/ova/post-image.sh

@@ -6,26 +6,28 @@ BOARD_DIR=${2}
 BOOT_DATA=${BINARIES_DIR}/boot
 
 . ${SCRIPT_DIR}/hdd-image.sh
+. ${SCRIPT_DIR}/name.sh
+. ${SCRIPT_DIR}/ota.sh
 . ${BR2_EXTERNAL_HASSOS_PATH}/info
 . ${BOARD_DIR}/info
 
-# Filename
-IMAGE_FILE=${HASSOS_ID}_${BOARD_ID}-${VERSION_MAJOR}.${VERSION_BUILD}.vmdk
-
 # Init boot data
 rm -rf ${BOOT_DATA}
 mkdir -p ${BOOT_DATA}/EFI/BOOT
 mkdir -p ${BOOT_DATA}/EFI/barebox
 
 cp ${BINARIES_DIR}/barebox.bin ${BOOT_DATA}/EFI/BOOT/BOOTx64.EFI
-cp ${BOARD_DIR}/barebox-state-efi.dtb ${BOOT_DATA}/EFI/barebox/state.dtb
+cp ${BR2_EXTERNAL_HASSOS_PATH}/misc/barebox-state-efi.dtb ${BOOT_DATA}/EFI/barebox/state.dtb
 
-echo "console=tty1" > ${BOARD_DIR}/cmdline.txt
+echo "console=tty1" > ${BOOT_DATA}/cmdline.txt
 
 # Create other layers
-create_boot_image ${BINARIES_DIR}
-create_overlay_image ${BINARIES_DIR}
+prepare_disk_image
 
-create_disk_image ${BINARIES_DIR} ${BINARIES_DIR}/harddisk.img 6
+# Create disk images
+create_disk_image 6
+convert_disk_image_vmdk
+convert_disk_image_gz vmdk
 
-qemu-img convert -O vmdk ${BINARIES_DIR}/harddisk.img ${BINARIES_DIR}/${IMAGE_FILE}
+# OTA
+create_ota_update

buildroot-external/board/raspberrypi/patches/uboot/0001-Support-HassOS-bootstate-partition.patch

@@ -0,0 +1,29 @@
+From 8458beb24f2540fff3c3faed4fa068553b9e474e Mon Sep 17 00:00:00 2001
+From: Pascal Vizeli <pvizeli@syshack.ch>
+Date: Wed, 8 Aug 2018 09:45:07 +0000
+Subject: [PATCH 1/1] Support HassOS bootstate partition
+
+Signed-off-by: Pascal Vizeli <pvizeli@syshack.ch>
+---
+ env/mmc.c | 5 +++++
+ 1 file changed, 5 insertions(+)
+
+diff --git a/env/mmc.c b/env/mmc.c
+index 5e3da6dca75..353f58a12c9 100644
+--- a/env/mmc.c
++++ b/env/mmc.c
+@@ -18,6 +18,11 @@
+ #include <search.h>
+ #include <errno.h>
+ 
++#undef CONFIG_SYS_MMC_ENV_DEV
++#define CONFIG_SYS_MMC_ENV_DEV 0
++#undef CONFIG_ENV_OFFSET
++#define CONFIG_ENV_OFFSET 0x25100000
++
+ #define __STR(X) #X
+ #define STR(X) __STR(X)
+ 
+-- 
+2.17.1
+

buildroot-external/board/raspberrypi/post-image.sh

@@ -6,19 +6,20 @@ BOARD_DIR=${2}
 BOOT_DATA=${BINARIES_DIR}/boot
 
 . ${SCRIPT_DIR}/hdd-image.sh
+. ${SCRIPT_DIR}/name.sh
+. ${SCRIPT_DIR}/ota.sh
 . ${BR2_EXTERNAL_HASSOS_PATH}/info
 . ${BOARD_DIR}/info
 
-# Filename
-IMAGE_FILE=${BINARIES_DIR}/${HASSOS_ID}_${BOARD_ID}-${VERSION_MAJOR}.${VERSION_BUILD}.img
-
 # Init boot data
 rm -rf ${BOOT_DATA}
 mkdir -p ${BOOT_DATA}
 
-cp ${BINARIES_DIR}/barebox.bin ${BOOT_DATA}/
 cp -t ${BOOT_DATA} \
-    ${BINARIES_DIR}/bcm2709-rpi-2-b.dtb \
+    ${BINARIES_DIR}/u-boot.bin \
+    ${BINARIES_DIR}/boot.scr
+cp -t ${BOOT_DATA} \
+    ${BINARIES_DIR}/*.dtb \
     ${BINARIES_DIR}/rpi-firmware/bootcode.bin \
     ${BINARIES_DIR}/rpi-firmware/fixup.dat \
     ${BINARIES_DIR}/rpi-firmware/start.elf
@@ -26,20 +27,23 @@ cp -r ${BINARIES_DIR}/rpi-firmware/overlays ${BOOT_DATA}/
 
 # Update Boot options
 (
-    echo "kernel=barebox.bin"
+    echo "kernel=u-boot.bin"
     echo "disable_splash=1"
     echo "dtparam=audio=on"
-    echo "enable_uart=1"
 ) > ${BOOT_DATA}/config.txt
 
-echo "dwc_otg.lpm_enable=0 console=tty1 console=ttyAMA0,115200" > ${BOOT_DATA}/cmdline.txt
+echo "dwc_otg.lpm_enable=0 console=tty1" > ${BOOT_DATA}/cmdline.txt
+
+# Enable 64bit support
+if [ "${BOARD_ID}" == "rpi3-64" ]; then
+    echo "arm_64bit=1" >> ${BOOT_DATA}/config.txt
+fi
 
 # Create other layers
-create_boot_image ${BINARIES_DIR}
-create_overlay_image ${BINARIES_DIR}
+prepare_disk_image
 
-create_disk_image ${BINARIES_DIR} ${IMAGE_FILE} 2
-fix_disk_image_mbr ${IMAGE_FILE}
+create_disk_image 2
+convert_disk_image_gz
 
-rm -rf ${IMAGE_FILE}.gz
-gzip --best ${IMAGE_FILE}
+# OTA
+create_ota_update

buildroot-external/board/raspberrypi/rpi/info

@@ -0,0 +1,7 @@
+BOARD_ID=rpi
+BOARD_NAME="RaspberryPi"
+CHASSIS=embedded
+BOOTLOADER=uboot
+KERNEL_FILE=zImage
+BOOT_SYS=mbr
+BOOT_ENV_SIZE=0x4000

buildroot-external/board/raspberrypi/rpi0-w/info

@@ -0,0 +1,7 @@
+BOARD_ID=rpi0-w
+BOARD_NAME="RaspberryPi Zero-W"
+CHASSIS=embedded
+BOOTLOADER=uboot
+KERNEL_FILE=zImage
+BOOT_SYS=mbr
+BOOT_ENV_SIZE=0x4000

buildroot-external/board/raspberrypi/rpi2/info

@@ -0,0 +1,7 @@
+BOARD_ID=rpi2
+BOARD_NAME="RaspberryPi 2"
+CHASSIS=embedded
+BOOTLOADER=uboot
+KERNEL_FILE=zImage
+BOOT_SYS=mbr
+BOOT_ENV_SIZE=0x4000

buildroot-external/board/raspberrypi/rpi3-64/info

@@ -0,0 +1,7 @@
+BOARD_ID=rpi3-64
+BOARD_NAME="RaspberryPi 3 64bit"
+CHASSIS=embedded
+BOOTLOADER=uboot
+KERNEL_FILE=Image
+BOOT_SYS=mbr
+BOOT_ENV_SIZE=0x4000

buildroot-external/board/raspberrypi/rpi3-64/uboot-boot.sh

@@ -0,0 +1,56 @@
+test -n "${BOOT_ORDER}" || setenv BOOT_ORDER "A B"
+test -n "${BOOT_A_LEFT}" || setenv BOOT_A_LEFT 3
+test -n "${BOOT_B_LEFT}" || setenv BOOT_B_LEFT 3
+
+# HassOS bootargs
+setenv bootargs_hassos "zram.enabled=1 zram.num_devices=3 apparmor=1 security=apparmor rootwait cgroup_enable=memory"
+
+# HassOS system A/B
+setenv bootargs_a "root=PARTUUID=8d3d53e3-6d49-4c38-8349-aff6859e82fd rootfstype=squashfs ro"
+setenv bootargs_b "root=PARTUUID=a3ec664e-32ce-4665-95ea-7ae90ce9aa20 rootfstype=squashfs ro"
+
+# Preserve origin bootargs
+setenv bootargs_rpi
+setenv fdt_org ${fdt_addr}
+fdt addr ${fdt_org}
+fdt get value bootargs_rpi /chosen bootargs
+
+setenv bootargs
+for BOOT_SLOT in "${BOOT_ORDER}"; do
+  if test "x${bootargs}" != "x"; then
+    # skip remaining slots
+  elif test "x${BOOT_SLOT}" = "xA"; then
+    if test ${BOOT_A_LEFT} -gt 0; then
+      setexpr BOOT_A_LEFT ${BOOT_A_LEFT} - 1
+      echo "Found valid slot A, ${BOOT_A_LEFT} attempts remaining"
+      setenv load_kernel "ext4load mmc 0:2 ${kernel_addr_r} Image"
+      setenv bootargs "${bootargs_hassos} ${bootargs_rpi} ${bootargs_a} rauc.slot=A"
+    fi
+  elif test "x${BOOT_SLOT}" = "xB"; then
+    if test ${BOOT_B_LEFT} -gt 0; then
+      setexpr BOOT_B_LEFT ${BOOT_B_LEFT} - 1
+      echo "Found valid slot B, ${BOOT_B_LEFT} attempts remaining"
+      setenv load_kernel "ext4load mmc 0:4 ${kernel_addr_r} Image"
+      setenv bootargs "${bootargs_hassos} ${bootargs_rpi} ${bootargs_b} rauc.slot=B"
+    fi
+  fi
+done
+
+setenv fdt_addr
+if test -n "${bootargs}"; then
+  saveenv
+else
+  echo "No valid slot found, resetting tries to 3"
+  setenv BOOT_A_LEFT 3
+  setenv BOOT_B_LEFT 3
+  saveenv
+  reset
+fi
+
+echo "Loading kernel"
+run load_kernel
+echo " Starting kernel"
+booti ${kernel_addr_r} - ${fdt_org}
+
+echo "Fails on boot"
+reset

buildroot-external/board/raspberrypi/rpi3/info

@@ -0,0 +1,7 @@
+BOARD_ID=rpi3
+BOARD_NAME="RaspberryPi 3"
+CHASSIS=embedded
+BOOTLOADER=uboot
+KERNEL_FILE=zImage
+BOOT_SYS=mbr
+BOOT_ENV_SIZE=0x4000

buildroot-external/board/raspberrypi/uboot-boot.sh

@@ -0,0 +1,56 @@
+test -n "${BOOT_ORDER}" || setenv BOOT_ORDER "A B"
+test -n "${BOOT_A_LEFT}" || setenv BOOT_A_LEFT 3
+test -n "${BOOT_B_LEFT}" || setenv BOOT_B_LEFT 3
+
+# HassOS bootargs
+setenv bootargs_hassos "zram.enabled=1 zram.num_devices=3 apparmor=1 security=apparmor rootwait cgroup_enable=memory"
+
+# HassOS system A/B
+setenv bootargs_a "root=PARTUUID=8d3d53e3-6d49-4c38-8349-aff6859e82fd rootfstype=squashfs ro"
+setenv bootargs_b "root=PARTUUID=a3ec664e-32ce-4665-95ea-7ae90ce9aa20 rootfstype=squashfs ro"
+
+# Preserve origin bootargs
+setenv bootargs_rpi
+setenv fdt_org ${fdt_addr}
+fdt addr ${fdt_org}
+fdt get value bootargs_rpi /chosen bootargs
+
+setenv bootargs
+for BOOT_SLOT in "${BOOT_ORDER}"; do
+  if test "x${bootargs}" != "x"; then
+    # skip remaining slots
+  elif test "x${BOOT_SLOT}" = "xA"; then
+    if test ${BOOT_A_LEFT} -gt 0; then
+      setexpr BOOT_A_LEFT ${BOOT_A_LEFT} - 1
+      echo "Found valid slot A, ${BOOT_A_LEFT} attempts remaining"
+      setenv load_kernel "ext4load mmc 0:2 ${kernel_addr_r} zImage"
+      setenv bootargs "${bootargs_hassos} ${bootargs_rpi} ${bootargs_a} rauc.slot=A"
+    fi
+  elif test "x${BOOT_SLOT}" = "xB"; then
+    if test ${BOOT_B_LEFT} -gt 0; then
+      setexpr BOOT_B_LEFT ${BOOT_B_LEFT} - 1
+      echo "Found valid slot B, ${BOOT_B_LEFT} attempts remaining"
+      setenv load_kernel "ext4load mmc 0:4 ${kernel_addr_r} zImage"
+      setenv bootargs "${bootargs_hassos} ${bootargs_rpi} ${bootargs_b} rauc.slot=B"
+    fi
+  fi
+done
+
+setenv fdt_addr
+if test -n "${bootargs}"; then
+  saveenv
+else
+  echo "No valid slot found, resetting tries to 3"
+  setenv BOOT_A_LEFT 3
+  setenv BOOT_B_LEFT 3
+  saveenv
+  reset
+fi
+
+echo "Loading kernel"
+run load_kernel
+echo " Starting kernel"
+bootz ${kernel_addr_r} - ${fdt_org}
+
+echo "Fails on boot"
+reset

buildroot-external/board/raspberrypi/uboot.config

@@ -0,0 +1,3 @@
+# CONFIG_USB_STORAGE is not set
+# CONFIG_ENV_FAT_INTERFACE is not set
+# CONFIG_ENV_FAT_DEVICE_AND_PART is not set

buildroot-external/board/rpi2/barebox-env/init/rpi_bootargs

@@ -1,3 +0,0 @@
-#!/bin/sh
-
-global linux.bootargs.rpi="bcm2708_fb.fbwidth=656 bcm2708_fb.fbheight=416 bcm2708_fb.fbswap=1 vc_mem.mem_base=0x3ec00000 vc_mem.mem_size=0x40000000"

buildroot-external/board/rpi2/barebox.config

@@ -1,13 +0,0 @@
-CONFIG_ARCH_BCM283X=y
-CONFIG_MACH_RPI2=y
-CONFIG_AEABI=y
-CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
-CONFIG_ARM_UNWIND=y
-CONFIG_MMU=y
-CONFIG_MALLOC_TLSF=y
-CONFIG_KALLSYMS=y
-# CONFIG_SPI is not set
-CONFIG_MCI=y
-CONFIG_MCI_BCM283X=y
-# CONFIG_PINCTRL is not set
-CONFIG_REGULATOR=y

buildroot-external/board/rpi2/info

@@ -1,3 +0,0 @@
-BOARD_ID=rpi2
-BOARD_NAME="RaspberryPi 2"
-CHASSIS=embedded

buildroot-external/board/rpi2/patches/barebox/0001-ARM-dts-bcm2836-rpi-2-re-enable-booting-from-SD-card.patch

@@ -1,30 +0,0 @@
-From 6344ec5c84a49c2df4c2f26b52d317a34e3bc0c7 Mon Sep 17 00:00:00 2001
-From: Pascal Vizeli <pvizeli@syshack.ch>
-Date: Mon, 4 Jun 2018 07:55:46 +0000
-Subject: [PATCH 1/2] ARM: dts: bcm2836-rpi-2: re-enable booting from SD card
-
-Signed-off-by: Pascal Vizeli <pvizeli@syshack.ch>
----
- arch/arm/dts/bcm2836-rpi-2.dts | 9 +++++++++
- 1 file changed, 9 insertions(+)
-
-diff --git a/arch/arm/dts/bcm2836-rpi-2.dts b/arch/arm/dts/bcm2836-rpi-2.dts
-index 42b6abb18..2fa1c8bb4 100644
---- a/arch/arm/dts/bcm2836-rpi-2.dts
-+++ b/arch/arm/dts/bcm2836-rpi-2.dts
-@@ -9,3 +9,12 @@
- 		reg = <0x0 0x0>;
- 	};
- };
-+
-+&sdhci {
-+	status = "okay";
-+};
-+
-+&sdhost {
-+	status = "disabled";
-+};
-+
--- 
-2.17.0
-

buildroot-external/board/rpi2/patches/barebox/0002-ARM-dts-add-more-functions.patch

@@ -1,167 +0,0 @@
-From 114c8fd0327f1c0f1bf886953c600e2a72a55df7 Mon Sep 17 00:00:00 2001
-From: Pascal Vizeli <pvizeli@syshack.ch>
-Date: Mon, 4 Jun 2018 09:17:25 +0000
-Subject: [PATCH 2/2] ARM: dts: add more functions
-
-Signed-off-by: Pascal Vizeli <pvizeli@syshack.ch>
----
- arch/arm/dts/bcm2835-rpi.dts   |  4 ---
- arch/arm/dts/bcm2836-rpi-2.dts |  4 ---
- dts/src/arm/bcm2835-rpi.dtsi   | 46 ++++++++++++++++++++++++++++++++--
- dts/src/arm/bcm283x.dtsi       | 12 +++------
- 4 files changed, 48 insertions(+), 18 deletions(-)
-
-diff --git a/arch/arm/dts/bcm2835-rpi.dts b/arch/arm/dts/bcm2835-rpi.dts
-index c23e7c7c1..22d60e961 100644
---- a/arch/arm/dts/bcm2835-rpi.dts
-+++ b/arch/arm/dts/bcm2835-rpi.dts
-@@ -1,10 +1,6 @@
- #include <arm/bcm2835-rpi-a.dts>
- 
- / {
--	chosen {
--		stdout-path = &uart0;
--	};
--
- 	memory {
- 		reg = <0x0 0x0>;
- 	};
-diff --git a/arch/arm/dts/bcm2836-rpi-2.dts b/arch/arm/dts/bcm2836-rpi-2.dts
-index 2fa1c8bb4..bdee1296e 100644
---- a/arch/arm/dts/bcm2836-rpi-2.dts
-+++ b/arch/arm/dts/bcm2836-rpi-2.dts
-@@ -1,10 +1,6 @@
- #include <arm/bcm2836-rpi-2-b.dts>
- 
- / {
--	chosen {
--		stdout-path = &uart0;
--	};
--
- 	memory {
- 		reg = <0x0 0x0>;
- 	};
-diff --git a/dts/src/arm/bcm2835-rpi.dtsi b/dts/src/arm/bcm2835-rpi.dtsi
-index e36c392a2..d3dfb4b3e 100644
---- a/dts/src/arm/bcm2835-rpi.dtsi
-+++ b/dts/src/arm/bcm2835-rpi.dtsi
-@@ -27,6 +27,39 @@
- 			firmware = <&firmware>;
- 			#power-domain-cells = <1>;
- 		};
-+
-+		fb: fb {
-+			compatible = "brcm,bcm2708-fb";
-+			firmware = <&firmware>;
-+			status = "okay";
-+		};
-+
-+		vchiq: vchiq {
-+			compatible = "brcm,bcm2835-vchiq";
-+			reg = <0x7e00b840 0xf>;
-+			interrupts = <0 2>;
-+			cache-line-size = <32>;
-+			firmware = <&firmware>;
-+		};
-+
-+		vcsm: vcsm {
-+			compatible = "raspberrypi,bcm2835-vcsm";
-+			firmware = <&firmware>;
-+			status = "okay";
-+		};
-+
-+		/* Onboard audio */
-+		audio: audio {
-+			compatible = "brcm,bcm2835-audio";
-+			brcm,pwm-channels = <8>;
-+			status = "okay";
-+		};
-+
-+		/* External sound card */
-+		sound: sound {
-+			status = "disabled";
-+		};
-+
- 	};
- };
- 
-@@ -91,12 +124,12 @@
- 
- &hdmi {
- 	power-domains = <&power RPI_POWER_DOMAIN_HDMI>;
--	status = "okay";
-+	status = "disabled";
- };
- 
- &vec {
- 	power-domains = <&power RPI_POWER_DOMAIN_VEC>;
--	status = "okay";
-+	status = "disabled";
- };
- 
- &dsi0 {
-@@ -106,3 +139,12 @@
- &dsi1 {
- 	power-domains = <&power RPI_POWER_DOMAIN_DSI1>;
- };
-+
-+&v3d {
-+	status = "disabled";
-+};
-+
-+&vc4 {
-+	status = "disabled";
-+};
-+
-diff --git a/dts/src/arm/bcm283x.dtsi b/dts/src/arm/bcm283x.dtsi
-index 9d293decf..0abb72a47 100644
---- a/dts/src/arm/bcm283x.dtsi
-+++ b/dts/src/arm/bcm283x.dtsi
-@@ -26,10 +26,6 @@
- 		serial1 = &uart1;
- 	};
- 
--	chosen {
--		stdout-path = "serial0:115200n8";
--	};
--
- 	thermal-zones {
- 		cpu_thermal: cpu-thermal {
- 			polling-delay-passive = <0>;
-@@ -426,13 +422,13 @@
- 			status = "disabled";
- 		};
- 
--		pixelvalve@7e206000 {
-+		pixelvalve0: pixelvalve@7e206000 {
- 			compatible = "brcm,bcm2835-pixelvalve0";
- 			reg = <0x7e206000 0x100>;
- 			interrupts = <2 13>; /* pwa0 */
- 		};
- 
--		pixelvalve@7e207000 {
-+		pixelvalve1: pixelvalve@7e207000 {
- 			compatible = "brcm,bcm2835-pixelvalve1";
- 			reg = <0x7e207000 0x100>;
- 			interrupts = <2 14>; /* pwa1 */
-@@ -518,7 +514,7 @@
- 			status = "disabled";
- 		};
- 
--		hvs@7e400000 {
-+		hvs: hvs@7e400000 {
- 			compatible = "brcm,bcm2835-hvs";
- 			reg = <0x7e400000 0x6000>;
- 			interrupts = <2 1>;
-@@ -572,7 +568,7 @@
- 			status = "disabled";
- 		};
- 
--		pixelvalve@7e807000 {
-+		pixelvalve2: pixelvalve@7e807000 {
- 			compatible = "brcm,bcm2835-pixelvalve2";
- 			reg = <0x7e807000 0x100>;
- 			interrupts = <2 10>; /* pixelvalve */
--- 
-2.17.0
-

buildroot-external/board/rpi2/patches/barebox/0003-Add-HassOS-bootchoiser-state.patch

@@ -1,167 +0,0 @@
-From 3fe92c12e01e35cc97fbd92d8ae098ac583cfa1f Mon Sep 17 00:00:00 2001
-From: Pascal Vizeli <pvizeli@syshack.ch>
-Date: Mon, 4 Jun 2018 09:25:40 +0000
-Subject: [PATCH 3/3] Add HassOS bootchoiser state
-
-Signed-off-by: Pascal Vizeli <pvizeli@syshack.ch>
----
- arch/arm/dts/bcm2835-rpi.dts   | 69 ++++++++++++++++++++++++++++++++++
- arch/arm/dts/bcm2836-rpi-2.dts | 68 +++++++++++++++++++++++++++++++++
- 2 files changed, 137 insertions(+)
-
-diff --git a/arch/arm/dts/bcm2835-rpi.dts b/arch/arm/dts/bcm2835-rpi.dts
-index 22d60e961..3357d06b7 100644
---- a/arch/arm/dts/bcm2835-rpi.dts
-+++ b/arch/arm/dts/bcm2835-rpi.dts
-@@ -13,3 +13,72 @@
- &sdhost {
- 	status = "disabled";
- };
-+
-+/ {
-+
-+	aliases {
-+		state = &state;
-+	};
-+
-+	state: state {
-+		#address-cells = <1>;
-+		#size-cells = <1>;
-+                magic = <0xef98423f>;
-+                compatible = "barebox,state";
-+                backend = <&backend_state>;
-+                backend-type = "raw";
-+                backend-stridesize = <4048>;
-+
-+		bootstate {
-+			#address-cells = <1>;
-+			#size-cells = <1>;
-+
-+			system0 {
-+				#address-cells = <1>;
-+				#size-cells = <1>;
-+				remaining_attempts@0 {
-+					reg = <0x0 0x4>;
-+					type = "uint32";
-+					default = <3>;
-+				};
-+				priority@4 {
-+					reg = <0x4 0x4>;
-+					type = "uint32";
-+					default = <20>;
-+				};
-+			};
-+			system1 {
-+				#address-cells = <1>;
-+				#size-cells = <1>;
-+				remaining_attempts@8 {
-+					reg = <0x8 0x4>;
-+					type = "uint32";
-+					default = <0>;
-+				};
-+				priority@c {
-+					reg = <0xc 0x4>;
-+					type = "uint32";
-+					default = <10>;
-+				};
-+			};
-+			last_chosen@10 {
-+				reg = <0x10 0x4>;
-+				type = "uint32";
-+			};
-+		};
-+	};
-+};
-+
-+&sdhci {
-+	partitions {
-+		#address-cells = <1>;
-+		#size-cells = <1>;
-+		compatible = "fixed-partitions";
-+
-+		backend_state: partition@22100000 {
-+			label = "state";
-+			reg = <0x22100000 0x800000>;
-+		};
-+	};
-+};
-+
-diff --git a/arch/arm/dts/bcm2836-rpi-2.dts b/arch/arm/dts/bcm2836-rpi-2.dts
-index bdee1296e..e41def570 100644
---- a/arch/arm/dts/bcm2836-rpi-2.dts
-+++ b/arch/arm/dts/bcm2836-rpi-2.dts
-@@ -14,3 +14,71 @@
- 	status = "disabled";
- };
- 
-+/ {
-+
-+	aliases {
-+		state = &state;
-+	};
-+
-+	state: state {
-+		#address-cells = <1>;
-+		#size-cells = <1>;
-+                magic = <0xef98423f>;
-+                compatible = "barebox,state";
-+                backend = <&backend_state>;
-+                backend-type = "raw";
-+                backend-stridesize = <4048>;
-+
-+		bootstate {
-+			#address-cells = <1>;
-+			#size-cells = <1>;
-+
-+			system0 {
-+				#address-cells = <1>;
-+				#size-cells = <1>;
-+				remaining_attempts@0 {
-+					reg = <0x0 0x4>;
-+					type = "uint32";
-+					default = <3>;
-+				};
-+				priority@4 {
-+					reg = <0x4 0x4>;
-+					type = "uint32";
-+					default = <20>;
-+				};
-+			};
-+			system1 {
-+				#address-cells = <1>;
-+				#size-cells = <1>;
-+				remaining_attempts@8 {
-+					reg = <0x8 0x4>;
-+					type = "uint32";
-+					default = <0>;
-+				};
-+				priority@c {
-+					reg = <0xc 0x4>;
-+					type = "uint32";
-+					default = <10>;
-+				};
-+			};
-+			last_chosen@10 {
-+				reg = <0x10 0x4>;
-+				type = "uint32";
-+			};
-+		};
-+	};
-+};
-+
-+&sdhci {
-+	partitions {
-+		#address-cells = <1>;
-+		#size-cells = <1>;
-+		compatible = "fixed-partitions";
-+
-+		backend_state: partition@22100000 {
-+			label = "state";
-+			reg = <0x22100000 0x800000>;
-+		};
-+	};
-+};
-+
--- 
-2.17.0
-

buildroot-external/board/rpi2/patches/barebox/0004-common-state-allow-to-overlay-state-backend.patch

@@ -1,42 +0,0 @@
-From 19ab0b433893cc7d16e8f4a6052f0f784131c43a Mon Sep 17 00:00:00 2001
-From: Pascal Vizeli <pvizeli@syshack.ch>
-Date: Sat, 2 Jun 2018 22:08:31 +0000
-Subject: [PATCH 1/1] common: state: allow to overlay state backend
-
-This allow to use overlay for state backends. I.e. on raspberry you need
-use barebox with SDHCI (slow) and after linux boot it will use SDHOST driver.
-But the problem now is, that the state is on SDHCI and dt-utils need it on
-SDHOST. Actual it is not possible to overwrite this.
-
-Signed-off-by: Pascal Vizeli <pvizeli@syshack.ch>
----
- common/state/state.c | 13 +++++++++++--
- 1 file changed, 11 insertions(+), 2 deletions(-)
-
-diff --git a/common/state/state.c b/common/state/state.c
-index 25d950211..e6259043f 100644
---- a/common/state/state.c
-+++ b/common/state/state.c
-@@ -494,8 +494,17 @@ static int of_state_fixup(struct device_node *root, void *ctx)
- 	}
- 
- 	/* backend phandle */
--	backend_node = of_find_node_by_reproducible_name(root,
--						state->backend_reproducible_name);
-+	if (node) {
-+		ret = of_property_read_u32(node, "backend", &phandle);
-+		if (ret)
-+			goto out;
-+
-+		backend_node = of_find_node_by_phandle_from(phandle, root);
-+	} else {
-+		backend_node = of_find_node_by_reproducible_name(root,
-+					state->backend_reproducible_name);
-+	}
-+
- 	if (!backend_node) {
- 		ret = -ENODEV;
- 		goto out;
--- 
-2.17.0
-

buildroot-external/board/rpi3/barebox.config

@@ -1,54 +0,0 @@
-CONFIG_ARCH_BCM283X=y
-CONFIG_MACH_RPI3=y
-CONFIG_AEABI=y
-CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
-CONFIG_ARM_UNWIND=y
-# CONFIG_LOCALVERSION_AUTO is not set
-CONFIG_MMU=y
-CONFIG_MALLOC_SIZE=0x0
-CONFIG_MALLOC_TLSF=y
-CONFIG_KALLSYMS=y
-CONFIG_PROMPT="HassOS-boot:"
-CONFIG_CMDLINE_EDITING=y
-CONFIG_AUTO_COMPLETE=y
-CONFIG_MENU=y
-# CONFIG_TIMESTAMP is not set
-CONFIG_BOOTM_SHOW_TYPE=y
-CONFIG_BOOTM_OFTREE=y
-CONFIG_FLEXIBLE_BOOTARGS=y
-# CONFIG_PARTITION_DISK_DOS is not set
-CONFIG_PARTITION_DISK_EFI=y
-# CONFIG_PARTITION_DISK_EFI_GPT_NO_FORCE is not set
-# CONFIG_PARTITION_DISK_EFI_GPT_COMPARE is not set
-CONFIG_DEFAULT_ENVIRONMENT_PATH="/build/buildroot-external/barebox-env"
-CONFIG_STATE=y
-CONFIG_BOOTCHOOSER=y
-# CONFIG_CMD_VERSION is not set
-CONFIG_CMD_BOOT=y
-CONFIG_CMD_AUTOMOUNT=y
-CONFIG_CMD_NV=y
-CONFIG_CMD_EXPORT=y
-CONFIG_CMD_GLOBAL=y
-CONFIG_CMD_BASENAME=y
-CONFIG_CMD_DIRNAME=y
-CONFIG_CMD_READLINK=y
-CONFIG_CMD_GETOPT=y
-CONFIG_CMD_MENUTREE=y
-CONFIG_CMD_TIMEOUT=y
-CONFIG_CMD_DETECT=y
-CONFIG_CMD_STATE=y
-CONFIG_CMD_BOOTCHOOSER=y
-CONFIG_SERIAL_AMBA_PL011=y
-# CONFIG_SPI is not set
-CONFIG_MCI=y
-CONFIG_MCI_BCM283X=y
-CONFIG_WATCHDOG=y
-CONFIG_WATCHDOG_BCM2835=y
-CONFIG_GPIO_BCM283X=y
-# CONFIG_PINCTRL is not set
-CONFIG_REGULATOR=y
-CONFIG_FS_FAT=y
-CONFIG_FS_FAT_WRITE=y
-CONFIG_FS_FAT_LFN=y
-CONFIG_FS_SQUASHFS=y
-CONFIG_LZ4_DECOMPRESS=y

buildroot-external/board/rpi3/info

@@ -1,3 +0,0 @@
-BOARD_ID=rpi3
-BOARD_NAME="RaspberryPi 3"
-CHASSIS=embedded

buildroot-external/board/rpi3/patches/barebox/0001-HYP-mode-handling-and-RasPi-3-support.patch

@@ -1,295 +0,0 @@
-Those are needed to generate some of the ARM SEC and VIRT
-opcodes in a portable way.
-
-Signed-off-by: Lucas Stach <l.stach at pengutronix.de>
----
- arch/arm/include/asm/opcodes-virt.h |  39 ++++++
- arch/arm/include/asm/opcodes.h      | 231 ++++++++++++++++++++++++++++++++++++
- 2 files changed, 270 insertions(+)
- create mode 100644 arch/arm/include/asm/opcodes-virt.h
- create mode 100644 arch/arm/include/asm/opcodes.h
-
-diff --git a/arch/arm/include/asm/opcodes-virt.h b/arch/arm/include/asm/opcodes-virt.h
-new file mode 100644
-index 000000000000..efcfdf92d9d5
---- /dev/null
-+++ b/arch/arm/include/asm/opcodes-virt.h
-@@ -0,0 +1,39 @@
-+/*
-+ * opcodes-virt.h: Opcode definitions for the ARM virtualization extensions
-+ * Copyright (C) 2012  Linaro Limited
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License along
-+ * with this program; if not, write to the Free Software Foundation, Inc.,
-+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
-+ */
-+#ifndef __ASM_ARM_OPCODES_VIRT_H
-+#define __ASM_ARM_OPCODES_VIRT_H
-+
-+#include <asm/opcodes.h>
-+
-+#define __HVC(imm16) __inst_arm_thumb32(				\
-+	0xE1400070 | (((imm16) & 0xFFF0) << 4) | ((imm16) & 0x000F),	\
-+	0xF7E08000 | (((imm16) & 0xF000) << 4) | ((imm16) & 0x0FFF)	\
-+)
-+
-+#define __ERET	__inst_arm_thumb32(					\
-+	0xE160006E,							\
-+	0xF3DE8F00							\
-+)
-+
-+#define __MSR_ELR_HYP(regnum)	__inst_arm_thumb32(			\
-+	0xE12EF300 | regnum,						\
-+	0xF3808E30 | (regnum << 16)					\
-+)
-+
-+#endif /* ! __ASM_ARM_OPCODES_VIRT_H */
-diff --git a/arch/arm/include/asm/opcodes.h b/arch/arm/include/asm/opcodes.h
-new file mode 100644
-index 000000000000..a78bf5d2c518
---- /dev/null
-+++ b/arch/arm/include/asm/opcodes.h
-@@ -0,0 +1,231 @@
-+/*
-+ *  arch/arm/include/asm/opcodes.h
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ */
-+
-+#ifndef __ASM_ARM_OPCODES_H
-+#define __ASM_ARM_OPCODES_H
-+
-+#ifndef __ASSEMBLY__
-+#include <linux/linkage.h>
-+extern asmlinkage unsigned int arm_check_condition(u32 opcode, u32 psr);
-+#endif
-+
-+#define ARM_OPCODE_CONDTEST_FAIL   0
-+#define ARM_OPCODE_CONDTEST_PASS   1
-+#define ARM_OPCODE_CONDTEST_UNCOND 2
-+
-+
-+/*
-+ * Assembler opcode byteswap helpers.
-+ * These are only intended for use by this header: don't use them directly,
-+ * because they will be suboptimal in most cases.
-+ */
-+#define ___asm_opcode_swab32(x) (	\
-+	  (((x) << 24) & 0xFF000000)	\
-+	| (((x) <<  8) & 0x00FF0000)	\
-+	| (((x) >>  8) & 0x0000FF00)	\
-+	| (((x) >> 24) & 0x000000FF)	\
-+)
-+#define ___asm_opcode_swab16(x) (	\
-+	  (((x) << 8) & 0xFF00)		\
-+	| (((x) >> 8) & 0x00FF)		\
-+)
-+#define ___asm_opcode_swahb32(x) (	\
-+	  (((x) << 8) & 0xFF00FF00)	\
-+	| (((x) >> 8) & 0x00FF00FF)	\
-+)
-+#define ___asm_opcode_swahw32(x) (	\
-+	  (((x) << 16) & 0xFFFF0000)	\
-+	| (((x) >> 16) & 0x0000FFFF)	\
-+)
-+#define ___asm_opcode_identity32(x) ((x) & 0xFFFFFFFF)
-+#define ___asm_opcode_identity16(x) ((x) & 0xFFFF)
-+
-+
-+/*
-+ * Opcode byteswap helpers
-+ *
-+ * These macros help with converting instructions between a canonical integer
-+ * format and in-memory representation, in an endianness-agnostic manner.
-+ *
-+ * __mem_to_opcode_*() convert from in-memory representation to canonical form.
-+ * __opcode_to_mem_*() convert from canonical form to in-memory representation.
-+ *
-+ *
-+ * Canonical instruction representation:
-+ *
-+ *	ARM:		0xKKLLMMNN
-+ *	Thumb 16-bit:	0x0000KKLL, where KK < 0xE8
-+ *	Thumb 32-bit:	0xKKLLMMNN, where KK >= 0xE8
-+ *
-+ * There is no way to distinguish an ARM instruction in canonical representation
-+ * from a Thumb instruction (just as these cannot be distinguished in memory).
-+ * Where this distinction is important, it needs to be tracked separately.
-+ *
-+ * Note that values in the range 0x0000E800..0xE7FFFFFF intentionally do not
-+ * represent any valid Thumb-2 instruction.  For this range,
-+ * __opcode_is_thumb32() and __opcode_is_thumb16() will both be false.
-+ *
-+ * The ___asm variants are intended only for use by this header, in situations
-+ * involving inline assembler.  For .S files, the normal __opcode_*() macros
-+ * should do the right thing.
-+ */
-+#ifdef __ASSEMBLY__
-+
-+#define ___opcode_swab32(x) ___asm_opcode_swab32(x)
-+#define ___opcode_swab16(x) ___asm_opcode_swab16(x)
-+#define ___opcode_swahb32(x) ___asm_opcode_swahb32(x)
-+#define ___opcode_swahw32(x) ___asm_opcode_swahw32(x)
-+#define ___opcode_identity32(x) ___asm_opcode_identity32(x)
-+#define ___opcode_identity16(x) ___asm_opcode_identity16(x)
-+
-+#else /* ! __ASSEMBLY__ */
-+
-+#include <linux/types.h>
-+#include <linux/swab.h>
-+
-+#define ___opcode_swab32(x) swab32(x)
-+#define ___opcode_swab16(x) swab16(x)
-+#define ___opcode_swahb32(x) swahb32(x)
-+#define ___opcode_swahw32(x) swahw32(x)
-+#define ___opcode_identity32(x) ((u32)(x))
-+#define ___opcode_identity16(x) ((u16)(x))
-+
-+#endif /* ! __ASSEMBLY__ */
-+
-+
-+#ifdef CONFIG_CPU_ENDIAN_BE8
-+
-+#define __opcode_to_mem_arm(x) ___opcode_swab32(x)
-+#define __opcode_to_mem_thumb16(x) ___opcode_swab16(x)
-+#define __opcode_to_mem_thumb32(x) ___opcode_swahb32(x)
-+#define ___asm_opcode_to_mem_arm(x) ___asm_opcode_swab32(x)
-+#define ___asm_opcode_to_mem_thumb16(x) ___asm_opcode_swab16(x)
-+#define ___asm_opcode_to_mem_thumb32(x) ___asm_opcode_swahb32(x)
-+
-+#else /* ! CONFIG_CPU_ENDIAN_BE8 */
-+
-+#define __opcode_to_mem_arm(x) ___opcode_identity32(x)
-+#define __opcode_to_mem_thumb16(x) ___opcode_identity16(x)
-+#define ___asm_opcode_to_mem_arm(x) ___asm_opcode_identity32(x)
-+#define ___asm_opcode_to_mem_thumb16(x) ___asm_opcode_identity16(x)
-+#ifndef CONFIG_CPU_ENDIAN_BE32
-+/*
-+ * On BE32 systems, using 32-bit accesses to store Thumb instructions will not
-+ * work in all cases, due to alignment constraints.  For now, a correct
-+ * version is not provided for BE32.
-+ */
-+#define __opcode_to_mem_thumb32(x) ___opcode_swahw32(x)
-+#define ___asm_opcode_to_mem_thumb32(x) ___asm_opcode_swahw32(x)
-+#endif
-+
-+#endif /* ! CONFIG_CPU_ENDIAN_BE8 */
-+
-+#define __mem_to_opcode_arm(x) __opcode_to_mem_arm(x)
-+#define __mem_to_opcode_thumb16(x) __opcode_to_mem_thumb16(x)
-+#ifndef CONFIG_CPU_ENDIAN_BE32
-+#define __mem_to_opcode_thumb32(x) __opcode_to_mem_thumb32(x)
-+#endif
-+
-+/* Operations specific to Thumb opcodes */
-+
-+/* Instruction size checks: */
-+#define __opcode_is_thumb32(x) (		\
-+	   ((x) & 0xF8000000) == 0xE8000000	\
-+	|| ((x) & 0xF0000000) == 0xF0000000	\
-+)
-+#define __opcode_is_thumb16(x) (					\
-+	   ((x) & 0xFFFF0000) == 0					\
-+	&& !(((x) & 0xF800) == 0xE800 || ((x) & 0xF000) == 0xF000)	\
-+)
-+
-+/* Operations to construct or split 32-bit Thumb instructions: */
-+#define __opcode_thumb32_first(x) (___opcode_identity16((x) >> 16))
-+#define __opcode_thumb32_second(x) (___opcode_identity16(x))
-+#define __opcode_thumb32_compose(first, second) (			\
-+	  (___opcode_identity32(___opcode_identity16(first)) << 16)	\
-+	| ___opcode_identity32(___opcode_identity16(second))		\
-+)
-+#define ___asm_opcode_thumb32_first(x) (___asm_opcode_identity16((x) >> 16))
-+#define ___asm_opcode_thumb32_second(x) (___asm_opcode_identity16(x))
-+#define ___asm_opcode_thumb32_compose(first, second) (			    \
-+	  (___asm_opcode_identity32(___asm_opcode_identity16(first)) << 16) \
-+	| ___asm_opcode_identity32(___asm_opcode_identity16(second))	    \
-+)
-+
-+/*
-+ * Opcode injection helpers
-+ *
-+ * In rare cases it is necessary to assemble an opcode which the
-+ * assembler does not support directly, or which would normally be
-+ * rejected because of the CFLAGS or AFLAGS used to build the affected
-+ * file.
-+ *
-+ * Before using these macros, consider carefully whether it is feasible
-+ * instead to change the build flags for your file, or whether it really
-+ * makes sense to support old assembler versions when building that
-+ * particular kernel feature.
-+ *
-+ * The macros defined here should only be used where there is no viable
-+ * alternative.
-+ *
-+ *
-+ * __inst_arm(x): emit the specified ARM opcode
-+ * __inst_thumb16(x): emit the specified 16-bit Thumb opcode
-+ * __inst_thumb32(x): emit the specified 32-bit Thumb opcode
-+ *
-+ * __inst_arm_thumb16(arm, thumb): emit either the specified arm or
-+ *	16-bit Thumb opcode, depending on whether an ARM or Thumb-2
-+ *	kernel is being built
-+ *
-+ * __inst_arm_thumb32(arm, thumb): emit either the specified arm or
-+ *	32-bit Thumb opcode, depending on whether an ARM or Thumb-2
-+ *	kernel is being built
-+ *
-+ *
-+ * Note that using these macros directly is poor practice.  Instead, you
-+ * should use them to define human-readable wrapper macros to encode the
-+ * instructions that you care about.  In code which might run on ARMv7 or
-+ * above, you can usually use the __inst_arm_thumb{16,32} macros to
-+ * specify the ARM and Thumb alternatives at the same time.  This ensures
-+ * that the correct opcode gets emitted depending on the instruction set
-+ * used for the kernel build.
-+ *
-+ * Look at opcodes-virt.h for an example of how to use these macros.
-+ */
-+#include <linux/stringify.h>
-+
-+#define __inst_arm(x) ___inst_arm(___asm_opcode_to_mem_arm(x))
-+#define __inst_thumb32(x) ___inst_thumb32(				\
-+	___asm_opcode_to_mem_thumb16(___asm_opcode_thumb32_first(x)),	\
-+	___asm_opcode_to_mem_thumb16(___asm_opcode_thumb32_second(x))	\
-+)
-+#define __inst_thumb16(x) ___inst_thumb16(___asm_opcode_to_mem_thumb16(x))
-+
-+#ifdef CONFIG_THUMB2_BAREBOX
-+#define __inst_arm_thumb16(arm_opcode, thumb_opcode) \
-+	__inst_thumb16(thumb_opcode)
-+#define __inst_arm_thumb32(arm_opcode, thumb_opcode) \
-+	__inst_thumb32(thumb_opcode)
-+#else
-+#define __inst_arm_thumb16(arm_opcode, thumb_opcode) __inst_arm(arm_opcode)
-+#define __inst_arm_thumb32(arm_opcode, thumb_opcode) __inst_arm(arm_opcode)
-+#endif
-+
-+/* Helpers for the helpers.  Don't use these directly. */
-+#ifdef __ASSEMBLY__
-+#define ___inst_arm(x) .long x
-+#define ___inst_thumb16(x) .short x
-+#define ___inst_thumb32(first, second) .short first, second
-+#else
-+#define ___inst_arm(x) ".long " __stringify(x) "\n\t"
-+#define ___inst_thumb16(x) ".short " __stringify(x) "\n\t"
-+#define ___inst_thumb32(first, second) \
-+	".short " __stringify(first) ", " __stringify(second) "\n\t"
-+#endif
-+
-+#endif /* __ASM_ARM_OPCODES_H */
--- 
-2.16.1

buildroot-external/board/rpi3/patches/barebox/0002-safely-switch-from-HYP-to-SVC-mode-if-required.patch

@@ -1,85 +0,0 @@
-This is a port of the Linux safe_svcmode_maskall macro to
-the Barebox lowlevel init.
-
-Signed-off-by: Lucas Stach <l.stach at pengutronix.de>
----
- arch/arm/cpu/lowlevel.S       | 20 ++++++++++++++++----
- arch/arm/include/asm/system.h | 26 ++++++++++++++++++++++++++
- 2 files changed, 42 insertions(+), 4 deletions(-)
-
-diff --git a/arch/arm/cpu/lowlevel.S b/arch/arm/cpu/lowlevel.S
-index 7696a198e764..194ce0e7c274 100644
---- a/arch/arm/cpu/lowlevel.S
-+++ b/arch/arm/cpu/lowlevel.S
-@@ -1,16 +1,28 @@
- #include <linux/linkage.h>
- #include <init.h>
- #include <asm/system.h>
-+#include <asm/opcodes-virt.h>
- 
- .section ".text_bare_init_","ax"
- ENTRY(arm_cpu_lowlevel_init)
- 	/* save lr, since it may be banked away with a processor mode change */
- 	mov	r2, lr
-+
- 	/* set the cpu to SVC32 mode, mask irq and fiq */
--	mrs	r12, cpsr
--	bic	r12, r12, #0x1f
--	orr	r12, r12, #0xd3
--	msr	cpsr, r12
-+	mrs	r12 , cpsr
-+	eor	r12, r12, #HYP_MODE
-+	tst	r12, #MODE_MASK
-+	bic	r12 , r12 , #MODE_MASK
-+	orr	r12 , r12 , #(PSR_I_BIT | PSR_F_BIT | SVC_MODE)
-+THUMB(	orr	r12 , r12 , #PSR_T_BIT	)
-+	bne	1f
-+	orr	r12, r12, #PSR_A_BIT
-+	adr	lr, 2f
-+	msr	spsr_cxsf, r12
-+	__MSR_ELR_HYP(14)
-+	__ERET
-+1:	msr	cpsr_c, r12
-+2:
- 
- #if __LINUX_ARM_ARCH__ >= 6
- 	/*
-diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h
-index 57c76186b499..55e0f4090295 100644
---- a/arch/arm/include/asm/system.h
-+++ b/arch/arm/include/asm/system.h
-@@ -60,6 +60,32 @@
- #define CR_AFE  (1 << 29)	/* Access flag enable			*/
- #define CR_TE   (1 << 30)	/* Thumb exception enable		*/
- 
-+/*
-+ * PSR bits
-+ */
-+#define USR_MODE	0x00000010
-+#define FIQ_MODE	0x00000011
-+#define IRQ_MODE	0x00000012
-+#define SVC_MODE	0x00000013
-+#define ABT_MODE	0x00000017
-+#define HYP_MODE	0x0000001a
-+#define UND_MODE	0x0000001b
-+#define SYSTEM_MODE	0x0000001f
-+#define MODE32_BIT	0x00000010
-+#define MODE_MASK	0x0000001f
-+
-+#define PSR_T_BIT	0x00000020
-+#define PSR_F_BIT	0x00000040
-+#define PSR_I_BIT	0x00000080
-+#define PSR_A_BIT	0x00000100
-+#define PSR_E_BIT	0x00000200
-+#define PSR_J_BIT	0x01000000
-+#define PSR_Q_BIT	0x08000000
-+#define PSR_V_BIT	0x10000000
-+#define PSR_C_BIT	0x20000000
-+#define PSR_Z_BIT	0x40000000
-+#define PSR_N_BIT	0x80000000
-+
- #ifndef __ASSEMBLY__
- #if __LINUX_ARM_ARCH__ >= 7
- static inline unsigned int current_el(void)
--- 
-2.15.1

buildroot-external/board/rpi3/patches/barebox/0003-allow-secure-monitor-code-to-be-built-without-PSCI.patch

@@ -1,33 +0,0 @@
-The hyp mode handling added in the secure monitor code is also useful
-when Barebox doesn't have PSCI control. Allow to build without PSCI.
-
-Signed-off-by: Lucas Stach <l.stach at pengutronix.de>
----
- arch/arm/cpu/sm_as.S | 4 ++++
- 1 file changed, 4 insertions(+)
-
-diff --git a/arch/arm/cpu/sm_as.S b/arch/arm/cpu/sm_as.S
-index 09580e75de5f..0d01e1bf2435 100644
---- a/arch/arm/cpu/sm_as.S
-+++ b/arch/arm/cpu/sm_as.S
-@@ -129,7 +129,9 @@ secure_monitor:
- 	sub	sp, sp, #4*4			@ allocate result structure on stack
- 	mov	r12, sp
- 	push	{r4-r6, r12}
-+#ifdef CONFIG_ARM_PSCI
- 	bl	psci_entry
-+#endif
- 	pop	{r4-r6, r12}
- 	ldm	r12, {r0-r3}
- 	add	sp, sp, #4*4
-@@ -163,6 +165,8 @@ ENTRY(psci_cpu_entry)
- 	mcr	p15, 0, r0, c1, c0, 1	@ ACTLR
- 
- 	bl	secure_monitor_stack_setup
-+#ifdef CONFIG_ARM_PSCI
- 	bl	psci_cpu_entry_c
-+#endif
- 
- ENDPROC(psci_cpu_entry)
--- 
-2.15.1

buildroot-external/board/rpi3/patches/barebox/0004-add-file-for-HYP-mode-related-setup.patch

@@ -1,192 +0,0 @@
-From 6add848d66a7bdebed73416a3cf27b8bf10a2cd8 Mon Sep 17 00:00:00 2001
-From: Pascal Vizeli <pvizeli@syshack.ch>
-Date: Sat, 19 May 2018 17:58:01 +0200
-Subject: [PATCH 1/1] p2
-
----
- arch/arm/cpu/Makefile         |   7 +++
- arch/arm/cpu/hyp.S            | 115 ++++++++++++++++++++++++++++++++++++++++++
- arch/arm/cpu/sm_as.S          |  11 ----
- arch/arm/include/asm/secure.h |   2 +
- 4 files changed, 124 insertions(+), 11 deletions(-)
- create mode 100644 arch/arm/cpu/hyp.S
-
-diff --git a/arch/arm/cpu/Makefile b/arch/arm/cpu/Makefile
-index 0316d25..6d67b42 100644
---- a/arch/arm/cpu/Makefile
-+++ b/arch/arm/cpu/Makefile
-@@ -9,6 +9,13 @@ obj-y += start.o entry.o
- 
- obj-pbl-y += setupc$(S64).o cache$(S64).o
- 
-+ifeq ($(CONFIG_CPU_64v8),)
-+obj-y += hyp.o
-+AFLAGS_hyp.o :=-Wa,-march=armv7-a
-+pbl-y += hyp.o
-+AFLAGS_pbl-hyp.o :=-Wa,-march=armv7-a
-+endif
-+
- #
- # Any variants can be called as start-armxyz.S
- #
-diff --git a/arch/arm/cpu/hyp.S b/arch/arm/cpu/hyp.S
-new file mode 100644
-index 0000000..435d416
---- /dev/null
-+++ b/arch/arm/cpu/hyp.S
-@@ -0,0 +1,115 @@
-+#include <linux/linkage.h>
-+#include <asm/system.h>
-+#include <asm/opcodes-virt.h>
-+
-+.arch_extension sec
-+.arch_extension virt
-+
-+.section ".text_bare_init_","ax"
-+
-+.data
-+	.align  2
-+ENTRY(__boot_cpu_mode)
-+	.long   0
-+.text
-+
-+ENTRY(__hyp_install)
-+	mrs	r12, cpsr
-+	and	r12, r12, #MODE_MASK
-+
-+	@ Save the initial CPU state
-+	adr	r0, .L__boot_cpu_mode_offset
-+	ldr	r1, [r0]
-+	str	r12, [r0, r1]
-+
-+	cmp	r12, #HYP_MODE
-+	movne	pc, lr			@ give up if the CPU is not in HYP mode
-+
-+	@ Now install the hypervisor stub:
-+	adr	r12, __hyp_vectors
-+	mcr	p15, 4, r12, c12, c0, 0	@ set hypervisor vector base (HVBAR)
-+
-+	@ Disable all traps, so we don't get any nasty surprise
-+	mov	r12, #0
-+	mcr	p15, 4, r12, c1, c1, 0	@ HCR
-+	mcr	p15, 4, r12, c1, c1, 2	@ HCPTR
-+	mcr	p15, 4, r12, c1, c1, 3	@ HSTR
-+
-+THUMB(	orr	r12, #(1 << 30)	)	@ HSCTLR.TE
-+	mcr	p15, 4, r12, c1, c0, 0	@ HSCTLR
-+
-+	mrc	p15, 4, r12, c1, c1, 1	@ HDCR
-+	and	r12, #0x1f		@ Preserve HPMN
-+	mcr	p15, 4, r12, c1, c1, 1	@ HDCR
-+
-+	@ Make sure NS-SVC is initialised appropriately
-+	mrc	p15, 0, r12, c1, c0, 0	@ SCTLR
-+	orr	r12, #(1 << 5)		@ CP15 barriers enabled
-+	bic	r12, #(3 << 7)		@ Clear SED/ITD for v8 (RES0 for v7)
-+	bic	r12, #(3 << 19)		@ WXN and UWXN disabled
-+	mcr	p15, 0, r12, c1, c0, 0	@ SCTLR
-+
-+	mrc	p15, 0, r12, c0, c0, 0	@ MIDR
-+	mcr	p15, 4, r12, c0, c0, 0	@ VPIDR
-+
-+	mrc	p15, 0, r12, c0, c0, 5	@ MPIDR
-+	mcr	p15, 4, r12, c0, c0, 5	@ VMPIDR
-+	bx	lr
-+ENDPROC(__hyp_install)
-+
-+ENTRY(armv7_hyp_install)
-+	mov	r2, lr
-+
-+	bl	__hyp_install
-+
-+	/* set the cpu to SVC32 mode, mask irq and fiq */
-+	mrs	r12 , cpsr
-+	eor	r12, r12, #HYP_MODE
-+	tst	r12, #MODE_MASK
-+	bic	r12 , r12 , #MODE_MASK
-+	orr	r12 , r12 , #(PSR_I_BIT | PSR_F_BIT | SVC_MODE)
-+THUMB(	orr	r12 , r12 , #PSR_T_BIT	)
-+	bne	1f
-+	orr	r12, r12, #PSR_A_BIT
-+	adr	lr, 2f
-+	msr	spsr_cxsf, r12
-+	__MSR_ELR_HYP(14)
-+	__ERET
-+1:	msr	cpsr_c, r12
-+2:
-+	mov	pc, r2
-+ENDPROC(armv7_hyp_install)
-+
-+ENTRY(armv7_switch_to_hyp)
-+	mov	r0, lr
-+	mov	r1, sp		@ save SVC copy of LR and SP
-+	isb
-+	hvc #0			@ for older asm: .byte 0x70, 0x00, 0x40, 0xe1
-+	mov	sp, r1
-+	mov	lr, r0		@ restore SVC copy of LR and SP
-+
-+	bx	lr
-+ENDPROC(armv7_switch_to_hyp)
-+
-+.align 2
-+.L__boot_cpu_mode_offset:
-+	.long	__boot_cpu_mode - .
-+
-+/* The HYP trap is crafted to match armv7_switch_to_hyp() */
-+__hyp_do_trap:
-+	mov lr, r0
-+	mov sp, r1
-+	bx  lr
-+ENDPROC(__hyp_do_trap)
-+
-+.align 5
-+__hyp_vectors:
-+__hyp_reset:	W(b)	.
-+__hyp_und:	W(b)	.
-+__hyp_svc:	W(b)	.
-+__hyp_pabort:	W(b)	.
-+__hyp_dabort:	W(b)	.
-+__hyp_trap:	W(b)	__hyp_do_trap
-+__hyp_irq:	W(b)	.
-+__hyp_fiq:	W(b)	.
-+ENDPROC(__hyp_vectors)
-diff --git a/arch/arm/cpu/sm_as.S b/arch/arm/cpu/sm_as.S
-index 0d01e1b..de6cd04 100644
---- a/arch/arm/cpu/sm_as.S
-+++ b/arch/arm/cpu/sm_as.S
-@@ -148,17 +148,6 @@ hyp_trap:
-         mov pc, lr                              @ do no switch modes, but
-                                                 @ return to caller
- 
--ENTRY(armv7_switch_to_hyp)
--	mov	r0, lr
--	mov	r1, sp		@ save SVC copy of LR and SP
--	isb
--	hvc #0			@ for older asm: .byte 0x70, 0x00, 0x40, 0xe1
--	mov	sp, r1
--	mov	lr, r0		@ restore SVC copy of LR and SP
--
--	bx	lr
--ENDPROC(armv7_switch_to_hyp)
--
- ENTRY(psci_cpu_entry)
- 	mrc	p15, 0, r0, c1, c0, 1	@ ACTLR
- 	orr	r0, r0, #(1 << 6)	@ Set SMP bit
-diff --git a/arch/arm/include/asm/secure.h b/arch/arm/include/asm/secure.h
-index a4cb1f6..54cc052 100644
---- a/arch/arm/include/asm/secure.h
-+++ b/arch/arm/include/asm/secure.h
-@@ -6,8 +6,10 @@
- int armv7_secure_monitor_install(void);
- int __armv7_secure_monitor_install(void);
- void armv7_switch_to_hyp(void);
-+void armv7_hyp_install(void);
- 
- extern unsigned char secure_monitor_init_vectors[];
-+extern int __boot_cpu_mode;
- 
- enum arm_security_state {
- 	ARM_STATE_SECURE,
--- 
-2.7.4
-

buildroot-external/board/rpi3/patches/barebox/0005-dont-try-to-install-secure-monitor-when-entered-in-HYP-mode.patch

@@ -1,25 +0,0 @@
-When Barebox has been entered in HYP mode, the CPU is already switched
-to the non-secure world and it's not possible for Barebox to install
-it's own secure monitor.
-
-Signed-off-by: Lucas Stach <l.stach at pengutronix.de>
----
- arch/arm/cpu/sm.c | 3 +++
- 1 file changed, 3 insertions(+)
-
-diff --git a/arch/arm/cpu/sm.c b/arch/arm/cpu/sm.c
-index 5808dfd92bdc..71bb394c8540 100644
---- a/arch/arm/cpu/sm.c
-+++ b/arch/arm/cpu/sm.c
-@@ -184,6 +184,9 @@ int armv7_secure_monitor_install(void)
- 		return -EINVAL;
- 	}
- 
-+	if (__boot_cpu_mode == HYP_MODE)
-+		return 0;
-+
- 	mmuon = get_cr() & CR_M;
- 
- 	vbar = get_vbar();
--- 
-2.15.1

buildroot-external/board/rpi3/patches/barebox/0006-default-to-starting-kernel-in-HYP-mode-when-entered-in-HYP.patch

@@ -1,26 +0,0 @@
-When Barebox has been entered in HYP mode, there is a high chance that
-the kernel is  intended to be started in HYP mode also. Get this
-default into place.
-
-Signed-off-by: Lucas Stach <l.stach at pengutronix.de>
----
- arch/arm/cpu/sm.c | 3 +++
- 1 file changed, 3 insertions(+)
-
-diff --git a/arch/arm/cpu/sm.c b/arch/arm/cpu/sm.c
-index 71bb394c8540..3369fbb5ff1a 100644
---- a/arch/arm/cpu/sm.c
-+++ b/arch/arm/cpu/sm.c
-@@ -264,6 +264,9 @@ static int sm_init(void)
- 				  bootm_secure_state_names,
- 				  ARRAY_SIZE(bootm_secure_state_names));
- 
-+	if (__boot_cpu_mode == HYP_MODE)
-+		bootm_secure_state = ARM_STATE_HYP;
-+
- 	return 0;
- }
- device_initcall(sm_init);
-\ No newline at end of file
--- 
-2.15.1

buildroot-external/board/rpi3/patches/barebox/0007-install-HYP-vectors-at-PBL-and-Barebox-entry.patch

@@ -1,84 +0,0 @@
-From f984f8cf4c07f24af7855a4fd69afa3e656238c2 Mon Sep 17 00:00:00 2001
-From: Pascal Vizeli <pvizeli@syshack.ch>
-Date: Sat, 19 May 2018 17:24:42 +0200
-Subject: [PATCH 1/1] p4
-
----
- arch/arm/cpu/lowlevel.S   | 3 +++
- arch/arm/cpu/start-pbl.c  | 3 +++
- arch/arm/cpu/start.c      | 3 +++
- arch/arm/cpu/uncompress.c | 4 ++++
- 4 files changed, 13 insertions(+)
-
-diff --git a/arch/arm/cpu/lowlevel.S b/arch/arm/cpu/lowlevel.S
-index 194ce0e..28ad850 100644
---- a/arch/arm/cpu/lowlevel.S
-+++ b/arch/arm/cpu/lowlevel.S
-@@ -8,6 +8,9 @@ ENTRY(arm_cpu_lowlevel_init)
- 	/* save lr, since it may be banked away with a processor mode change */
- 	mov	r2, lr
- 
-+	/* careful: the hyp install corrupts r0 and r1 */
-+	bl	__hyp_install
-+
- 	/* set the cpu to SVC32 mode, mask irq and fiq */
- 	mrs	r12 , cpsr
- 	eor	r12, r12, #HYP_MODE
-diff --git a/arch/arm/cpu/start-pbl.c b/arch/arm/cpu/start-pbl.c
-index 16159d7..3f9959e 100644
---- a/arch/arm/cpu/start-pbl.c
-+++ b/arch/arm/cpu/start-pbl.c
-@@ -98,5 +98,8 @@ __noreturn void barebox_single_pbl_start(unsigned long membase,
- 	else
- 		barebox = (void *)barebox_base;
- 
-+	if (__boot_cpu_mode == HYP_MODE)
-+		armv7_switch_to_hyp();
-+
- 	barebox(membase, memsize, boarddata);
- }
-diff --git a/arch/arm/cpu/start.c b/arch/arm/cpu/start.c
-index 68fff89..1ee13c0 100644
---- a/arch/arm/cpu/start.c
-+++ b/arch/arm/cpu/start.c
-@@ -24,6 +24,7 @@
- #include <asm/barebox-arm-head.h>
- #include <asm-generic/memory_layout.h>
- #include <asm/sections.h>
-+#include <asm/secure.h>
- #include <asm/unaligned.h>
- #include <asm/cache.h>
- #include <asm/mmu.h>
-@@ -145,6 +146,8 @@ __noreturn void barebox_non_pbl_start(unsigned long membase,
- 	unsigned long malloc_start, malloc_end;
- 	unsigned long barebox_size = barebox_image_size + MAX_BSS_SIZE;
- 
-+	armv7_hyp_install();
-+
- 	if (IS_ENABLED(CONFIG_RELOCATABLE)) {
- 		unsigned long barebox_base = arm_mem_barebox_image(membase,
- 								   endmem,
-diff --git a/arch/arm/cpu/uncompress.c b/arch/arm/cpu/uncompress.c
-index b07087e..57f324b 100644
---- a/arch/arm/cpu/uncompress.c
-+++ b/arch/arm/cpu/uncompress.c
-@@ -27,6 +27,7 @@
- #include <asm/barebox-arm-head.h>
- #include <asm-generic/memory_layout.h>
- #include <asm/sections.h>
-+#include <asm/secure.h>
- #include <asm/cache.h>
- #include <asm/mmu.h>
- #include <asm/unaligned.h>
-@@ -108,5 +109,8 @@ void __noreturn barebox_multi_pbl_start(unsigned long membase,
- 
- 	pr_debug("jumping to uncompressed image at 0x%p\n", barebox);
- 
-+	if (__boot_cpu_mode == HYP_MODE)
-+		armv7_switch_to_hyp();
-+
- 	barebox(membase, memsize, boarddata);
- }
--- 
-2.7.4
-

buildroot-external/board/rpi3/patches/barebox/0009-add-revision-IDs-for-Pi-3-Model-B-and-Pi-Zero.patch

@@ -1,38 +0,0 @@
-From: Enrico Joerns <ejo at pengutronix.de>
-
-Signed-off-by: Enrico Joerns <ejo at pengutronix.de>
----
- arch/arm/boards/raspberry-pi/rpi-common.c | 2 ++
- arch/arm/mach-bcm283x/include/mach/mbox.h | 4 ++++
- 2 files changed, 6 insertions(+)
-
-diff --git a/arch/arm/boards/raspberry-pi/rpi-common.c b/arch/arm/boards/raspberry-pi/rpi-common.c
-index 6e375bc984de..aec8cb27ed40 100644
---- a/arch/arm/boards/raspberry-pi/rpi-common.c
-+++ b/arch/arm/boards/raspberry-pi/rpi-common.c
-@@ -174,6 +174,8 @@ const struct rpi_model rpi_models_old_scheme[] = {
- const struct rpi_model rpi_models_new_scheme[] = {
- 	RPI_MODEL(0, "Unknown model", NULL),
- 	RPI_MODEL(BCM2836_BOARD_REV_2_B, "2 Model B", rpi_b_plus_init),
-+	RPI_MODEL(BCM2837_BOARD_REV_3_B, "3 Model B", rpi_b_plus_init),
-+	RPI_MODEL(BCM2837_BOARD_REV_ZERO, "Zero", rpi_b_plus_init),
- };
- 
- static int rpi_board_rev = 0;
-diff --git a/arch/arm/mach-bcm283x/include/mach/mbox.h b/arch/arm/mach-bcm283x/include/mach/mbox.h
-index 2b5aea88ee0a..4cddf99a8429 100644
---- a/arch/arm/mach-bcm283x/include/mach/mbox.h
-+++ b/arch/arm/mach-bcm283x/include/mach/mbox.h
-@@ -129,6 +129,10 @@ struct bcm2835_mbox_tag_hdr {
- 
- /* RPi 2 */
- #define BCM2836_BOARD_REV_2_B		0x4
-+/* RPi 3 */
-+#define BCM2837_BOARD_REV_3_B		0x8
-+/* Zero */
-+#define BCM2837_BOARD_REV_ZERO		0x9
- 
- /*
-  * 0x2..0xf from:
--- 
-2.15.1

buildroot-external/board/rpi3/patches/barebox/0010-rpi-add-raspberry-pi-3-support.patch

@@ -1,136 +0,0 @@
-This adds basic support at the same feature level as the other
-supported raspberry pi boards.
-
-Signed-off-by: Lucas Stach <l.stach at pengutronix.de>
----
- arch/arm/boards/raspberry-pi/lowlevel.c | 14 ++++++++++++--
- arch/arm/configs/rpi_defconfig          |  2 ++
- arch/arm/dts/Makefile                   |  1 +
- arch/arm/dts/bcm2837-rpi-3.dts          | 15 +++++++++++++++
- arch/arm/mach-bcm283x/Kconfig           |  6 ++++++
- arch/arm/mach-bcm283x/core.c            |  1 +
- images/Makefile.bcm283x                 |  4 ++++
- 7 files changed, 41 insertions(+), 2 deletions(-)
- create mode 100644 arch/arm/dts/bcm2837-rpi-3.dts
-
-diff --git a/arch/arm/boards/raspberry-pi/lowlevel.c b/arch/arm/boards/raspberry-pi/lowlevel.c
-index 4e71e29e0c0b..5ca0d3877069 100644
---- a/arch/arm/boards/raspberry-pi/lowlevel.c
-+++ b/arch/arm/boards/raspberry-pi/lowlevel.c
-@@ -1,7 +1,7 @@
-+#include <asm/barebox-arm.h>
-+#include <asm/cache.h>
- #include <common.h>
- #include <linux/sizes.h>
--#include <asm/barebox-arm.h>
--#include <asm/barebox-arm-head.h>
- #include <mach/platform.h>
- 
- extern char __dtb_bcm2835_rpi_start[];
-@@ -23,3 +23,13 @@ ENTRY_FUNCTION(start_raspberry_pi2, r0, r1, r2)
- 
- 	barebox_arm_entry(BCM2835_SDRAM_BASE, SZ_512M, fdt);
- }
-+
-+extern char __dtb_bcm2837_rpi_3_start[];
-+ENTRY_FUNCTION(start_raspberry_pi3, r0, r1, r2)
-+{
-+	void *fdt = __dtb_bcm2837_rpi_3_start - get_runtime_offset();
-+
-+	arm_cpu_lowlevel_init();
-+
-+	barebox_arm_entry(BCM2835_SDRAM_BASE, SZ_512M, fdt);
-+}
-diff --git a/arch/arm/configs/rpi_defconfig b/arch/arm/configs/rpi_defconfig
-index 6dc90c59b36d..34070a05abe7 100644
---- a/arch/arm/configs/rpi_defconfig
-+++ b/arch/arm/configs/rpi_defconfig
-@@ -1,9 +1,11 @@
- CONFIG_ARCH_BCM283X=y
- CONFIG_MACH_RPI=y
- CONFIG_MACH_RPI2=y
-+CONFIG_MACH_RPI3=y
- CONFIG_AEABI=y
- CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
- CONFIG_ARM_UNWIND=y
-+CONFIG_IMAGE_COMPRESSION_NONE=y
- CONFIG_MMU=y
- CONFIG_MALLOC_TLSF=y
- CONFIG_KALLSYMS=y
-diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
-index 0526a6f40724..0eab313c5011 100644
---- a/arch/arm/dts/Makefile
-+++ b/arch/arm/dts/Makefile
-@@ -66,6 +66,7 @@ pbl-dtb-$(CONFIG_MACH_PHYTEC_SOM_RK3288) += rk3288-phycore-som.dtb.o
- pbl-dtb-$(CONFIG_MACH_REALQ7) += imx6q-dmo-edmqmx6.dtb.o
- pbl-dtb-$(CONFIG_MACH_RPI) += bcm2835-rpi.dtb.o
- pbl-dtb-$(CONFIG_MACH_RPI2) += bcm2836-rpi-2.dtb.o
-+pbl-dtb-$(CONFIG_MACH_RPI3) += bcm2837-rpi-3.dtb.o
- pbl-dtb-$(CONFIG_MACH_SABRELITE) += imx6q-sabrelite.dtb.o imx6dl-sabrelite.dtb.o
- pbl-dtb-$(CONFIG_MACH_SABRESD) += imx6q-sabresd.dtb.o
- pbl-dtb-$(CONFIG_MACH_FREESCALE_IMX6SX_SABRESDB) += imx6sx-sdb.dtb.o
-diff --git a/arch/arm/dts/bcm2837-rpi-3.dts b/arch/arm/dts/bcm2837-rpi-3.dts
-new file mode 100644
-index 000000000000..f8c58c570137
---- /dev/null
-+++ b/arch/arm/dts/bcm2837-rpi-3.dts
-@@ -0,0 +1,15 @@
-+#include <arm64/broadcom/bcm2837-rpi-3-b.dts>
-+
-+/ {
-+	chosen {
-+		stdout-path = &uart0;
-+	};
-+
-+	memory {
-+		reg = <0x0 0x0>;
-+	};
-+};
-+
-+&uart0 {
-+	status = "okay";
-+};
-diff --git a/arch/arm/mach-bcm283x/Kconfig b/arch/arm/mach-bcm283x/Kconfig
-index 1457f114ccaa..af2f88c47acb 100644
---- a/arch/arm/mach-bcm283x/Kconfig
-+++ b/arch/arm/mach-bcm283x/Kconfig
-@@ -19,6 +19,12 @@ config MACH_RPI2
- 	select CPU_V7
- 	select MACH_RPI_COMMON
- 
-+config MACH_RPI3
-+	bool "RaspberryPi 3 (BCM2837/CORTEX-A53)"
-+	select CPU_V7
-+	select MACH_RPI_COMMON
-+	select ARM_SECURE_MONITOR
-+
- endmenu
- 
- config MACH_RPI_DEBUG_UART_BASE
-diff --git a/arch/arm/mach-bcm283x/core.c b/arch/arm/mach-bcm283x/core.c
-index fddcb0d1a1d4..26f0996b1cb8 100644
---- a/arch/arm/mach-bcm283x/core.c
-+++ b/arch/arm/mach-bcm283x/core.c
-@@ -41,6 +41,7 @@ static int bcm2835_clk_init(void)
- 	clk = clk_fixed("uart0-pl0110", 3 * 1000 * 1000);
- 	clk_register_clkdev(clk, NULL, "uart0-pl0110");
- 	clk_register_clkdev(clk, NULL, "20201000.serial");
-+	clk_register_clkdev(clk, NULL, "3f201000.serial");
- 
- 	clk = clk_fixed("bcm2835-cs", 1 * 1000 * 1000);
- 	clk_register_clkdev(clk, NULL, "bcm2835-cs");
-diff --git a/images/Makefile.bcm283x b/images/Makefile.bcm283x
-index d59ef043f05c..d14e648926ac 100644
---- a/images/Makefile.bcm283x
-+++ b/images/Makefile.bcm283x
-@@ -9,3 +9,7 @@ image-$(CONFIG_MACH_RPI) += barebox-raspberry-pi-1.img
- pblx-$(CONFIG_MACH_RPI2) += start_raspberry_pi2
- FILE_barebox-raspberry-pi-2.img = start_raspberry_pi2.pblx
- image-$(CONFIG_MACH_RPI2) += barebox-raspberry-pi-2.img
-+
-+pblx-$(CONFIG_MACH_RPI3) += start_raspberry_pi3
-+FILE_barebox-raspberry-pi-3.img = start_raspberry_pi3.pblx
-+image-$(CONFIG_MACH_RPI3) += barebox-raspberry-pi-3.img
-\ No newline at end of file
--- 
-2.15.1

buildroot-external/board/rpi3/post-image.sh

@@ -1,50 +0,0 @@
-#!/bin/bash
-set -e
-
-SCRIPT_DIR=${BR2_EXTERNAL_HASSOS_PATH}/scripts
-BOARD_DIR=${2}
-BOOT_DATA=${BINARIES_DIR}/boot
-
-. ${SCRIPT_DIR}/hdd-image.sh
-. ${BR2_EXTERNAL_HASSOS_PATH}/info
-. ${BOARD_DIR}/info
-
-# Filename
-IMAGE_FILE=${BINARIES_DIR}/${HASSOS_ID}_${BOARD_ID}-${VERSION_MAJOR}.${VERSION_BUILD}.img
-
-# Init boot data
-rm -rf ${BOOT_DATA}
-mkdir -p ${BOOT_DATA}
-
-cp ${BINARIES_DIR}/barebox.bin ${BOOT_DATA}/
-cp -t ${BOOT_DATA} \
-    ${BINARIES_DIR}/bcm2710-rpi-3-b.dtb \
-    ${BINARIES_DIR}/bcm2710-rpi-3-b-plus.dtb \
-    ${BINARIES_DIR}/bcm2710-rpi-cm3.dtb \
-    ${BINARIES_DIR}/rpi-firmware/bootcode.bin \
-    ${BINARIES_DIR}/rpi-firmware/fixup.dat \
-    ${BINARIES_DIR}/rpi-firmware/start.elf
-cp -r ${BINARIES_DIR}/rpi-firmware/overlays ${BOOT_DATA}/
-
-# Update Boot options
-(
-    echo "kernel=barebox.bin"
-    echo "cmdline=\"\""
-    echo "gpu_mem=16"
-    echo "disable_splash=1"
-    echo "dtparam=i2c_arm=on"
-    echo "dtparam=spi=on"
-    echo "dtparam=audio=on"
-) > ${BOOT_DATA}/config.txt
-
-touch ${BOOT_DATA}/cmdline.txt
-
-# Create other layers
-create_boot_image ${BINARIES_DIR}
-create_overlay_image ${BINARIES_DIR}
-
-create_disk_image ${BINARIES_DIR} ${IMAGE_FILE} 2
-fix_disk_image_mbr ${IMAGE_FILE}
-
-rm -rf ${IMAGE_FILE}.gz
-gzip ${IMAGE_FILE}

buildroot-external/board/tinker/info

@@ -0,0 +1,7 @@
+BOARD_ID=tinker
+BOARD_NAME="Tinker Board"
+CHASSIS=embedded
+BOOTLOADER=uboot
+KERNEL_FILE=zImage
+BOOT_SYS=spl
+BOOT_ENV_SIZE=0x8000

buildroot-external/board/tinker/kernel.config

@@ -0,0 +1,902 @@
+# CONFIG_LOCALVERSION_AUTO is not set
+CONFIG_KERNEL_LZ4=y
+CONFIG_DEFAULT_HOSTNAME="localhost"
+CONFIG_SYSVIPC=y
+CONFIG_POSIX_MQUEUE=y
+CONFIG_USELIB=y
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_TASKSTATS=y
+CONFIG_TASK_DELAY_ACCT=y
+CONFIG_TASK_XACCT=y
+CONFIG_TASK_IO_ACCOUNTING=y
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_LOG_BUF_SHIFT=18
+CONFIG_CGROUPS=y
+CONFIG_MEMCG=y
+CONFIG_MEMCG_SWAP=y
+CONFIG_BLK_CGROUP=y
+CONFIG_CGROUP_SCHED=y
+CONFIG_CFS_BANDWIDTH=y
+CONFIG_RT_GROUP_SCHED=y
+CONFIG_CGROUP_PIDS=y
+CONFIG_CGROUP_RDMA=y
+CONFIG_CGROUP_FREEZER=y
+CONFIG_CPUSETS=y
+CONFIG_CGROUP_DEVICE=y
+CONFIG_CGROUP_CPUACCT=y
+CONFIG_CGROUP_PERF=y
+CONFIG_NAMESPACES=y
+CONFIG_USER_NS=y
+CONFIG_BLK_DEV_INITRD=y
+# CONFIG_RD_BZIP2 is not set
+# CONFIG_RD_LZMA is not set
+# CONFIG_RD_LZO is not set
+# CONFIG_RD_LZ4 is not set
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_EMBEDDED=y
+# CONFIG_COMPAT_BRK is not set
+CONFIG_PROFILING=y
+CONFIG_MODULES=y
+CONFIG_MODULE_FORCE_LOAD=y
+CONFIG_MODULE_UNLOAD=y
+CONFIG_MODULE_FORCE_UNLOAD=y
+CONFIG_BLK_DEV_THROTTLING=y
+CONFIG_PARTITION_ADVANCED=y
+CONFIG_MAC_PARTITION=y
+CONFIG_CFQ_GROUP_IOSCHED=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_ARM_THUMBEE=y
+# CONFIG_ARM_ERRATA_643719 is not set
+CONFIG_ARM_ERRATA_818325_852422=y
+CONFIG_ARM_ERRATA_821420=y
+CONFIG_ARM_ERRATA_825619=y
+CONFIG_SMP=y
+CONFIG_PREEMPT=y
+CONFIG_HZ_1000=y
+CONFIG_HIGHMEM=y
+# CONFIG_HIGHPTE is not set
+# CONFIG_COMPACTION is not set
+CONFIG_DEFAULT_MMAP_MIN_ADDR=32768
+CONFIG_ZSMALLOC=y
+CONFIG_SECCOMP=y
+CONFIG_ZBOOT_ROM_TEXT=0x0
+CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_CPU_FREQ=y
+CONFIG_CPU_FREQ_STAT=y
+CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
+CONFIG_CPU_FREQ_GOV_POWERSAVE=y
+CONFIG_CPU_FREQ_GOV_USERSPACE=y
+CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
+CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y
+CONFIG_CPUFREQ_DT=y
+CONFIG_CPU_IDLE=y
+CONFIG_CPU_IDLE_GOV_LADDER=y
+CONFIG_VFP=y
+CONFIG_NEON=y
+CONFIG_PM_DEBUG=y
+CONFIG_PM_ADVANCED_DEBUG=y
+CONFIG_NET=y
+CONFIG_PACKET=y
+CONFIG_PACKET_DIAG=m
+CONFIG_UNIX=y
+CONFIG_UNIX_DIAG=m
+CONFIG_TLS=m
+CONFIG_XFRM_USER=y
+CONFIG_NET_KEY=y
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+CONFIG_IP_ADVANCED_ROUTER=y
+CONFIG_IP_MULTIPLE_TABLES=y
+CONFIG_IP_ROUTE_MULTIPATH=y
+CONFIG_IP_ROUTE_VERBOSE=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
+CONFIG_IP_PNP_RARP=y
+CONFIG_NET_IPIP=m
+CONFIG_NET_IPGRE_DEMUX=m
+CONFIG_NET_IPGRE=m
+CONFIG_NET_IPGRE_BROADCAST=y
+CONFIG_IP_MROUTE=y
+CONFIG_IP_MROUTE_MULTIPLE_TABLES=y
+CONFIG_IP_PIMSM_V1=y
+CONFIG_IP_PIMSM_V2=y
+CONFIG_NET_IPVTI=m
+CONFIG_NET_FOU_IP_TUNNELS=y
+CONFIG_INET_AH=y
+CONFIG_INET_ESP=y
+CONFIG_INET_ESP_OFFLOAD=m
+CONFIG_INET_IPCOMP=y
+CONFIG_INET_DIAG=m
+CONFIG_INET_UDP_DIAG=m
+CONFIG_INET_RAW_DIAG=m
+CONFIG_TCP_CONG_ADVANCED=y
+CONFIG_TCP_CONG_HSTCP=m
+CONFIG_TCP_CONG_HYBLA=m
+CONFIG_TCP_CONG_NV=m
+CONFIG_TCP_CONG_SCALABLE=m
+CONFIG_TCP_CONG_LP=y
+CONFIG_TCP_CONG_VENO=m
+CONFIG_TCP_CONG_YEAH=m
+CONFIG_TCP_CONG_ILLINOIS=m
+CONFIG_TCP_CONG_DCTCP=m
+CONFIG_TCP_CONG_CDG=m
+CONFIG_TCP_CONG_BBR=m
+CONFIG_TCP_MD5SIG=y
+CONFIG_INET6_AH=y
+CONFIG_INET6_ESP=y
+CONFIG_IPV6_MULTIPLE_TABLES=y
+CONFIG_NETLABEL=y
+CONFIG_NETWORK_SECMARK=y
+CONFIG_NETFILTER=y
+CONFIG_BRIDGE_NETFILTER=y
+CONFIG_NF_CONNTRACK=m
+CONFIG_NF_LOG_NETDEV=m
+CONFIG_NF_CONNTRACK_SECMARK=y
+CONFIG_NF_CONNTRACK_EVENTS=y
+CONFIG_NF_CONNTRACK_TIMEOUT=y
+CONFIG_NF_CONNTRACK_TIMESTAMP=y
+CONFIG_NF_CONNTRACK_AMANDA=m
+CONFIG_NF_CONNTRACK_FTP=m
+CONFIG_NF_CONNTRACK_H323=m
+CONFIG_NF_CONNTRACK_IRC=m
+CONFIG_NF_CONNTRACK_NETBIOS_NS=m
+CONFIG_NF_CONNTRACK_SNMP=m
+CONFIG_NF_CONNTRACK_PPTP=m
+CONFIG_NF_CONNTRACK_SANE=m
+CONFIG_NF_CONNTRACK_SIP=m
+CONFIG_NF_CONNTRACK_TFTP=m
+CONFIG_NF_CT_NETLINK=m
+CONFIG_NF_CT_NETLINK_TIMEOUT=m
+CONFIG_NF_CT_NETLINK_HELPER=m
+CONFIG_NETFILTER_NETLINK_GLUE_CT=y
+CONFIG_NF_TABLES=m
+CONFIG_NF_TABLES_INET=m
+CONFIG_NF_TABLES_NETDEV=m
+CONFIG_NFT_EXTHDR=m
+CONFIG_NFT_META=m
+CONFIG_NFT_RT=m
+CONFIG_NFT_NUMGEN=m
+CONFIG_NFT_CT=m
+CONFIG_NFT_SET_RBTREE=m
+CONFIG_NFT_SET_HASH=m
+CONFIG_NFT_SET_BITMAP=m
+CONFIG_NFT_COUNTER=m
+CONFIG_NFT_LOG=m
+CONFIG_NFT_LIMIT=m
+CONFIG_NFT_MASQ=m
+CONFIG_NFT_REDIR=m
+CONFIG_NFT_NAT=m
+CONFIG_NFT_OBJREF=m
+CONFIG_NFT_QUEUE=m
+CONFIG_NFT_QUOTA=m
+CONFIG_NFT_REJECT=m
+CONFIG_NFT_COMPAT=m
+CONFIG_NFT_HASH=m
+CONFIG_NFT_DUP_NETDEV=m
+CONFIG_NFT_FWD_NETDEV=m
+CONFIG_NETFILTER_XT_SET=m
+CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m
+CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m
+CONFIG_NETFILTER_XT_TARGET_CONNMARK=m
+CONFIG_NETFILTER_XT_TARGET_CONNSECMARK=m
+CONFIG_NETFILTER_XT_TARGET_CT=m
+CONFIG_NETFILTER_XT_TARGET_DSCP=m
+CONFIG_NETFILTER_XT_TARGET_HMARK=m
+CONFIG_NETFILTER_XT_TARGET_IDLETIMER=m
+CONFIG_NETFILTER_XT_TARGET_LED=m
+CONFIG_NETFILTER_XT_TARGET_LOG=m
+CONFIG_NETFILTER_XT_TARGET_MARK=m
+CONFIG_NETFILTER_XT_TARGET_NFLOG=m
+CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m
+CONFIG_NETFILTER_XT_TARGET_TEE=m
+CONFIG_NETFILTER_XT_TARGET_TPROXY=m
+CONFIG_NETFILTER_XT_TARGET_SECMARK=m
+CONFIG_NETFILTER_XT_TARGET_TCPMSS=m
+CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP=m
+CONFIG_NETFILTER_XT_MATCH_ADDRTYPE=m
+CONFIG_NETFILTER_XT_MATCH_BPF=m
+CONFIG_NETFILTER_XT_MATCH_CGROUP=m
+CONFIG_NETFILTER_XT_MATCH_CLUSTER=m
+CONFIG_NETFILTER_XT_MATCH_COMMENT=m
+CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m
+CONFIG_NETFILTER_XT_MATCH_CONNLABEL=m
+CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m
+CONFIG_NETFILTER_XT_MATCH_CONNMARK=m
+CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m
+CONFIG_NETFILTER_XT_MATCH_CPU=m
+CONFIG_NETFILTER_XT_MATCH_DCCP=m
+CONFIG_NETFILTER_XT_MATCH_DEVGROUP=m
+CONFIG_NETFILTER_XT_MATCH_DSCP=m
+CONFIG_NETFILTER_XT_MATCH_ESP=m
+CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m
+CONFIG_NETFILTER_XT_MATCH_HELPER=m
+CONFIG_NETFILTER_XT_MATCH_IPCOMP=m
+CONFIG_NETFILTER_XT_MATCH_IPRANGE=m
+CONFIG_NETFILTER_XT_MATCH_IPVS=m
+CONFIG_NETFILTER_XT_MATCH_L2TP=m
+CONFIG_NETFILTER_XT_MATCH_LENGTH=m
+CONFIG_NETFILTER_XT_MATCH_LIMIT=m
+CONFIG_NETFILTER_XT_MATCH_MAC=m
+CONFIG_NETFILTER_XT_MATCH_MARK=m
+CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m
+CONFIG_NETFILTER_XT_MATCH_NFACCT=m
+CONFIG_NETFILTER_XT_MATCH_OSF=m
+CONFIG_NETFILTER_XT_MATCH_OWNER=m
+CONFIG_NETFILTER_XT_MATCH_POLICY=m
+CONFIG_NETFILTER_XT_MATCH_PHYSDEV=m
+CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m
+CONFIG_NETFILTER_XT_MATCH_QUOTA=m
+CONFIG_NETFILTER_XT_MATCH_RATEEST=m
+CONFIG_NETFILTER_XT_MATCH_REALM=m
+CONFIG_NETFILTER_XT_MATCH_RECENT=m
+CONFIG_NETFILTER_XT_MATCH_SCTP=m
+CONFIG_NETFILTER_XT_MATCH_SOCKET=m
+CONFIG_NETFILTER_XT_MATCH_STATE=m
+CONFIG_NETFILTER_XT_MATCH_STATISTIC=m
+CONFIG_NETFILTER_XT_MATCH_STRING=m
+CONFIG_NETFILTER_XT_MATCH_TCPMSS=m
+CONFIG_NETFILTER_XT_MATCH_TIME=m
+CONFIG_NETFILTER_XT_MATCH_U32=m
+CONFIG_IP_SET=m
+CONFIG_IP_SET_BITMAP_IP=m
+CONFIG_IP_SET_BITMAP_IPMAC=m
+CONFIG_IP_SET_BITMAP_PORT=m
+CONFIG_IP_SET_HASH_IP=m
+CONFIG_IP_SET_HASH_IPMARK=m
+CONFIG_IP_SET_HASH_IPPORT=m
+CONFIG_IP_SET_HASH_IPPORTIP=m
+CONFIG_IP_SET_HASH_IPPORTNET=m
+CONFIG_IP_SET_HASH_IPMAC=m
+CONFIG_IP_SET_HASH_MAC=m
+CONFIG_IP_SET_HASH_NETPORTNET=m
+CONFIG_IP_SET_HASH_NET=m
+CONFIG_IP_SET_HASH_NETNET=m
+CONFIG_IP_SET_HASH_NETPORT=m
+CONFIG_IP_SET_HASH_NETIFACE=m
+CONFIG_IP_SET_LIST_SET=m
+CONFIG_IP_VS=m
+CONFIG_IP_VS_IPV6=y
+CONFIG_IP_VS_RR=m
+CONFIG_IP_VS_WRR=m
+CONFIG_IP_VS_LC=m
+CONFIG_IP_VS_WLC=m
+CONFIG_IP_VS_FO=m
+CONFIG_IP_VS_OVF=m
+CONFIG_IP_VS_LBLC=m
+CONFIG_IP_VS_LBLCR=m
+CONFIG_IP_VS_DH=m
+CONFIG_IP_VS_SH=m
+CONFIG_IP_VS_SED=m
+CONFIG_IP_VS_NQ=m
+CONFIG_IP_VS_NFCT=y
+CONFIG_NF_CONNTRACK_IPV4=m
+CONFIG_NF_SOCKET_IPV4=y
+CONFIG_NFT_CHAIN_ROUTE_IPV4=m
+CONFIG_NFT_DUP_IPV4=m
+CONFIG_NFT_FIB_IPV4=m
+CONFIG_NF_TABLES_ARP=m
+CONFIG_NF_LOG_ARP=m
+CONFIG_NF_REJECT_IPV4=y
+CONFIG_NFT_CHAIN_NAT_IPV4=m
+CONFIG_NFT_MASQ_IPV4=m
+CONFIG_NFT_REDIR_IPV4=m
+CONFIG_IP_NF_IPTABLES=y
+CONFIG_IP_NF_MATCH_AH=m
+CONFIG_IP_NF_MATCH_ECN=m
+CONFIG_IP_NF_MATCH_RPFILTER=m
+CONFIG_IP_NF_MATCH_TTL=m
+CONFIG_IP_NF_FILTER=y
+CONFIG_IP_NF_TARGET_REJECT=m
+CONFIG_IP_NF_TARGET_SYNPROXY=m
+CONFIG_IP_NF_NAT=m
+CONFIG_IP_NF_TARGET_MASQUERADE=m
+CONFIG_IP_NF_TARGET_NETMAP=m
+CONFIG_IP_NF_TARGET_REDIRECT=m
+CONFIG_IP_NF_MANGLE=m
+CONFIG_IP_NF_TARGET_CLUSTERIP=m
+CONFIG_IP_NF_TARGET_ECN=m
+CONFIG_IP_NF_TARGET_TTL=m
+CONFIG_IP_NF_RAW=m
+CONFIG_IP_NF_SECURITY=m
+CONFIG_IP_NF_ARPTABLES=m
+CONFIG_IP_NF_ARPFILTER=m
+CONFIG_IP_NF_ARP_MANGLE=m
+CONFIG_NF_CONNTRACK_IPV6=m
+CONFIG_NF_SOCKET_IPV6=y
+CONFIG_NF_NAT_IPV6=m
+CONFIG_IP6_NF_IPTABLES=y
+CONFIG_IP6_NF_MATCH_IPV6HEADER=y
+CONFIG_IP6_NF_FILTER=y
+CONFIG_IP6_NF_TARGET_REJECT=y
+CONFIG_IP6_NF_MANGLE=y
+CONFIG_NF_TABLES_BRIDGE=m
+CONFIG_BRIDGE_NF_EBTABLES=m
+CONFIG_BRIDGE=y
+CONFIG_VLAN_8021Q=y
+CONFIG_NET_SCHED=y
+CONFIG_NET_SCH_CBQ=m
+CONFIG_NET_SCH_HTB=y
+CONFIG_NET_SCH_HFSC=m
+CONFIG_NET_SCH_PRIO=m
+CONFIG_NET_SCH_MULTIQ=m
+CONFIG_NET_SCH_RED=m
+CONFIG_NET_SCH_SFB=m
+CONFIG_NET_SCH_SFQ=m
+CONFIG_NET_SCH_TEQL=m
+CONFIG_NET_SCH_TBF=m
+CONFIG_NET_SCH_GRED=m
+CONFIG_NET_SCH_DSMARK=m
+CONFIG_NET_SCH_NETEM=m
+CONFIG_NET_SCH_DRR=m
+CONFIG_NET_SCH_MQPRIO=m
+CONFIG_NET_SCH_CHOKE=m
+CONFIG_NET_SCH_QFQ=m
+CONFIG_NET_SCH_CODEL=m
+CONFIG_NET_SCH_FQ_CODEL=m
+CONFIG_NET_SCH_FQ=m
+CONFIG_NET_SCH_HHF=m
+CONFIG_NET_SCH_PIE=m
+CONFIG_NET_SCH_PLUG=m
+CONFIG_NET_SCH_DEFAULT=y
+CONFIG_NET_CLS_BASIC=m
+CONFIG_NET_CLS_TCINDEX=m
+CONFIG_NET_CLS_ROUTE4=m
+CONFIG_NET_CLS_FW=m
+CONFIG_NET_CLS_U32=m
+CONFIG_CLS_U32_PERF=y
+CONFIG_CLS_U32_MARK=y
+CONFIG_NET_CLS_RSVP=m
+CONFIG_NET_CLS_RSVP6=m
+CONFIG_NET_CLS_FLOW=m
+CONFIG_NET_CLS_CGROUP=m
+CONFIG_NET_CLS_BPF=m
+CONFIG_NET_CLS_FLOWER=m
+CONFIG_NET_CLS_MATCHALL=m
+CONFIG_NET_EMATCH=y
+CONFIG_NET_EMATCH_CMP=m
+CONFIG_NET_EMATCH_NBYTE=m
+CONFIG_NET_EMATCH_U32=m
+CONFIG_NET_EMATCH_META=m
+CONFIG_NET_EMATCH_TEXT=m
+CONFIG_NET_EMATCH_IPSET=m
+CONFIG_NET_CLS_ACT=y
+CONFIG_NET_ACT_POLICE=m
+CONFIG_NET_ACT_GACT=m
+CONFIG_GACT_PROB=y
+CONFIG_NET_ACT_MIRRED=m
+CONFIG_NET_ACT_SAMPLE=m
+CONFIG_NET_ACT_IPT=m
+CONFIG_NET_ACT_NAT=m
+CONFIG_NET_ACT_PEDIT=m
+CONFIG_NET_ACT_SIMP=m
+CONFIG_NET_ACT_SKBEDIT=m
+CONFIG_NET_ACT_CSUM=m
+CONFIG_NET_ACT_VLAN=m
+CONFIG_NET_ACT_BPF=m
+CONFIG_NET_ACT_CONNMARK=m
+CONFIG_NET_ACT_SKBMOD=m
+CONFIG_NET_ACT_IFE=m
+CONFIG_NET_ACT_TUNNEL_KEY=m
+CONFIG_NET_IFE_SKBMARK=m
+CONFIG_NET_IFE_SKBPRIO=m
+CONFIG_NET_IFE_SKBTCINDEX=m
+CONFIG_NET_CLS_IND=y
+CONFIG_CGROUP_NET_PRIO=y
+CONFIG_BT=y
+CONFIG_BT_RFCOMM=y
+CONFIG_BT_HIDP=y
+CONFIG_BT_HCIBTUSB=y
+CONFIG_BT_HCIBTSDIO=y
+CONFIG_BT_HCIUART=y
+CONFIG_BT_HCIUART_ATH3K=y
+CONFIG_BT_HCIUART_3WIRE=y
+CONFIG_BT_HCIBFUSB=y
+CONFIG_BT_HCIVHCI=y
+CONFIG_BT_MRVL=y
+CONFIG_BT_MRVL_SDIO=y
+CONFIG_CFG80211=y
+CONFIG_NL80211_TESTMODE=y
+CONFIG_CFG80211_DEBUGFS=y
+CONFIG_CFG80211_WEXT=y
+CONFIG_MAC80211=y
+CONFIG_MAC80211_MESH=y
+CONFIG_MAC80211_DEBUGFS=y
+CONFIG_MAC80211_DEBUG_MENU=y
+CONFIG_MAC80211_VERBOSE_DEBUG=y
+CONFIG_RFKILL=y
+CONFIG_DEVTMPFS=y
+CONFIG_DEVTMPFS_MOUNT=y
+CONFIG_DEBUG_DEVRES=y
+CONFIG_DMA_FENCE_TRACE=y
+CONFIG_CONNECTOR=y
+CONFIG_ZRAM=m
+CONFIG_BLK_DEV_LOOP=y
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=1
+CONFIG_ATA_OVER_ETH=m
+CONFIG_EEPROM_AT24=m
+CONFIG_SCSI=y
+CONFIG_BLK_DEV_SD=y
+CONFIG_BLK_DEV_SR=y
+CONFIG_SCSI_SPI_ATTRS=y
+CONFIG_NETDEVICES=y
+CONFIG_BONDING=m
+CONFIG_DUMMY=y
+CONFIG_MACVLAN=y
+CONFIG_MACVTAP=m
+CONFIG_VXLAN=y
+CONFIG_GENEVE=m
+CONFIG_GTP=m
+CONFIG_MACSEC=m
+CONFIG_TUN=y
+CONFIG_VETH=y
+# CONFIG_NET_VENDOR_ALACRITECH is not set
+CONFIG_EMAC_ROCKCHIP=y
+# CONFIG_NET_VENDOR_SOLARFLARE is not set
+CONFIG_STMMAC_ETH=y
+CONFIG_LED_TRIGGER_PHY=y
+CONFIG_PPP=y
+CONFIG_PPP_ASYNC=y
+CONFIG_USB_PEGASUS=y
+CONFIG_USB_RTL8150=y
+CONFIG_USB_RTL8152=y
+CONFIG_USB_NET_CDC_MBIM=y
+CONFIG_USB_NET_DM9601=y
+CONFIG_USB_NET_SMSC75XX=y
+CONFIG_USB_NET_SMSC95XX=y
+CONFIG_USB_NET_MCS7830=y
+# CONFIG_USB_NET_CDC_SUBSET is not set
+# CONFIG_USB_NET_ZAURUS is not set
+CONFIG_ATH9K_HTC=m
+CONFIG_CARL9170=m
+CONFIG_AR5523=m
+CONFIG_ATH10K=m
+CONFIG_ATH10K_SDIO=m
+CONFIG_ATH10K_USB=m
+CONFIG_WCN36XX=m
+CONFIG_RTL8188EU=m
+CONFIG_AT76C50X_USB=m
+CONFIG_HOSTAP=y
+CONFIG_HOSTAP_FIRMWARE=y
+CONFIG_HOSTAP_FIRMWARE_NVRAM=y
+CONFIG_LIBERTAS=m
+CONFIG_LIBERTAS_USB=m
+CONFIG_LIBERTAS_SDIO=m
+CONFIG_LIBERTAS_SPI=m
+CONFIG_LIBERTAS_THINFIRM=y
+CONFIG_LIBERTAS_THINFIRM_USB=m
+CONFIG_MWIFIEX=y
+CONFIG_MWIFIEX_SDIO=y
+CONFIG_MWIFIEX_USB=m
+CONFIG_RTL8812AU=m
+CONFIG_RTL8814AU=m
+CONFIG_MT7601U=m
+CONFIG_RT2X00=y
+CONFIG_RT2500USB=y
+CONFIG_RT73USB=y
+CONFIG_RT2800USB=y
+CONFIG_RT2800USB_RT3573=y
+CONFIG_RT2800USB_RT53XX=y
+CONFIG_RT2800USB_RT55XX=y
+CONFIG_RT2800USB_UNKNOWN=y
+CONFIG_RTL8187=m
+CONFIG_RTL_CARDS=m
+CONFIG_RTL8192CU=m
+# CONFIG_RTLWIFI_DEBUG is not set
+CONFIG_RTL8XXXU=y
+CONFIG_USB_ZD1201=m
+CONFIG_ZD1211RW=m
+CONFIG_USB_NET_RNDIS_WLAN=y
+CONFIG_INPUT_JOYDEV=y
+CONFIG_INPUT_EVDEV=y
+CONFIG_KEYBOARD_GPIO=y
+CONFIG_KEYBOARD_GPIO_POLLED=y
+CONFIG_KEYBOARD_SUNKBD=y
+CONFIG_KEYBOARD_TM2_TOUCHKEY=m
+CONFIG_KEYBOARD_CROS_EC=y
+# CONFIG_MOUSE_PS2 is not set
+CONFIG_MOUSE_CYAPA=y
+CONFIG_MOUSE_ELAN_I2C=y
+CONFIG_INPUT_JOYSTICK=y
+CONFIG_JOYSTICK_IFORCE=y
+CONFIG_JOYSTICK_IFORCE_USB=y
+CONFIG_JOYSTICK_XPAD=y
+CONFIG_JOYSTICK_XPAD_FF=y
+CONFIG_JOYSTICK_XPAD_LEDS=y
+CONFIG_INPUT_TABLET=y
+CONFIG_INPUT_TOUCHSCREEN=y
+CONFIG_TOUCHSCREEN_ATMEL_MXT=y
+CONFIG_TOUCHSCREEN_ELAN=y
+CONFIG_TOUCHSCREEN_USB_COMPOSITE=y
+CONFIG_TOUCHSCREEN_ZET6223=m
+CONFIG_INPUT_MISC=y
+CONFIG_INPUT_UINPUT=y
+CONFIG_SERIO_RAW=y
+# CONFIG_LEGACY_PTYS is not set
+CONFIG_RK_CHAR_DRIVERS=y
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_8250_DW=y
+CONFIG_SERIAL_OF_PLATFORM=y
+CONFIG_HW_RANDOM=y
+CONFIG_TCG_TPM=y
+CONFIG_TCG_TIS_I2C_INFINEON=y
+CONFIG_I2C_CHARDEV=y
+CONFIG_I2C_RK3X=y
+CONFIG_I2C_CROS_EC_TUNNEL=y
+CONFIG_I2C_STUB=m
+CONFIG_SPI=y
+CONFIG_SPI_BITBANG=y
+CONFIG_SPI_ROCKCHIP=y
+CONFIG_SPI_SPIDEV=y
+CONFIG_DEBUG_GPIO=y
+CONFIG_GPIO_SYSFS=y
+CONFIG_GPIO_GENERIC_PLATFORM=y
+CONFIG_POWER_AVS=y
+CONFIG_ROCKCHIP_IODOMAIN=y
+CONFIG_POWER_RESET=y
+CONFIG_POWER_RESET_GPIO_RESTART=y
+CONFIG_POWER_RESET_SYSCON=y
+CONFIG_POWER_RESET_SYSCON_POWEROFF=y
+CONFIG_SYSCON_REBOOT_MODE=m
+CONFIG_BATTERY_SBS=y
+CONFIG_CHARGER_GPIO=y
+CONFIG_CHARGER_BQ24735=y
+CONFIG_THERMAL=y
+CONFIG_CPU_THERMAL=y
+CONFIG_ROCKCHIP_THERMAL=y
+CONFIG_WATCHDOG=y
+CONFIG_SOFT_WATCHDOG=m
+CONFIG_DW_WATCHDOG=m
+CONFIG_MFD_CROS_EC=y
+CONFIG_MFD_CROS_EC_SPI=y
+CONFIG_MFD_CPCAP=m
+CONFIG_MFD_RK808=y
+CONFIG_MFD_TPS6586X=y
+CONFIG_REGULATOR_FIXED_VOLTAGE=y
+CONFIG_REGULATOR_ACT8865=y
+CONFIG_REGULATOR_CPCAP=m
+CONFIG_REGULATOR_FAN53555=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_REGULATOR_RK808=y
+CONFIG_REGULATOR_TPS6586X=y
+CONFIG_MEDIA_SUPPORT=y
+CONFIG_MEDIA_CAMERA_SUPPORT=y
+CONFIG_MEDIA_DIGITAL_TV_SUPPORT=y
+CONFIG_DVB_DYNAMIC_MINORS=y
+CONFIG_MEDIA_USB_SUPPORT=y
+CONFIG_USB_VIDEO_CLASS=y
+# CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV is not set
+# CONFIG_USB_GSPCA is not set
+CONFIG_VIDEO_AU0828=m
+CONFIG_DVB_USB_V2=m
+CONFIG_DVB_USB_AF9015=m
+CONFIG_DVB_USB_AF9035=m
+CONFIG_DVB_USB_ANYSEE=m
+CONFIG_DVB_USB_AU6610=m
+CONFIG_DVB_USB_AZ6007=m
+CONFIG_DVB_USB_CE6230=m
+CONFIG_DVB_USB_EC168=m
+CONFIG_DVB_USB_GL861=m
+CONFIG_DVB_USB_MXL111SF=m
+CONFIG_DVB_USB_RTL28XXU=m
+CONFIG_DVB_USB_DVBSKY=m
+CONFIG_DVB_USB_ZD1301=m
+CONFIG_SMS_USB_DRV=m
+CONFIG_DVB_B2C2_FLEXCOP_USB=m
+CONFIG_DVB_AS102=m
+CONFIG_V4L_PLATFORM_DRIVERS=y
+CONFIG_SOC_CAMERA=m
+CONFIG_SOC_CAMERA_PLATFORM=m
+CONFIG_V4L_MEM2MEM_DRIVERS=y
+CONFIG_V4L_TEST_DRIVERS=y
+CONFIG_SMS_SDIO_DRV=m
+CONFIG_SOC_CAMERA_IMX074=m
+CONFIG_SOC_CAMERA_MT9M001=m
+CONFIG_SOC_CAMERA_MT9M111=m
+CONFIG_SOC_CAMERA_MT9T031=m
+CONFIG_SOC_CAMERA_MT9T112=m
+CONFIG_SOC_CAMERA_MT9V022=m
+CONFIG_SOC_CAMERA_OV5642=m
+CONFIG_SOC_CAMERA_OV772X=m
+CONFIG_SOC_CAMERA_OV9640=m
+CONFIG_SOC_CAMERA_OV9740=m
+CONFIG_SOC_CAMERA_RJ54N1=m
+CONFIG_SOC_CAMERA_TW9910=m
+CONFIG_MALI_MIDGARD=m
+CONFIG_MALI_GATOR_SUPPORT=y
+CONFIG_DRM=y
+CONFIG_DRM_DEBUG_MM=y
+CONFIG_DRM_DEBUG_MM_SELFTEST=m
+CONFIG_DRM_ROCKCHIP=y
+CONFIG_ROCKCHIP_DW_HDMI=y
+CONFIG_DRM_UDL=y
+CONFIG_DRM_PANEL_SIMPLE=y
+CONFIG_DRM_SIL_SII8620=m
+CONFIG_DRM_TINYDRM=m
+CONFIG_TINYDRM_MI0283QT=m
+CONFIG_FB_MODE_HELPERS=y
+# CONFIG_LCD_CLASS_DEVICE is not set
+CONFIG_BACKLIGHT_CLASS_DEVICE=y
+CONFIG_BACKLIGHT_PWM=y
+CONFIG_FRAMEBUFFER_CONSOLE=y
+CONFIG_SOUND=y
+CONFIG_SND=y
+CONFIG_SND_HRTIMER=y
+CONFIG_SND_DYNAMIC_MINORS=y
+CONFIG_SND_SEQUENCER=y
+CONFIG_SND_SEQ_DUMMY=y
+CONFIG_SND_DUMMY=m
+CONFIG_SND_ALOOP=m
+# CONFIG_SND_ARM is not set
+# CONFIG_SND_SPI is not set
+CONFIG_SND_USB_AUDIO=y
+CONFIG_SND_SOC=y
+CONFIG_SND_SOC_ROCKCHIP=y
+CONFIG_SND_SOC_ROCKCHIP_SPDIF=y
+CONFIG_SND_SOC_ROCKCHIP_MAX98090=y
+CONFIG_SND_SOC_ROCKCHIP_RT5645=y
+CONFIG_SND_SOC_RK3288_HDMI_ANALOG=m
+CONFIG_SND_SOC_RT5616=y
+CONFIG_SND_SOC_SPDIF=y
+CONFIG_SND_SOC_NAU8540=m
+CONFIG_SND_SIMPLE_CARD=y
+CONFIG_HID_BATTERY_STRENGTH=y
+CONFIG_HIDRAW=y
+CONFIG_UHID=y
+CONFIG_HID_APPLE=y
+CONFIG_HID_CHERRY=y
+CONFIG_HID_KENSINGTON=y
+CONFIG_HID_LOGITECH=y
+CONFIG_HID_LOGITECH_DJ=y
+CONFIG_HID_MAGICMOUSE=y
+CONFIG_HID_MICROSOFT=y
+CONFIG_HID_MULTITOUCH=y
+CONFIG_HID_PLANTRONICS=y
+CONFIG_HID_PRIMAX=y
+CONFIG_HID_SONY=y
+CONFIG_HID_RMI=y
+CONFIG_HID_WIIMOTE=y
+CONFIG_USB_HIDDEV=y
+CONFIG_I2C_HID=y
+CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
+# CONFIG_USB_DEFAULT_PERSIST is not set
+CONFIG_USB_OTG=y
+CONFIG_USB_MON=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_ROOT_HUB_TT=y
+CONFIG_USB_EHCI_HCD_PLATFORM=y
+CONFIG_USB_ACM=y
+CONFIG_USB_PRINTER=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_UAS=m
+CONFIG_USB_DWC2=y
+CONFIG_USB_SERIAL=y
+CONFIG_USB_SERIAL_GENERIC=y
+CONFIG_USB_SERIAL_CH341=m
+CONFIG_USB_SERIAL_CP210X=m
+CONFIG_USB_SERIAL_FTDI_SIO=m
+CONFIG_USB_SERIAL_KEYSPAN=y
+CONFIG_USB_SERIAL_PL2303=m
+CONFIG_USB_SERIAL_OTI6858=y
+CONFIG_USB_SERIAL_QUALCOMM=y
+CONFIG_USB_SERIAL_SIERRAWIRELESS=y
+CONFIG_USB_SERIAL_OPTION=y
+CONFIG_USB_LCD=m
+CONFIG_USB_HUB_USB251XB=m
+CONFIG_USB_GADGET=y
+CONFIG_USB_CONFIGFS=y
+CONFIG_USB_CONFIGFS_MASS_STORAGE=y
+CONFIG_USB_CONFIGFS_F_FS=y
+CONFIG_USB_GADGETFS=m
+CONFIG_USB_MASS_STORAGE=m
+CONFIG_USB_G_SERIAL=m
+CONFIG_USB_G_HID=m
+CONFIG_MMC=y
+CONFIG_PWRSEQ_SD8787=m
+CONFIG_MMC_BLOCK_MINORS=16
+CONFIG_MMC_TEST=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_PLTFM=y
+CONFIG_MMC_SDHCI_CADENCE=m
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_LEDS_CLASS=y
+CONFIG_LEDS_GPIO=y
+CONFIG_LEDS_USER=m
+CONFIG_LEDS_TRIGGER_TIMER=y
+CONFIG_LEDS_TRIGGER_ONESHOT=y
+CONFIG_LEDS_TRIGGER_HEARTBEAT=y
+CONFIG_LEDS_TRIGGER_BACKLIGHT=y
+CONFIG_LEDS_TRIGGER_CPU=y
+CONFIG_LEDS_TRIGGER_GPIO=y
+CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
+CONFIG_LEDS_TRIGGER_TRANSIENT=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_DRV_ABX80X=m
+CONFIG_RTC_DRV_DS1307=m
+CONFIG_RTC_DRV_DS1374=m
+CONFIG_RTC_DRV_DS1374_WDT=y
+CONFIG_RTC_DRV_DS1672=m
+CONFIG_RTC_DRV_HYM8563=m
+CONFIG_RTC_DRV_MAX6900=m
+CONFIG_RTC_DRV_RK808=y
+CONFIG_RTC_DRV_RS5C372=m
+CONFIG_RTC_DRV_ISL1208=m
+CONFIG_RTC_DRV_ISL12022=m
+CONFIG_RTC_DRV_X1205=m
+CONFIG_RTC_DRV_PCF8523=m
+CONFIG_RTC_DRV_PCF85063=m
+CONFIG_RTC_DRV_PCF8563=m
+CONFIG_RTC_DRV_PCF8583=m
+CONFIG_RTC_DRV_M41T80=m
+CONFIG_RTC_DRV_M41T80_WDT=y
+CONFIG_RTC_DRV_BQ32K=m
+CONFIG_RTC_DRV_TPS6586X=m
+CONFIG_RTC_DRV_S35390A=m
+CONFIG_RTC_DRV_FM3130=m
+CONFIG_RTC_DRV_RX8010=m
+CONFIG_RTC_DRV_RX8581=m
+CONFIG_RTC_DRV_RX8025=m
+CONFIG_RTC_DRV_EM3027=m
+CONFIG_RTC_DRV_RV8803=m
+CONFIG_RTC_DRV_M41T93=m
+CONFIG_RTC_DRV_M41T94=m
+CONFIG_RTC_DRV_DS1302=m
+CONFIG_RTC_DRV_DS1305=m
+CONFIG_RTC_DRV_DS1343=m
+CONFIG_RTC_DRV_DS1347=m
+CONFIG_RTC_DRV_DS1390=m
+CONFIG_RTC_DRV_MAX6916=m
+CONFIG_RTC_DRV_R9701=m
+CONFIG_RTC_DRV_RX4581=m
+CONFIG_RTC_DRV_RX6110=m
+CONFIG_RTC_DRV_RS5C348=m
+CONFIG_RTC_DRV_MAX6902=m
+CONFIG_RTC_DRV_PCF2123=m
+CONFIG_RTC_DRV_MCP795=m
+CONFIG_RTC_DRV_DS3232=m
+CONFIG_RTC_DRV_PCF2127=m
+CONFIG_RTC_DRV_RV3029C2=m
+CONFIG_DMADEVICES=y
+CONFIG_PL330_DMA=y
+CONFIG_STAGING=y
+CONFIG_RTL8723BS=m
+CONFIG_ASHMEM=y
+CONFIG_COMMON_CLK_RK808=y
+CONFIG_COMMON_CLK_VC5=m
+CONFIG_ROCKCHIP_IOMMU=y
+CONFIG_ROCKCHIP_PM_DOMAINS=y
+CONFIG_PM_DEVFREQ=y
+CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND=y
+CONFIG_DEVFREQ_GOV_USERSPACE=y
+CONFIG_MEMORY=y
+CONFIG_IIO=y
+CONFIG_IIO_BUFFER=y
+CONFIG_IIO_KFIFO_BUF=y
+CONFIG_IIO_TRIGGER=y
+CONFIG_ROCKCHIP_SARADC=y
+CONFIG_SENSORS_ISL29018=y
+CONFIG_SENSORS_TSL2563=y
+CONFIG_TSL2583=y
+CONFIG_IIO_SYSFS_TRIGGER=y
+CONFIG_PWM=y
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_PHY_ROCKCHIP_DP=y
+CONFIG_PHY_ROCKCHIP_EMMC=y
+CONFIG_PHY_ROCKCHIP_USB=y
+CONFIG_ANDROID=y
+CONFIG_DAX=y
+CONFIG_ROCKCHIP_EFUSE=y
+CONFIG_EXT2_FS=y
+CONFIG_EXT3_FS=y
+CONFIG_EXT3_FS_POSIX_ACL=y
+CONFIG_EXT3_FS_SECURITY=y
+CONFIG_REISERFS_FS=y
+CONFIG_JFS_FS=y
+CONFIG_XFS_FS=y
+CONFIG_BTRFS_FS=y
+CONFIG_BTRFS_FS_POSIX_ACL=y
+CONFIG_QUOTA=y
+CONFIG_QUOTA_NETLINK_INTERFACE=y
+CONFIG_QFMT_V1=m
+CONFIG_QFMT_V2=m
+CONFIG_AUTOFS4_FS=y
+CONFIG_FUSE_FS=m
+CONFIG_CUSE=m
+CONFIG_OVERLAY_FS=m
+CONFIG_FSCACHE=y
+CONFIG_FSCACHE_STATS=y
+CONFIG_FSCACHE_HISTOGRAM=y
+CONFIG_CACHEFILES=y
+CONFIG_ISO9660_FS=y
+CONFIG_JOLIET=y
+CONFIG_ZISOFS=y
+CONFIG_UDF_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_NTFS_FS=y
+CONFIG_NTFS_RW=y
+CONFIG_TMPFS=y
+CONFIG_TMPFS_POSIX_ACL=y
+CONFIG_ECRYPT_FS=y
+CONFIG_HFSPLUS_FS=y
+CONFIG_SQUASHFS=y
+CONFIG_SQUASHFS_FILE_DIRECT=y
+CONFIG_SQUASHFS_LZO=y
+CONFIG_SQUASHFS_XZ=y
+CONFIG_PSTORE=y
+CONFIG_PSTORE_CONSOLE=y
+CONFIG_PSTORE_RAM=y
+CONFIG_NFS_FS=y
+# CONFIG_NFS_V2 is not set
+CONFIG_NFS_V3_ACL=y
+CONFIG_NFS_V4=y
+CONFIG_NFS_SWAP=y
+CONFIG_NFS_V4_1=y
+CONFIG_NFS_V4_2=y
+CONFIG_ROOT_NFS=y
+CONFIG_NFS_FSCACHE=y
+CONFIG_NFSD=m
+CONFIG_NFSD_V3_ACL=y
+CONFIG_NFSD_V4=y
+CONFIG_NFSD_V4_SECURITY_LABEL=y
+CONFIG_NFSD_FAULT_INJECTION=y
+CONFIG_CIFS=y
+CONFIG_CIFS_STATS=y
+CONFIG_CIFS_STATS2=y
+CONFIG_CIFS_WEAK_PW_HASH=y
+CONFIG_CIFS_UPCALL=y
+CONFIG_CIFS_XATTR=y
+CONFIG_CIFS_POSIX=y
+CONFIG_CIFS_ACL=y
+CONFIG_CIFS_DFS_UPCALL=y
+CONFIG_NLS_DEFAULT="utf8"
+CONFIG_NLS_CODEPAGE_437=y
+CONFIG_NLS_CODEPAGE_850=y
+CONFIG_NLS_ASCII=y
+CONFIG_NLS_ISO8859_1=y
+CONFIG_PRINTK_TIME=y
+CONFIG_MAGIC_SYSRQ=y
+CONFIG_MAGIC_SYSRQ_DEFAULT_ENABLE=0
+CONFIG_DETECT_HUNG_TASK=y
+CONFIG_BOOTPARAM_HUNG_TASK_PANIC=y
+CONFIG_SCHEDSTATS=y
+CONFIG_DEBUG_SPINLOCK=y
+CONFIG_DEBUG_CREDENTIALS=y
+CONFIG_RCU_CPU_STALL_TIMEOUT=60
+CONFIG_FUNCTION_TRACER=y
+CONFIG_BLK_DEV_IO_TRACE=y
+# CONFIG_UPROBE_EVENTS is not set
+CONFIG_LKDTM=y
+CONFIG_TEST_UDELAY=y
+CONFIG_STRICT_DEVMEM=y
+CONFIG_SECURITY=y
+CONFIG_SECURITY_NETWORK=y
+CONFIG_SECURITY_PATH=y
+CONFIG_SECURITY_YAMA=y
+CONFIG_CRYPTO_SHA512=y
+CONFIG_CRYPTO_AES_TI=m
+CONFIG_CRYPTO_LZO=y
+CONFIG_CRYPTO_LZ4=y
+CONFIG_CRYPTO_USER_API_HASH=y
+CONFIG_CRYPTO_USER_API_SKCIPHER=y
+CONFIG_CRYPTO_DEV_ROCKCHIP=m
+CONFIG_ASYMMETRIC_KEY_TYPE=y
+CONFIG_ASYMMETRIC_PUBLIC_KEY_SUBTYPE=y
+CONFIG_X509_CERTIFICATE_PARSER=y
+CONFIG_PKCS7_MESSAGE_PARSER=y
+CONFIG_SYSTEM_TRUSTED_KEYRING=y
+CONFIG_ARM_CRYPTO=y
+CONFIG_CRYPTO_SHA1_ARM=m
+CONFIG_CRYPTO_SHA256_ARM=m
+CONFIG_CRYPTO_SHA512_ARM=m
+CONFIG_CRYPTO_AES_ARM=m
+CONFIG_CRC_T10DIF=y
+CONFIG_CRC7=y
+# CONFIG_XZ_DEC_X86 is not set
+# CONFIG_XZ_DEC_POWERPC is not set
+# CONFIG_XZ_DEC_IA64 is not set
+# CONFIG_XZ_DEC_SPARC is not set

buildroot-external/board/tinker/patches/linux/0001-Mali-midgard-r19p0-fixes-for-4.13-kernels.patch

@@ -0,0 +1,122 @@
+From 7ba71967a2678e119bcd819ac92d08bd038e1879 Mon Sep 17 00:00:00 2001
+From: Myy <myy@miouyouyou.fr>
+Date: Mon, 17 Jul 2017 18:34:33 +0000
+Subject: [PATCH 5/5] Mali midgard r19p0 fixes for 4.13 kernels
+
+Mostly due to DMA structure members renamed, and some signatures
+modifications done during the development of Linux 4.11.
+
+* mm, fs: reduce fault, page_mkwrite, and pfn_mkwrite to take only vmf
+  11bac80004499ea59f361ef2a5516c84b6eab675
+  v4.11-rc1
+
+* sched/headers: Move task->mm handling methods to <linux/sched/mm.h>
+  68e21be2916b359fd8afb536c1911dc014cfd03e
+  v4.11-rc1
+
+* sched/headers: Move task-stack related APIs from <linux/sched.h> to
+  <linux/sched/task_stack.h>
+  f3ac60671954c8d413532627b1be13a76f394c49
+  v4.11-rc1
+
+* dma-fence: Introduce drm_fence_set_error() helper
+  a009e975da5c7d42a7f5eaadc54946eb5f76c9af
+  v4.11-rc1
+
+Signed-off-by: Myy <myy@miouyouyou.fr>
+---
+ drivers/gpu/arm/midgard/mali_kbase.h           |  4 ++++
+ drivers/gpu/arm/midgard/mali_kbase_fence.h     |  4 ++++
+ drivers/gpu/arm/midgard/mali_kbase_mem_linux.c |  6 ++++++
+ drivers/gpu/arm/midgard/mali_kbase_sync_file.c | 12 ++++++++++++
+ 4 files changed, 26 insertions(+)
+
+diff --git a/drivers/gpu/arm/midgard/mali_kbase.h b/drivers/gpu/arm/midgard/mali_kbase.h
+index d77f186..5ee47c4 100644
+--- a/drivers/gpu/arm/midgard/mali_kbase.h
++++ b/drivers/gpu/arm/midgard/mali_kbase.h
+@@ -35,6 +35,10 @@
+ #include <linux/mutex.h>
+ #include <linux/rwsem.h>
+ #include <linux/sched.h>
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 11, 0)
++#include <linux/sched/task_stack.h>
++#include <linux/sched/mm.h>
++#endif
+ #include <linux/slab.h>
+ #include <linux/spinlock.h>
+ #include <linux/vmalloc.h>
+diff --git a/drivers/gpu/arm/midgard/mali_kbase_fence.h b/drivers/gpu/arm/midgard/mali_kbase_fence.h
+index 8d39299..3c2e3a9 100644
+--- a/drivers/gpu/arm/midgard/mali_kbase_fence.h
++++ b/drivers/gpu/arm/midgard/mali_kbase_fence.h
+@@ -134,7 +134,11 @@ static inline bool kbase_fence_out_is_ours(struct kbase_jd_atom *katom)
+ static inline int kbase_fence_out_signal(struct kbase_jd_atom *katom,
+ 					 int status)
+ {
++#if (LINUX_VERSION_CODE < KERNEL_VERSION(4, 11, 0))
+ 	katom->dma_fence.fence->status = status;
++#else
++	katom->dma_fence.fence->error = status;
++#endif
+ 	return dma_fence_signal(katom->dma_fence.fence);
+ }
+ 
+diff --git a/drivers/gpu/arm/midgard/mali_kbase_mem_linux.c b/drivers/gpu/arm/midgard/mali_kbase_mem_linux.c
+index b1f2c46..896aa35 100644
+--- a/drivers/gpu/arm/midgard/mali_kbase_mem_linux.c
++++ b/drivers/gpu/arm/midgard/mali_kbase_mem_linux.c
+@@ -1788,8 +1788,14 @@ static void kbase_cpu_vm_close(struct vm_area_struct *vma)
+ KBASE_EXPORT_TEST_API(kbase_cpu_vm_close);
+ 
+ 
++#if (LINUX_VERSION_CODE < KERNEL_VERSION(4, 11, 0))
+ static int kbase_cpu_vm_fault(struct vm_area_struct *vma, struct vm_fault *vmf)
+ {
++#else
++static int kbase_cpu_vm_fault(struct vm_fault *vmf)
++{
++	struct vm_area_struct *vma = vmf->vma;
++#endif
+ 	struct kbase_cpu_mapping *map = vma->vm_private_data;
+ 	pgoff_t rel_pgoff;
+ 	size_t i;
+diff --git a/drivers/gpu/arm/midgard/mali_kbase_sync_file.c b/drivers/gpu/arm/midgard/mali_kbase_sync_file.c
+index 4e1621c..d84a54e 100644
+--- a/drivers/gpu/arm/midgard/mali_kbase_sync_file.c
++++ b/drivers/gpu/arm/midgard/mali_kbase_sync_file.c
+@@ -161,8 +161,13 @@ static void kbase_fence_wait_callback(struct dma_fence *fence,
+ 	struct kbase_context *kctx = katom->kctx;
+ 
+ 	/* Cancel atom if fence is erroneous */
++#if (LINUX_VERSION_CODE < KERNEL_VERSION(4, 11, 0))
+ 	if (dma_fence_is_signaled(kcb->fence) && kcb->fence->status < 0)
+ 		katom->event_code = BASE_JD_EVENT_JOB_CANCELLED;
++#else
++	if (dma_fence_is_signaled(kcb->fence) && kcb->fence->error < 0)
++		katom->event_code = BASE_JD_EVENT_JOB_CANCELLED;
++#endif
+ 
+ 	if (kbase_fence_dep_count_dec_and_test(katom)) {
+ 		/* We take responsibility of handling this */
+@@ -273,10 +278,17 @@ static void kbase_sync_fence_info_get(struct dma_fence *fence,
+ 	 * 1 : signaled
+ 	 */
+ 	if (dma_fence_is_signaled(fence)) {
++#if (LINUX_VERSION_CODE < KERNEL_VERSION(4, 11, 0))
+ 		if (fence->status < 0)
+ 			info->status = fence->status; /* signaled with error */
+ 		else
+ 			info->status = 1; /* signaled with success */
++#else
++		if (fence->error < 0)
++			info->status = fence->error; /* signaled with error */
++		else
++			info->status = 1; /* signaled with success */
++#endif
+ 	} else  {
+ 		info->status = 0; /* still active (unsignaled) */
+ 	}
+-- 
+2.10.2
+

buildroot-external/board/tinker/patches/linux/0002-Using-the-new-header-on-4.12-kernels-for-copy_-_user.patch

@@ -0,0 +1,36 @@
+From f76c9c58669a3bba0456191431be558ab8054f50 Mon Sep 17 00:00:00 2001
+From: Myy <myy@miouyouyou.fr>
+Date: Mon, 17 Jul 2017 11:43:00 +0000
+Subject: [PATCH 3/5] Using the new header on 4.12 kernels for copy_*_user
+
+These changes are due to :
+* generic ...copy_..._user primitives
+  d597580d373774b1bdab84b3d26ff0b55162b916
+  Version : 4.12-rc1
+
+Signed-off-by: Myy <myy@miouyouyou.fr>
+---
+ drivers/base/ump/src/linux/ump_kernel_linux.c | 7 ++++++-
+ 1 file changed, 6 insertions(+), 1 deletion(-)
+
+diff --git a/drivers/base/ump/src/linux/ump_kernel_linux.c b/drivers/base/ump/src/linux/ump_kernel_linux.c
+index d6c3c53..bb3a7f0 100644
+--- a/drivers/base/ump/src/linux/ump_kernel_linux.c
++++ b/drivers/base/ump/src/linux/ump_kernel_linux.c
+@@ -20,7 +20,12 @@
+ #include <linux/ump-ioctl.h>
+ #include <linux/ump.h>
+ 
+-#include <asm/uaccess.h>	         /* copy_*_user */
++#include <linux/version.h>
++#if LINUX_VERSION_CODE < KERNEL_VERSION(4,12,0)
++#include <asm/uaccess.h>             /* copy_*_user */
++#else
++#include <linux/uaccess.h>           /* copy_*_user */
++#endif
+ #include <linux/compat.h>
+ #include <linux/module.h>            /* kernel module definitions */
+ #include <linux/fs.h>                /* file system operations */
+-- 
+2.10.2
+

buildroot-external/board/tinker/patches/linux/0003-Adapt-get_user_pages-calls-to-use-the-new-calling-pr.patch

@@ -0,0 +1,46 @@
+From 63c110cdebc2c692964e1250c6f74f9e8c47c85d Mon Sep 17 00:00:00 2001
+From: Myy <myy@miouyouyou.fr>
+Date: Tue, 10 Jan 2017 04:28:48 +0000
+Subject: [PATCH 4/5] Adapt get_user_pages calls to use the new calling
+ procedure
+
+These changes are due to this commit:
+mm: replace get_user_pages_remote() write/force parameters with gup_flags
+9beae1ea89305a9667ceaab6d0bf46a045ad71e7
+Kernel: 4.9.0-rc
+
+Signed-off-by: Myy <myy@miouyouyou.fr>
+---
+ drivers/base/ump/src/linux/ump_kernel_linux_mem.c | 8 ++++++++
+ 1 file changed, 8 insertions(+)
+
+diff --git a/drivers/base/ump/src/linux/ump_kernel_linux_mem.c b/drivers/base/ump/src/linux/ump_kernel_linux_mem.c
+index 9186dd0..def4c0e 100644
+--- a/drivers/base/ump/src/linux/ump_kernel_linux_mem.c
++++ b/drivers/base/ump/src/linux/ump_kernel_linux_mem.c
+@@ -35,6 +35,10 @@
+ #include <ump_arch.h>
+ #include <common/ump_kernel_priv.h>
+ 
++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4,5,0))
++#include <linux/pfn_t.h>
++#endif
++
+ static void umpp_vm_close(struct vm_area_struct *vma)
+ {
+ 	umpp_cpu_mapping * mapping;
+@@ -222,7 +226,11 @@ int umpp_linux_mmap(struct file * filp, struct vm_area_struct * vma)
+ 				paddr = alloc->block_array[block_idx].addr;
+ 			}
+ 
++#if (LINUX_VERSION_CODE <= KERNEL_VERSION(4,4,0))
+ 			err = vm_insert_mixed(vma, vma->vm_start + (i << PAGE_SHIFT), paddr >> PAGE_SHIFT);
++#else
++			err = vm_insert_mixed(vma, vma->vm_start + (i << PAGE_SHIFT), __pfn_to_pfn_t(paddr >> PAGE_SHIFT, PFN_DEV));
++#endif
+ 			paddr += PAGE_SIZE;
+ 		}
+ 
+-- 
+2.10.2
+

buildroot-external/board/tinker/patches/linux/0004-Don-t-be-TOO-severe-when-looking-for-the-IRQ-names.patch

@@ -0,0 +1,40 @@
+From 7c27055687c595e9f9eca484314f4fe3866a4260 Mon Sep 17 00:00:00 2001
+From: Myy <myy@miouyouyou.fr>
+Date: Tue, 18 Jul 2017 17:35:16 +0000
+Subject: [PATCH 2/2] Don't be TOO severe when looking for the IRQ names
+
+Using strncmp with an all caps result in the driver being unable to
+initialize itself when using the mainlined RK3288 DTS files, since they
+define the IRQ names as "job", "mmu" and "gpu" instead of "JOB", "MMU"
+and "GPU".
+
+strncmp calls have been replaced by strncasecmp calls in order to
+avoid such issue.
+
+Signed-off-by: Myy <myy@miouyouyou.fr>
+---
+ drivers/gpu/arm/midgard/mali_kbase_core_linux.c | 6 +++---
+ 1 file changed, 3 insertions(+), 3 deletions(-)
+
+diff --git a/drivers/gpu/arm/midgard/mali_kbase_core_linux.c b/drivers/gpu/arm/midgard/mali_kbase_core_linux.c
+index 0cccb0b..9cc65d2 100644
+--- a/drivers/gpu/arm/midgard/mali_kbase_core_linux.c
++++ b/drivers/gpu/arm/midgard/mali_kbase_core_linux.c
+@@ -938,11 +938,11 @@ static int assign_irqs(struct platform_device *pdev)
+ 		}
+ 
+ #ifdef CONFIG_OF
+-		if (!strncmp(irq_res->name, "JOB", 4)) {
++		if (!strncasecmp(irq_res->name, "JOB", 4)) {
+ 			irqtag = JOB_IRQ_TAG;
+-		} else if (!strncmp(irq_res->name, "MMU", 4)) {
++		} else if (!strncasecmp(irq_res->name, "MMU", 4)) {
+ 			irqtag = MMU_IRQ_TAG;
+-		} else if (!strncmp(irq_res->name, "GPU", 4)) {
++		} else if (!strncasecmp(irq_res->name, "GPU", 4)) {
+ 			irqtag = GPU_IRQ_TAG;
+ 		} else {
+ 			dev_err(&pdev->dev, "Invalid irq res name: '%s'\n",
+-- 
+2.10.2
+

buildroot-external/board/tinker/patches/linux/0005-Added-the-new-compatible-list-mainly-used-by-Rockchi.patch

@@ -0,0 +1,42 @@
+From ef7689887c31d2b1336e14f2c089185e8f60a9f1 Mon Sep 17 00:00:00 2001
+From: Myy <myy@miouyouyou.fr>
+Date: Mon, 7 Aug 2017 19:22:39 +0000
+Subject: [PATCH] Added the new "compatible" list, mainly used by Rockchip
+
+Because, you know, all the Mali Midgard GPU used to define the GPU
+using the 'compatible = "arm,mali-midgard"' property, which worked fine.
+
+But it was removed.
+
+They replaced the "arm,mali-midgard" node by "arm,mali-tXXX" where XXX
+is the GPU series, and added "arm,rk3288-mali" which is used by nothing.
+
+Which broke the Mali Midgard GPL kernel driver.
+
+This patch fixes this issue.
+
+Signed-off-by: Myy <myy@miouyouyou.fr>
+---
+ drivers/gpu/arm/midgard/mali_kbase_core_linux.c | 6 ++++++
+ 1 file changed, 6 insertions(+)
+
+diff --git a/drivers/gpu/arm/midgard/mali_kbase_core_linux.c b/drivers/gpu/arm/midgard/mali_kbase_core_linux.c
+index 27dcd9c1..cc4932a4 100644
+--- a/drivers/gpu/arm/midgard/mali_kbase_core_linux.c
++++ b/drivers/gpu/arm/midgard/mali_kbase_core_linux.c
+@@ -4742,6 +4742,12 @@ static const struct dev_pm_ops kbase_pm_ops = {
+ static const struct of_device_id kbase_dt_ids[] = {
+ 	{ .compatible = "arm,malit6xx" },
+ 	{ .compatible = "arm,mali-midgard" },
++	{ .compatible = "arm,mali-t720" },
++	{ .compatible = "arm,mali-t760" },
++	{ .compatible = "arm,mali-t820" },
++	{ .compatible = "arm,mali-t830" },
++	{ .compatible = "arm,mali-t860" },
++	{ .compatible = "arm,mali-t880" },
+ 	{ /* sentinel */ }
+ };
+ MODULE_DEVICE_TABLE(of, kbase_dt_ids);
+-- 
+2.13.0
+

buildroot-external/board/tinker/patches/linux/0009-GPU-ARM-Midgard-Adapt-to-the-new-mmap-call-checks.patch

@@ -0,0 +1,34 @@
+From 9812105eb6220863af05fc72591118f0a48e1c4e Mon Sep 17 00:00:00 2001
+From: Myy Miouyouyou <myy@miouyouyou.fr>
+Date: Mon, 21 May 2018 22:32:59 +0200
+Subject: [PATCH] GPU: ARM: Midgard: Adapt to the new mmap call checks.
+
+Now, I don't know if this driver is just one of these "buggy" drivers
+Linus is talking about, or if this is just standard GPU procedure.
+
+Anyway, this patch is due to this change by Linus Torvalds :
+https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=be83bbf806822b1b89e0a0f23cd87cddc409e429
+
+And the fix is inspired by :
+https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=76ef6b28ea4f81c3d511866a9b31392caa833126
+
+Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
+---
+ drivers/gpu/arm/midgard/mali_kbase_core_linux.c | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/drivers/gpu/arm/midgard/mali_kbase_core_linux.c b/drivers/gpu/arm/midgard/mali_kbase_core_linux.c
+index cc4932a4ead7..89b4cca27cf1 100644
+--- a/drivers/gpu/arm/midgard/mali_kbase_core_linux.c
++++ b/drivers/gpu/arm/midgard/mali_kbase_core_linux.c
+@@ -1087,6 +1087,7 @@ static int kbase_open(struct inode *inode, struct file *filp)
+ 
+ 	init_waitqueue_head(&kctx->event_queue);
+ 	filp->private_data = kctx;
++	filp->f_mode |= FMODE_UNSIGNED_OFFSET;
+ 	kctx->filp = filp;
+ 
+ 	if (kbdev->infinite_cache_active_default)
+-- 
+2.17.0
+

buildroot-external/board/tinker/patches/linux/1001-Integrating-the-Mali-drivers.patch

@@ -0,0 +1,65 @@
+From 7de25b73e152830587740d8f2ffaad94c72d90ac Mon Sep 17 00:00:00 2001
+From: Myy <myy@miouyouyou.fr>
+Date: Mon, 17 Jul 2017 11:24:47 +0000
+Subject: [PATCH 1/5] Integrating the Mali drivers
+
+Changses required in order to select and compile the previously copied
+Mali Midgard drivers.
+
+Signed-off-by: Myy <myy@miouyouyou.fr>
+
+---
+ drivers/base/Kconfig  | 2 ++
+ drivers/base/Makefile | 1 +
+ drivers/gpu/Makefile  | 2 +-
+ drivers/video/Kconfig | 1 +
+ 4 files changed, 5 insertions(+), 1 deletion(-)
+
+diff --git a/drivers/base/Kconfig b/drivers/base/Kconfig
+index f046d21..b0982fc 100644
+--- a/drivers/base/Kconfig
++++ b/drivers/base/Kconfig
+@@ -348,3 +348,5 @@ config GENERIC_ARCH_TOPOLOGY
+ 	  runtime.
+ 
+ endmenu
++
++source "drivers/base/ump/Kconfig"
+diff --git a/drivers/base/Makefile b/drivers/base/Makefile
+index 397e5c3..251e0cf 100644
+--- a/drivers/base/Makefile
++++ b/drivers/base/Makefile
+@@ -24,6 +24,7 @@ obj-$(CONFIG_PINCTRL) += pinctrl.o
+ obj-$(CONFIG_DEV_COREDUMP) += devcoredump.o
+ obj-$(CONFIG_GENERIC_MSI_IRQ_DOMAIN) += platform-msi.o
+ obj-$(CONFIG_GENERIC_ARCH_TOPOLOGY) += arch_topology.o
++obj-$(CONFIG_UMP) += ump/
+ 
+ obj-y			+= test/
+ 
+diff --git a/drivers/gpu/Makefile b/drivers/gpu/Makefile
+index e9ed439..66386b4 100644
+--- a/drivers/gpu/Makefile
++++ b/drivers/gpu/Makefile
+@@ -2,5 +2,5 @@
+ # taken to initialize them in the correct order. Link order is the only way
+ # to ensure this currently.
+ obj-$(CONFIG_TEGRA_HOST1X)	+= host1x/
+-obj-y			+= drm/ vga/
++obj-y			+= drm/ vga/ arm/
+ obj-$(CONFIG_IMX_IPUV3_CORE)	+= ipu-v3/
+diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
+index 3c20af9..041e15f 100644
+--- a/drivers/video/Kconfig
++++ b/drivers/video/Kconfig
+@@ -17,6 +17,7 @@ source "drivers/gpu/vga/Kconfig"
+ 
+ source "drivers/gpu/host1x/Kconfig"
+ source "drivers/gpu/ipu-v3/Kconfig"
++source "drivers/gpu/arm/midgard/Kconfig"
+ 
+ source "drivers/gpu/drm/Kconfig"
+ 
+-- 
+2.10.2
+

buildroot-external/board/tinker/patches/linux/1002-clk-rockchip-add-all-known-operating-points-to-the-a.patch

@@ -0,0 +1,50 @@
+From e0c5a419cf5464cd02996431afa98e3b22dc6801 Mon Sep 17 00:00:00 2001
+From: Myy <myy@miouyouyou.fr>
+Date: Mon, 17 Jul 2017 23:14:48 +0000
+Subject: [PATCH] clk: rockchip: add all known operating points to the allowed
+ CPU freqs
+
+Patch from Willy Tarreau
+
+Original commit message :
+At least 1920 MHz runs stable on the MiQi even on openssl speed -multi 4,
+which is by far the most intensive workload, and 1992/2016 work fine on
+the CS-008 until it starts to heat too much. So add all of them so that
+the device tree can simply manipulate them.
+
+Signed-off-by: Myy <myy@miouyouyou.fr>
+---
+ drivers/clk/rockchip/clk-rk3288.c | 17 +++++++++++++++++
+ 1 file changed, 17 insertions(+)
+
+diff --git a/drivers/clk/rockchip/clk-rk3288.c b/drivers/clk/rockchip/clk-rk3288.c
+index 753c649..fd2058f 100644
+--- a/drivers/clk/rockchip/clk-rk3288.c
++++ b/drivers/clk/rockchip/clk-rk3288.c
+@@ -145,6 +145,23 @@ static struct rockchip_pll_rate_table rk3288_pll_rates[] = {
+ 	}
+ 
+ static struct rockchip_cpuclk_rate_table rk3288_cpuclk_rates[] __initdata = {
++	RK3288_CPUCLK_RATE(2208000000U, 1, 3, 1, 3, 3),
++	RK3288_CPUCLK_RATE(2184000000U, 1, 3, 1, 3, 3),
++	RK3288_CPUCLK_RATE(2160000000U, 1, 3, 1, 3, 3),
++	RK3288_CPUCLK_RATE(2136000000, 1, 3, 1, 3, 3),
++	RK3288_CPUCLK_RATE(2112000000, 1, 3, 1, 3, 3),
++	RK3288_CPUCLK_RATE(2088000000, 1, 3, 1, 3, 3),
++	RK3288_CPUCLK_RATE(2064000000, 1, 3, 1, 3, 3),
++	RK3288_CPUCLK_RATE(2040000000, 1, 3, 1, 3, 3),
++	RK3288_CPUCLK_RATE(2016000000, 1, 3, 1, 3, 3),
++	RK3288_CPUCLK_RATE(1992000000, 1, 3, 1, 3, 3),
++	RK3288_CPUCLK_RATE(1968000000, 1, 3, 1, 3, 3),
++	RK3288_CPUCLK_RATE(1944000000, 1, 3, 1, 3, 3),
++	RK3288_CPUCLK_RATE(1920000000, 1, 3, 1, 3, 3),
++	RK3288_CPUCLK_RATE(1896000000, 1, 3, 1, 3, 3),
++	RK3288_CPUCLK_RATE(1872000000, 1, 3, 1, 3, 3),
++	RK3288_CPUCLK_RATE(1848000000, 1, 3, 1, 3, 3),
++	RK3288_CPUCLK_RATE(1824000000, 1, 3, 1, 3, 3),
+ 	RK3288_CPUCLK_RATE(1800000000, 1, 3, 1, 3, 3),
+ 	RK3288_CPUCLK_RATE(1704000000, 1, 3, 1, 3, 3),
+ 	RK3288_CPUCLK_RATE(1608000000, 1, 3, 1, 3, 3),
+-- 
+2.10.2
+

buildroot-external/board/tinker/patches/linux/1003-clk-rockchip-rk3288-prefer-vdpu-for-vcodec-clock-sou.patch

@@ -0,0 +1,41 @@
+From b82f540967f6a732a22bbd236457b864951aeda7 Mon Sep 17 00:00:00 2001
+From: Myy <myy@miouyouyou.fr>
+Date: Sun, 14 May 2017 10:13:26 +0000
+Subject: [PATCH] clk: rockchip: rk3288: prefer vdpu for vcodec clock source
+
+Patch provided by Randy Li. The original commit message reads :
+
+_______________
+The RK3288 CRU system clock solution would suggest use
+the vdpu clock source for the VPU(aclk_vpu and hclk_vpu).
+
+Reading the registers of VPU(both VEPU and VDPU) would become all high
+when the vepu is used as the clock source. It may be a bug in the SoC,
+not sure whether it is fixed at RK3288W.
+
+Signed-off-by: Randy Li <ayaka@soulik.info>
+_______________
+
+This also resolves a freeze when loading the OOT Video Codec driver
+
+Signed-off-by: Myy <myy@miouyouyou.fr>
+---
+ drivers/clk/rockchip/clk-rk3288.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/drivers/clk/rockchip/clk-rk3288.c b/drivers/clk/rockchip/clk-rk3288.c
+index 1227f74..f218256 100644
+--- a/drivers/clk/rockchip/clk-rk3288.c
++++ b/drivers/clk/rockchip/clk-rk3288.c
+@@ -215,7 +215,7 @@ PNAME(mux_hsadcout_p)	= { "hsadc_src", "ext_hsadc" };
+ PNAME(mux_edp_24m_p)	= { "ext_edp_24m", "xin24m" };
+ PNAME(mux_tspout_p)	= { "cpll", "gpll", "npll", "xin27m" };
+ 
+-PNAME(mux_aclk_vcodec_pre_p)	= { "aclk_vepu", "aclk_vdpu" };
++PNAME(mux_aclk_vcodec_pre_p)	= { "aclk_vdpu", "aclk_vepu" };
+ PNAME(mux_usbphy480m_p)		= { "sclk_otgphy1_480m", "sclk_otgphy2_480m",
+ 				    "sclk_otgphy0_480m" };
+ PNAME(mux_hsicphy480m_p)	= { "cpll", "gpll", "usbphy480m_src" };
+-- 
+2.10.2
+

buildroot-external/board/tinker/patches/linux/1004-Remove-the-dependency-to-the-clk_mali-symbol.patch

@@ -0,0 +1,30 @@
+From 239a5e3016b7f676bc3f56ea509ed172bf954001 Mon Sep 17 00:00:00 2001
+From: Myy <myy@miouyouyou.fr>
+Date: Sat, 22 Jul 2017 04:07:36 +0000
+Subject: [PATCH] Remove the dependency to the clk_mali symbol.
+
+Inspired by @wzzy2 patch
+
+https://github.com/rockchip-linux/rockchip_forwardports/commit/359865c617129fe5fcc5530f4a88abcfaa6a5cb4
+
+Signed-off-by: Myy <myy@miouyouyou.fr>
+---
+ drivers/gpu/arm/midgard/mali_kbase_core_linux.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/drivers/gpu/arm/midgard/mali_kbase_core_linux.c b/drivers/gpu/arm/midgard/mali_kbase_core_linux.c
+index 9cc65d2..27dcd9c 100644
+--- a/drivers/gpu/arm/midgard/mali_kbase_core_linux.c
++++ b/drivers/gpu/arm/midgard/mali_kbase_core_linux.c
+@@ -3793,7 +3793,7 @@ static int power_control_init(struct platform_device *pdev)
+ 	}
+ #endif /* LINUX_VERSION_CODE >= 3, 12, 0 */
+ 
+-	kbdev->clock = clk_get(kbdev->dev, "clk_mali");
++	kbdev->clock = of_clk_get(kbdev->dev->of_node, 0);
+ 	if (IS_ERR_OR_NULL(kbdev->clock)) {
+ 		err = PTR_ERR(kbdev->clock);
+ 		kbdev->clock = NULL;
+-- 
+2.10.2
+

buildroot-external/board/tinker/patches/linux/1005-Reboot-patch-2-The-Return.patch

@@ -0,0 +1,156 @@
+From 1aeeeeaf10ad5888c1a5b3ab9b780be91c7dada9 Mon Sep 17 00:00:00 2001
+From: Myy <myy@miouyouyou.fr>
+Date: Mon, 24 Jul 2017 23:09:31 +0000
+Subject: [PATCH] Last try for the reboot hack
+
+If this one does not work, get a refund for your CantRebootBoard.
+
+Signed-off-by: Myy <myy@miouyouyou.fr>
+---
+ drivers/mmc/host/dw_mmc-rockchip.c | 24 ++++++++++++++++++++++++
+ drivers/mmc/host/dw_mmc.c          | 26 ++++++++++++++++++++++++++
+ include/linux/reboot.h             |  3 +++
+ kernel/reboot.c                    |  1 +
+ 4 files changed, 54 insertions(+)
+
+diff --git a/drivers/mmc/host/dw_mmc-rockchip.c b/drivers/mmc/host/dw_mmc-rockchip.c
+index aaed6f9b..71131020 100644
+--- a/drivers/mmc/host/dw_mmc-rockchip.c
++++ b/drivers/mmc/host/dw_mmc-rockchip.c
+@@ -14,10 +14,12 @@
+ #include <linux/of_address.h>
+ #include <linux/mmc/slot-gpio.h>
+ #include <linux/pm_runtime.h>
++#include <linux/regulator/consumer.h> // Hack
+ #include <linux/slab.h>
+ 
+ #include "dw_mmc.h"
+ #include "dw_mmc-pltfm.h"
++#include "../core/core.h" // Hack
+ 
+ #define RK3288_CLKGEN_DIV       2
+ 
+@@ -365,6 +367,27 @@ static int dw_mci_rockchip_probe(struct platform_device *pdev)
+ 	return 0;
+ }
+ 
++static void dw_mci_rockchip_platfm_shutdown(struct platform_device *pdev)
++{
++	struct dw_mci *host = platform_get_drvdata(pdev);
++	struct mmc_host *mmc = host->slot->mmc;
++	int ret;
++
++	if(of_machine_is_compatible("asus,rk3288-tinker")){
++
++		mmc_power_off(mmc);
++
++		mdelay(20);
++
++		if (!IS_ERR(mmc->supply.vmmc))
++			ret = regulator_enable(mmc->supply.vmmc);
++
++		if (!IS_ERR(mmc->supply.vqmmc))
++			regulator_set_voltage(mmc->supply.vqmmc, 3000000, 3300000);
++	}
++}
++
++
+ static int dw_mci_rockchip_remove(struct platform_device *pdev)
+ {
+ 	pm_runtime_get_sync(&pdev->dev);
+@@ -385,6 +408,7 @@ static const struct dev_pm_ops dw_mci_rockchip_dev_pm_ops = {
+ static struct platform_driver dw_mci_rockchip_pltfm_driver = {
+ 	.probe		= dw_mci_rockchip_probe,
+ 	.remove		= dw_mci_rockchip_remove,
++	.shutdown	= dw_mci_rockchip_platfm_shutdown,
+ 	.driver		= {
+ 		.name		= "dwmmc_rockchip",
+ 		.of_match_table	= dw_mci_rockchip_match,
+diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c
+index a9dfb269..ee956a57 100644
+--- a/drivers/mmc/host/dw_mmc.c
++++ b/drivers/mmc/host/dw_mmc.c
+@@ -39,8 +39,10 @@
+ #include <linux/of.h>
+ #include <linux/of_gpio.h>
+ #include <linux/mmc/slot-gpio.h>
++#include <linux/reboot.h> // Hack
+ 
+ #include "dw_mmc.h"
++#include "../core/core.h" // Hack
+ 
+ /* Common flag combinations */
+ #define DW_MCI_DATA_ERROR_FLAGS	(SDMMC_INT_DRTO | SDMMC_INT_DCRC | \
+@@ -2687,6 +2689,28 @@ static irqreturn_t dw_mci_interrupt(int irq, void *dev_id)
+ 	return IRQ_HANDLED;
+ }
+ 
++struct dw_mci *mSdhost;
++void setmmcEmergency() {
++	struct mmc_host *mmc;
++	int ret;
++
++	printk(KERN_ERR "Emergency route taken.\n");
++	if (of_machine_is_compatible("asus,rk3288-tinker")) {
++		mmc = mSdhost->slot->mmc;
++
++		mmc_power_off(mmc);
++
++		mdelay(20);
++
++		if (!IS_ERR(mmc->supply.vmmc))
++			ret = regulator_enable(mmc->supply.vmmc);
++
++		if (!IS_ERR(mmc->supply.vqmmc))
++			regulator_set_voltage(mmc->supply.vqmmc, 3000000, 3300000);
++	}
++}
++EXPORT_SYMBOL(setmmcEmergency);
++
+ static int dw_mci_init_slot(struct dw_mci *host)
+ {
+ 	struct mmc_host *mmc;
+@@ -2718,6 +2742,8 @@ static int dw_mci_init_slot(struct dw_mci *host)
+ 		mmc->f_max = freq[1];
+ 	}
+ 
++	if (of_find_property(host->dev->of_node, "supports-sd", NULL))
++		mSdhost = host;
+ 	/*if there are external regulators, get them*/
+ 	ret = mmc_regulator_get_supply(mmc);
+ 	if (ret == -EPROBE_DEFER)
+diff --git a/include/linux/reboot.h b/include/linux/reboot.h
+index a7ff409f..586e4504 100644
+--- a/include/linux/reboot.h
++++ b/include/linux/reboot.h
+@@ -72,12 +72,15 @@ extern char poweroff_cmd[POWEROFF_CMD_PATH_LEN];
+ 
+ extern void orderly_poweroff(bool force);
+ extern void orderly_reboot(void);
++// Wonderful ASUS hack
++extern void setmmcEmergency(void);
+ 
+ /*
+  * Emergency restart, callable from an interrupt handler.
+  */
+ 
+ extern void emergency_restart(void);
++
+ #include <asm/emergency-restart.h>
+ 
+ #endif /* _LINUX_REBOOT_H */
+diff --git a/kernel/reboot.c b/kernel/reboot.c
+index bd30a973..9f99488f 100644
+--- a/kernel/reboot.c
++++ b/kernel/reboot.c
+@@ -61,6 +61,7 @@ void (*pm_power_off_prepare)(void);
+ void emergency_restart(void)
+ {
+ 	kmsg_dump(KMSG_DUMP_EMERG);
++	setmmcEmergency();
+ 	machine_emergency_restart();
+ }
+ EXPORT_SYMBOL_GPL(emergency_restart);
+-- 
+2.13.0
+

buildroot-external/board/tinker/patches/linux/1007-dt-bindings-Document-the-Rockchip-RGA-bindings.patch

@@ -0,0 +1,59 @@
+From c9f505dba7e4a3adc62054b852349e8bbae10326 Mon Sep 17 00:00:00 2001
+From: Jacob Chen <jacob-chen@iotwrt.com>
+Date: Mon, 26 Jun 2017 22:53:22 +0800
+Subject: [PATCH 5/9] dt-bindings: Document the Rockchip RGA bindings
+
+Add DT bindings documentation for Rockchip RGA
+
+Signed-off-by: Yakir Yang <ykk@rock-chips.com>
+Signed-off-by: Jacob Chen <jacob-chen@iotwrt.com>
+---
+ .../devicetree/bindings/media/rockchip-rga.txt     | 36 ++++++++++++++++++++++
+ 1 file changed, 36 insertions(+)
+ create mode 100644 Documentation/devicetree/bindings/media/rockchip-rga.txt
+
+diff --git a/Documentation/devicetree/bindings/media/rockchip-rga.txt b/Documentation/devicetree/bindings/media/rockchip-rga.txt
+new file mode 100644
+index 00000000..48a260e5
+--- /dev/null
++++ b/Documentation/devicetree/bindings/media/rockchip-rga.txt
+@@ -0,0 +1,36 @@
++device-tree bindings for rockchip 2D raster graphic acceleration controller (RGA)
++
++RGA is a separate 2D raster graphic acceleration unit. It accelerates 2D
++graphics operations, such as point/line drawing, image scaling, rotation,
++BitBLT, alpha blending and image blur/sharpness.
++
++Required properties:
++- compatible: value should be one of the following
++		"rockchip,rk3228-rga";
++		"rockchip,rk3288-rga";
++		"rockchip,rk3399-rga";
++
++- interrupts: RGA interrupt number.
++
++- clocks: phandle to RGA sclk/hclk/aclk clocks
++
++- clock-names: should be "aclk" "hclk" and "sclk"
++
++- resets: Must contain an entry for each entry in reset-names.
++  See ../reset/reset.txt for details.
++- reset-names: should be "core" "axi" and "ahb"
++
++Example:
++SoC specific DT entry:
++	rga: rga@ff680000 {
++		compatible = "rockchip,rk3399-rga";
++		reg = <0xff680000 0x10000>;
++		interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
++		interrupt-names = "rga";
++		clocks = <&cru ACLK_RGA>, <&cru HCLK_RGA>, <&cru SCLK_RGA_CORE>;
++		clock-names = "aclk", "hclk", "sclk";
++
++		resets = <&cru SRST_RGA_CORE>, <&cru SRST_A_RGA>, <&cru SRST_H_RGA>;
++		reset-names = "core, "axi", "ahb";
++		status = "disabled";
++	};
+-- 
+2.13.0
+

buildroot-external/board/tinker/patches/linux/1008-dwc2-avoid_nak_for_csplit.patch

@@ -0,0 +1,83 @@
+diff --git a/drivers/usb/dwc2/hcd.c b/drivers/usb/dwc2/hcd.c
+index 7b6eb0ad513b..96b6935dc0d7 100644
+--- a/drivers/usb/dwc2/hcd.c
++++ b/drivers/usb/dwc2/hcd.c
+@@ -2748,6 +2748,8 @@ static int dwc2_assign_and_init_hc(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh)
+ 	chan->xfer_len = urb->length - urb->actual_length;
+ 	chan->xfer_count = 0;
+ 
++	chan->csplit_nak = 0;
++
+ 	/* Set the split attributes if required */
+ 	if (qh->do_split)
+ 		dwc2_hc_init_split(hsotg, chan, qtd, urb);
+diff --git a/drivers/usb/dwc2/hcd.h b/drivers/usb/dwc2/hcd.h
+index 78e9e01051b5..e54f1351225b 100644
+--- a/drivers/usb/dwc2/hcd.h
++++ b/drivers/usb/dwc2/hcd.h
+@@ -143,6 +143,7 @@ struct dwc2_host_chan {
+ 	u8 halt_pending;
+ 	u8 do_split;
+ 	u8 complete_split;
++	u8 csplit_nak;
+ 	u8 hub_addr;
+ 	u8 hub_port;
+ 	u8 xact_pos;
+diff --git a/drivers/usb/dwc2/hcd_intr.c b/drivers/usb/dwc2/hcd_intr.c
+index 916d991b96b8..551cfacd2252 100644
+--- a/drivers/usb/dwc2/hcd_intr.c
++++ b/drivers/usb/dwc2/hcd_intr.c
+@@ -691,6 +691,7 @@ static void dwc2_release_channel(struct dwc2_hsotg *hsotg,
+ 	enum dwc2_transaction_type tr_type;
+ 	u32 haintmsk;
+ 	int free_qtd = 0;
++	int continue_trans = 1;
+ 
+ 	if (dbg_hc(chan))
+ 		dev_vdbg(hsotg->dev, "  %s: channel %d, halt_status %d\n",
+@@ -719,6 +720,7 @@ static void dwc2_release_channel(struct dwc2_hsotg *hsotg,
+ 		 * deactivated. Don't want to do anything except release the
+ 		 * host channel and try to queue more transfers.
+ 		 */
++		continue_trans = 0;
+ 		goto cleanup;
+ 	case DWC2_HC_XFER_PERIODIC_INCOMPLETE:
+ 		dev_vdbg(hsotg->dev, "  Complete URB with I/O error\n");
+@@ -730,6 +732,11 @@ static void dwc2_release_channel(struct dwc2_hsotg *hsotg,
+ 		break;
+ 	}
+ 
++	if (chan->csplit_nak) {
++		continue_trans = 0;
++		chan->csplit_nak = 0;
++	}
++
+ 	dwc2_deactivate_qh(hsotg, chan->qh, free_qtd);
+ 
+ cleanup:
+@@ -767,9 +774,11 @@ static void dwc2_release_channel(struct dwc2_hsotg *hsotg,
+ 	dwc2_writel(haintmsk, hsotg->regs + HAINTMSK);
+ 
+ 	/* Try to queue more transfers now that there's a free channel */
+-	tr_type = dwc2_hcd_select_transactions(hsotg);
+-	if (tr_type != DWC2_TRANSACTION_NONE)
+-		dwc2_hcd_queue_transactions(hsotg, tr_type);
++	if (continue_trans) {
++		tr_type = dwc2_hcd_select_transactions(hsotg);
++		if (tr_type != DWC2_TRANSACTION_NONE)
++			dwc2_hcd_queue_transactions(hsotg, tr_type);
++	}
+ }
+ 
+ /*
+@@ -1205,6 +1214,7 @@ static void dwc2_hc_nak_intr(struct dwc2_hsotg *hsotg,
+ 	if (chan->do_split) {
+ 		if (chan->complete_split)
+ 			qtd->error_count = 0;
++		chan->csplit_nak = 1;
+ 		qtd->complete_split = 0;
+ 		dwc2_halt_channel(hsotg, chan, qtd, DWC2_HC_XFER_NAK);
+ 		goto handle_nak_done;
+-- 
+2.11.0
+

buildroot-external/board/tinker/patches/linux/2001-dts-rk3288-miqi-Enabling-the-Mali-GPU-node.patch

@@ -0,0 +1,35 @@
+From 604ea7fc311af2b3a41e7fe3b4fbde0ee03dfb9c Mon Sep 17 00:00:00 2001
+From: Myy Miouyouyou <myy@miouyouyou.fr>
+Date: Thu, 19 Oct 2017 21:09:50 +0200
+Subject: [PATCH 04/28] dts: rk3288: miqi: Enabling the Mali GPU node
+
+Why is the MiQi the only one left without a working mali GPU node ?
+
+Seriously, is there a rk3288 chipset WITHOUT a mali GPU ? Couldn't
+they enable it once in the DTSI, instead of defining it as "disabled"
+and enabling it in every DTS file ?
+
+Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
+---
+ arch/arm/boot/dts/rk3288-miqi.dts | 5 +++++
+ 1 file changed, 5 insertions(+)
+
+diff --git a/arch/arm/boot/dts/rk3288-miqi.dts b/arch/arm/boot/dts/rk3288-miqi.dts
+index 4d923aa6..3cd60674 100644
+--- a/arch/arm/boot/dts/rk3288-miqi.dts
++++ b/arch/arm/boot/dts/rk3288-miqi.dts
+@@ -149,6 +149,11 @@
+ 	status = "ok";
+ };
+ 
++&gpu {
++	mali-supply = <&vdd_gpu>;
++	status = "okay";
++};
++
+ &hdmi {
+ 	ddc-i2c-bus = <&i2c5>;
+ 	status = "okay";
+-- 
+2.11.0
+

buildroot-external/board/tinker/patches/linux/2002-ARM-dts-rockchip-fix-the-regulator-s-voltage-range-o.patch

@@ -0,0 +1,45 @@
+From 89e5763110ca77d68a4be00cd97a638adc2401d5 Mon Sep 17 00:00:00 2001
+From: Willy Tarreau <w@1wt.eu>
+Date: Tue, 2 Aug 2016 08:31:00 +0200
+Subject: [PATCH 05/28] ARM: dts: rockchip: fix the regulator's voltage range
+ on MiQi board
+
+The board declared too narrow a voltage range for the CPU and GPU
+regulators, preventing it from using the full CPU frequency range.
+The regulators support 712500 to 1500000 microvolts.
+
+Signed-off-by: Willy Tarreau <w@1wt.eu>
+(cherry picked from commit 95330e63a9295a2632cee8cce5db80677f01857a)
+---
+ arch/arm/boot/dts/rk3288-miqi.dts | 8 ++++----
+ 1 file changed, 4 insertions(+), 4 deletions(-)
+
+diff --git a/arch/arm/boot/dts/rk3288-miqi.dts b/arch/arm/boot/dts/rk3288-miqi.dts
+index 3cd60674..a1c3cdaa 100644
+--- a/arch/arm/boot/dts/rk3288-miqi.dts
++++ b/arch/arm/boot/dts/rk3288-miqi.dts
+@@ -168,8 +168,8 @@
+ 		fcs,suspend-voltage-selector = <1>;
+ 		reg = <0x40>;
+ 		regulator-name = "vdd_cpu";
+-		regulator-min-microvolt = <850000>;
+-		regulator-max-microvolt = <1350000>;
++		regulator-min-microvolt = <712500>;
++		regulator-max-microvolt = <1500000>;
+ 		regulator-always-on;
+ 		regulator-boot-on;
+ 		regulator-enable-ramp-delay = <300>;
+@@ -182,8 +182,8 @@
+ 		fcs,suspend-voltage-selector = <1>;
+ 		reg = <0x41>;
+ 		regulator-name = "vdd_gpu";
+-		regulator-min-microvolt = <850000>;
+-		regulator-max-microvolt = <1350000>;
++		regulator-min-microvolt = <712500>;
++		regulator-max-microvolt = <1500000>;
+ 		regulator-always-on;
+ 		vin-supply = <&vcc_sys>;
+ 	};
+-- 
+2.11.0
+

buildroot-external/board/tinker/patches/linux/2003-ARM-dts-rockchip-add-the-MiQi-board-s-fan-definition.patch

@@ -0,0 +1,46 @@
+From c27e445527e949f3ef46d5326066196969c17d23 Mon Sep 17 00:00:00 2001
+From: Myy <myy@miouyouyou.fr>
+Date: Sun, 12 Mar 2017 19:43:15 +0000
+Subject: [PATCH 06/28] ARM: dts: rockchip: add the MiQi board's fan definition
+
+The MiQi board is sold with an enclosure in which a fan is connected
+to the second LED output, and configured by default in "heartbeat"
+mode so that it rotates slowly and increases when the CPU load
+increases, ensuring appropriate cooling by default. This LED output
+is called "Fan" in the original kernel and connected to GPIO18
+(gpiochip 0, pin 18). Here we called it "miqi:green:fan" to stay
+consistent with the kernel's naming conventions.
+
+It's worth noting that without this patch the fan doesn't work at
+all, risking to make the board overheat.
+
+Fixes: 162718c (v4.7)
+Cc: Heiko Stuebner <heiko@sntech.de>
+Signed-off-by: Willy Tarreau <w@1wt.eu>
+
+Signed-off-by: Myy <myy@miouyouyou.fr>
+---
+ arch/arm/boot/dts/rk3288-miqi.dts | 7 +++++++
+ 1 file changed, 7 insertions(+)
+
+diff --git a/arch/arm/boot/dts/rk3288-miqi.dts b/arch/arm/boot/dts/rk3288-miqi.dts
+index a1c3cdaa..0e383595 100644
+--- a/arch/arm/boot/dts/rk3288-miqi.dts
++++ b/arch/arm/boot/dts/rk3288-miqi.dts
+@@ -67,6 +67,13 @@
+ 	leds {
+ 		compatible = "gpio-leds";
+ 
++		fan {
++			gpios = <&gpio0 RK_PC2 GPIO_ACTIVE_HIGH>;
++			label = "miqi:green:fan";
++			linux,default-trigger = "heartbeat";
++		};
++
++
+ 		work {
+ 			gpios = <&gpio7 RK_PA2 GPIO_ACTIVE_HIGH>;
+ 			label = "miqi:green:user";
+-- 
+2.11.0
+

buildroot-external/board/tinker/patches/linux/2004-ARM-dts-rockchip-add-support-for-1800-MHz-operation-.patch

@@ -0,0 +1,41 @@
+From e7e092be197c51b4d222a3b4e6638318067b7e6a Mon Sep 17 00:00:00 2001
+From: Willy Tarreau <w@1wt.eu>
+Date: Tue, 2 Aug 2016 08:20:53 +0200
+Subject: [PATCH 07/28] ARM: dts: rockchip: add support for 1800 MHz operation
+ on MiQi board
+
+This board happily supports 1800 MHz operations (and even more), so
+let's enable it.
+
+Signed-off-by: Willy Tarreau <w@1wt.eu>
+(cherry picked from commit a0b82a29e7873a81f49ac5f50be3df1c7d312a14)
+---
+ arch/arm/boot/dts/rk3288-miqi.dts | 12 ++++++++++++
+ 1 file changed, 12 insertions(+)
+
+diff --git a/arch/arm/boot/dts/rk3288-miqi.dts b/arch/arm/boot/dts/rk3288-miqi.dts
+index 0e383595..80603a3d 100644
+--- a/arch/arm/boot/dts/rk3288-miqi.dts
++++ b/arch/arm/boot/dts/rk3288-miqi.dts
+@@ -126,6 +126,18 @@
+ 
+ &cpu0 {
+ 	cpu0-supply = <&vdd_cpu>;
++	operating-points = <
++		/* KHz    uV */
++		1800000 1400000
++		1704000 1350000
++		1608000 1300000
++		1512000 1250000
++		1416000 1200000
++		1200000 1100000
++		1008000 1050000
++		 816000 1000000
++		 600000  900000
++	>;
+ };
+ 
+ &emmc {
+-- 
+2.11.0
+

buildroot-external/board/tinker/patches/linux/2005-Readapt-ARM-dts-rockchip-miqi-add-turbo-mode-operati.patch

@@ -0,0 +1,170 @@
+From de9dcd5ecab0686022eee243464f35d2c7a34c97 Mon Sep 17 00:00:00 2001
+From: Myy <myy@miouyouyou.fr>
+Date: Mon, 16 Jan 2017 12:44:56 +0000
+Subject: [PATCH 08/28] Readapt: ARM: dts: rockchip: miqi: add turbo-mode
+ operating points
+
+Readaptation of Willy Tarreau patch.
+
+Here's the original commit message:
+
+By switching to opp-v2 we can declare "turbo-mode" operating points
+which are only enabled when /sys/devices/system/cpu/cpufreq/boost is
+set. It is convenient because it allows to boot, set a safe powersave
+governor, enable boost, limit scaling_max_freq to a safe value, then
+change the governor to performance or ondemand, and the frequency can
+then be manually adjusted by only touching scaling_max_freq.
+
+New values are 1896, 1920, 1992, 2016, 2040 MHz, 2064, 2088, 2112,
+2136, 2160, 2184, 2208. MiQi boards work fine up to 2112 with a very
+good power supply (5.2V/3A real) and a strong heatsink. Higher
+frequencies may randomly work. At least 1992 is rock solid for hours
+using "openssl speed -multi 4". The other ones have only been tested
+for a few minutes. Frequencies of 1896 and 1920 MHz use 1.425V.
+1992 MHz uses 1.45V. 2016, 2040 and 2064 use 1.475V. 2088 and above
+use 1.500V. 2160, 2184 and 2208 cause the lowest frequency to be
+picked. It's obvious that it's a sign issue somewhere in the kernel
+but this one was not found yet.
+
+Signed-off-by: Myy <myy@miouyouyou.fr>
+---
+ arch/arm/boot/dts/rk3288-miqi.dts | 120 +++++++++++++++++++++++++++++++++-----
+ 1 file changed, 107 insertions(+), 13 deletions(-)
+
+diff --git a/arch/arm/boot/dts/rk3288-miqi.dts b/arch/arm/boot/dts/rk3288-miqi.dts
+index 80603a3d..d7fde483 100644
+--- a/arch/arm/boot/dts/rk3288-miqi.dts
++++ b/arch/arm/boot/dts/rk3288-miqi.dts
+@@ -122,22 +122,116 @@
+ 		regulator-always-on;
+ 		regulator-boot-on;
+ 	};
+-};
+ 
++
++	cpu0_opp_table: opp_table0 {
++		compatible = "operating-points-v2";
++		opp-shared;
++
++		opp@600000000 {
++			opp-hz = /bits/ 64 <600000000>;
++			opp-microvolt = <900000>;
++		};
++		opp@816000000 {
++			opp-hz = /bits/ 64 <816000000>;
++			opp-microvolt = <1000000>;
++		};
++		opp@1008000000 {
++			opp-hz = /bits/ 64 <1008000000>;
++			opp-microvolt = <1050000>;
++		};
++		opp@1200000000 {
++			opp-hz = /bits/ 64 <1200000000>;
++			opp-microvolt = <1100000>;
++		};
++		opp@1416000000 {
++			opp-hz = /bits/ 64 <1416000000>;
++			opp-microvolt = <1200000>;
++		};
++		opp@1512000000 {
++			opp-hz = /bits/ 64 <1512000000>;
++			opp-microvolt = <1250000>;
++		};
++		opp@1608000000 {
++			opp-hz = /bits/ 64 <1608000000>;
++			opp-microvolt = <1300000>;
++		};
++		opp@1704000000 {
++			opp-hz = /bits/ 64 <1704000000>;
++			opp-microvolt = <1350000>;
++		};
++		opp@1800000000 {
++			opp-hz = /bits/ 64 <1800000000>;
++			opp-microvolt = <1400000>;
++		};
++		/* boot-only frequencies below */
++		opp@1896000000 {
++			opp-hz = /bits/ 64 <1896000000>;
++			opp-microvolt = <1425000>;
++			turbo-mode;
++		};
++		opp@1920000000 {
++			opp-hz = /bits/ 64 <1920000000>;
++			opp-microvolt = <1425000>;
++			turbo-mode;
++		};
++		opp@1992000000 {
++			opp-hz = /bits/ 64 <1992000000>;
++			opp-microvolt = <1450000>;
++			turbo-mode;
++		};
++		opp@2016000000 {
++			opp-hz = /bits/ 64 <2016000000>;
++			opp-microvolt = <1475000>;
++			turbo-mode;
++		};
++		opp@2040000000 {
++			opp-hz = /bits/ 64 <2040000000>;
++			opp-microvolt = <1475000>;
++			turbo-mode;
++		};
++		opp@2064000000 {
++			opp-hz = /bits/ 64 <2064000000>;
++			opp-microvolt = <1475000>;
++			turbo-mode;
++		};
++		opp@2088000000 {
++			opp-hz = /bits/ 64 <2088000000>;
++			opp-microvolt = <1500000>;
++			turbo-mode;
++		};
++		opp@2112000000 {
++			opp-hz = /bits/ 64 <2112000000>;
++			opp-microvolt = <1500000>;
++			turbo-mode;
++		};
++		opp@2136000000 {
++			opp-hz = /bits/ 64 <2136000000>;
++			opp-microvolt = <1500000>;
++			turbo-mode;
++		};
++		opp@2160000000 {
++			opp-hz = /bits/ 64 <2160000000>;
++			opp-microvolt = <1500000>;
++			turbo-mode;
++		};
++		opp@2184000000 {
++			opp-hz = /bits/ 64 <2184000000>;
++			opp-microvolt = <1500000>;
++			turbo-mode;
++		};
++		opp@2208000000 {
++			opp-hz = /bits/ 64 <2208000000>;
++			opp-microvolt = <1500000>;
++			turbo-mode;
++		};
++	};
++};
++ 
+ &cpu0 {
+ 	cpu0-supply = <&vdd_cpu>;
+-	operating-points = <
+-		/* KHz    uV */
+-		1800000 1400000
+-		1704000 1350000
+-		1608000 1300000
+-		1512000 1250000
+-		1416000 1200000
+-		1200000 1100000
+-		1008000 1050000
+-		 816000 1000000
+-		 600000  900000
+-	>;
++
++	operating-points-v2 = <&cpu0_opp_table>;
+ };
+ 
+ &emmc {
+-- 
+2.11.0
+

buildroot-external/board/tinker/patches/linux/2006-ARM-DTSI-rk3288-Missing-GRF-handles.patch

@@ -0,0 +1,61 @@
+From 771bcfe1735e42650b763e52a042a9fd98b2fa5b Mon Sep 17 00:00:00 2001
+From: Myy Miouyouyou <myy@miouyouyou.fr>
+Date: Thu, 19 Oct 2017 21:20:43 +0200
+Subject: [PATCH 09/28] ARM: DTSI: rk3288.dtsi: Missing GRF handles
+
+Add missing GRF handles.
+
+This patch is taken from the patches provided by the ARMbian team.
+
+Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
+---
+ arch/arm/boot/dts/rk3288.dtsi | 5 +++++
+ 1 file changed, 5 insertions(+)
+
+diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
+index 356ed1e6..5b789528 100644
+--- a/arch/arm/boot/dts/rk3288.dtsi
++++ b/arch/arm/boot/dts/rk3288.dtsi
+@@ -547,6 +547,7 @@
+ 		pinctrl-2 = <&otp_gpio>;
+ 		#thermal-sensor-cells = <1>;
+ 		rockchip,hw-tshut-temp = <95000>;
++		rockchip,grf = <&grf>;
+ 		status = "disabled";
+ 	};
+ 
+@@ -655,6 +656,7 @@
+ 		pinctrl-0 = <&pwm0_pin>;
+ 		clocks = <&cru PCLK_PWM>;
+ 		clock-names = "pwm";
++		rockchip,grf = <&grf>;
+ 		status = "disabled";
+ 	};
+ 
+@@ -666,6 +668,7 @@
+ 		pinctrl-0 = <&pwm1_pin>;
+ 		clocks = <&cru PCLK_PWM>;
+ 		clock-names = "pwm";
++		rockchip,grf = <&grf>;
+ 		status = "disabled";
+ 	};
+ 
+@@ -677,6 +680,7 @@
+ 		pinctrl-0 = <&pwm2_pin>;
+ 		clocks = <&cru PCLK_PWM>;
+ 		clock-names = "pwm";
++		rockchip,grf = <&grf>;
+ 		status = "disabled";
+ 	};
+ 
+@@ -688,6 +692,7 @@
+ 		pinctrl-0 = <&pwm3_pin>;
+ 		clocks = <&cru PCLK_PWM>;
+ 		clock-names = "pwm";
++		rockchip,grf = <&grf>;
+ 		status = "disabled";
+ 	};
+ 
+-- 
+2.11.0
+

buildroot-external/board/tinker/patches/linux/2007-RK3288-DTSI-rk3288-Add-missing-SPI2-pinctrl.patch

@@ -0,0 +1,31 @@
+From 062488e4b8fd552c01e1104b3bc91a6f7ffe6c41 Mon Sep 17 00:00:00 2001
+From: Myy Miouyouyou <myy@miouyouyou.fr>
+Date: Thu, 19 Oct 2017 21:24:47 +0200
+Subject: [PATCH 10/28] RK3288: DTSI: rk3288.dtsi: Add missing SPI2 pinctrl
+
+The spi2_cs1 pin reference is missing in the spi2 first pin control
+definition.
+
+This patch is taken from the patches provided by the ARMbian team.
+
+Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
+---
+ arch/arm/boot/dts/rk3288.dtsi | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
+index 5b789528..9ed532cc 100644
+--- a/arch/arm/boot/dts/rk3288.dtsi
++++ b/arch/arm/boot/dts/rk3288.dtsi
+@@ -334,7 +334,7 @@
+ 		dma-names = "tx", "rx";
+ 		interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
+ 		pinctrl-names = "default";
+-		pinctrl-0 = <&spi2_clk &spi2_tx &spi2_rx &spi2_cs0>;
++		pinctrl-0 = <&spi2_clk &spi2_tx &spi2_rx &spi2_cs0 &spi2_cs1>;
+ 		reg = <0x0 0xff130000 0x0 0x1000>;
+ 		#address-cells = <1>;
+ 		#size-cells = <0>;
+-- 
+2.11.0
+

buildroot-external/board/tinker/patches/linux/2008-Added-support-for-Tinkerboard-s-SPI-interface.patch

@@ -0,0 +1,27 @@
+From af8d73ec0df1dde1e2fe1674c5708d4c30385ba9 Mon Sep 17 00:00:00 2001
+From: Myy <myy@miouyouyou.fr>
+Date: Mon, 5 Jun 2017 12:37:17 +0000
+Subject: [PATCH 11/28] Added support for Tinkerboard's SPI interface
+
+Imported from ARMbian
+
+Signed-off-by: Myy <myy@miouyouyou.fr>
+---
+ drivers/spi/spidev.c | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/drivers/spi/spidev.c b/drivers/spi/spidev.c
+index cda10719..a6287475 100644
+--- a/drivers/spi/spidev.c
++++ b/drivers/spi/spidev.c
+@@ -669,6 +669,7 @@ static const struct of_device_id spidev_dt_ids[] = {
+ 	{ .compatible = "lineartechnology,ltc2488" },
+ 	{ .compatible = "ge,achc" },
+ 	{ .compatible = "semtech,sx1301" },
++	{ .compatible = "rockchip,spi_tinker" },
+ 	{},
+ };
+ MODULE_DEVICE_TABLE(of, spidev_dt_ids);
+-- 
+2.11.0
+

buildroot-external/board/tinker/patches/linux/2010-ARM-DTSI-rk3288-Adding-cells-addresses-and-size.patch

@@ -0,0 +1,56 @@
+From 7af8d2bf732cb3baab7d926ed8a7e061e7a09ad9 Mon Sep 17 00:00:00 2001
+From: Myy Miouyouyou <myy@miouyouyou.fr>
+Date: Thu, 19 Oct 2017 21:39:00 +0200
+Subject: [PATCH 13/28] ARM: DTSI: rk3288.dtsi: Adding cells addresses and
+ sizes of MMC nodes
+
+Imported from the Rockchip 4.4 patches.
+
+Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
+---
+ arch/arm/boot/dts/rk3288.dtsi | 8 ++++++++
+ 1 file changed, 8 insertions(+)
+
+diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
+index be985f02..14ef8202 100644
+--- a/arch/arm/boot/dts/rk3288.dtsi
++++ b/arch/arm/boot/dts/rk3288.dtsi
+@@ -236,6 +236,8 @@
+ 		clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
+ 		fifo-depth = <0x100>;
+ 		interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
++		#address-cells = <1>;
++		#size-cells = <0>;
+ 		reg = <0x0 0xff0c0000 0x0 0x4000>;
+ 		resets = <&cru SRST_MMC0>;
+ 		reset-names = "reset";
+@@ -250,6 +252,8 @@
+ 		clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
+ 		fifo-depth = <0x100>;
+ 		interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
++		#address-cells = <1>;
++		#size-cells = <0>;
+ 		reg = <0x0 0xff0d0000 0x0 0x4000>;
+ 		resets = <&cru SRST_SDIO0>;
+ 		reset-names = "reset";
+@@ -264,6 +268,8 @@
+ 		clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
+ 		fifo-depth = <0x100>;
+ 		interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
++		#address-cells = <1>;
++		#size-cells = <0>;
+ 		reg = <0x0 0xff0e0000 0x0 0x4000>;
+ 		resets = <&cru SRST_SDIO1>;
+ 		reset-names = "reset";
+@@ -278,6 +284,8 @@
+ 		clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
+ 		fifo-depth = <0x100>;
+ 		interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
++		#address-cells = <1>;
++		#size-cells = <0>;
+ 		reg = <0x0 0xff0f0000 0x0 0x4000>;
+ 		resets = <&cru SRST_EMMC>;
+ 		reset-names = "reset";
+-- 
+2.11.0
+

buildroot-external/board/tinker/patches/linux/2011-ARM-DTSI-rk3288-Adding-missing-EDP-power-domain.patch

@@ -0,0 +1,27 @@
+From ac220d592aa38b9b717d36f7bb93f7be5a08f6b3 Mon Sep 17 00:00:00 2001
+From: Myy Miouyouyou <myy@miouyouyou.fr>
+Date: Thu, 19 Oct 2017 21:43:51 +0200
+Subject: [PATCH 14/28] ARM: DTSI: rk3288.dtsi: Adding missing EDP power domain
+
+Imported from Rockchip 4.4 kernel patches.
+
+Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
+---
+ arch/arm/boot/dts/rk3288.dtsi | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
+index 14ef8202..10ecebb4 100644
+--- a/arch/arm/boot/dts/rk3288.dtsi
++++ b/arch/arm/boot/dts/rk3288.dtsi
+@@ -1105,6 +1105,7 @@
+ 		interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
+ 		clocks = <&cru SCLK_EDP>, <&cru PCLK_EDP_CTRL>;
+ 		clock-names = "dp", "pclk";
++		power-domains = <&power RK3288_PD_VIO>;
+ 		phys = <&edp_phy>;
+ 		phy-names = "dp";
+ 		resets = <&cru SRST_EDP>;
+-- 
+2.11.0
+

buildroot-external/board/tinker/patches/linux/2012-ARM-DTSI-rk3288-Add-the-RGA-node.patch

@@ -0,0 +1,40 @@
+From 3fe37d29b53e3d06c8f4314cfc113bfa679f67eb Mon Sep 17 00:00:00 2001
+From: Myy Miouyouyou <myy@miouyouyou.fr>
+Date: Thu, 19 Oct 2017 21:48:05 +0200
+Subject: [PATCH 15/28] ARM: DTSI: rk3288.dtsi: Add the RGA node
+
+Imported from @wzyy2 patches.
+
+Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
+---
+ arch/arm/boot/dts/rk3288.dtsi | 14 ++++++++++++++
+ 1 file changed, 14 insertions(+)
+
+diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
+index 10ecebb4..455446f6 100644
+--- a/arch/arm/boot/dts/rk3288.dtsi
++++ b/arch/arm/boot/dts/rk3288.dtsi
+@@ -1159,6 +1159,20 @@
+ 		};
+ 	};
+ 
++	rga: rga@ff920000 {
++		compatible = "rockchip,rk3288-rga";
++		reg = <0x0 0xff920000 0x0 0x180>;
++		interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
++		interrupt-names = "rga";
++		clocks = <&cru ACLK_RGA>, <&cru HCLK_RGA>, <&cru SCLK_RGA>;
++		clock-names = "aclk", "hclk", "sclk";
++		power-domains = <&power RK3288_PD_VIO>;
++		resets = <&cru SRST_RGA_CORE>, <&cru SRST_RGA_AXI>, <&cru SRST_RGA_AHB>;
++
++		reset-names = "core", "axi", "ahb";
++		status = "disabled";
++	};
++
+ 	vpu_mmu: iommu@ff9a0800 {
+ 		compatible = "rockchip,iommu";
+ 		reg = <0x0 0xff9a0800 0x0 0x100>;
+-- 
+2.11.0
+

buildroot-external/board/tinker/patches/linux/2013-ARM-DTSI-rk3288-Adding-missing-VOPB-registers.patch

@@ -0,0 +1,28 @@
+From c5af6798c9a411b3f550f463182a4b4904a21ec2 Mon Sep 17 00:00:00 2001
+From: Myy Miouyouyou <myy@miouyouyou.fr>
+Date: Thu, 19 Oct 2017 21:51:14 +0200
+Subject: [PATCH 16/28] ARM: DTSI: rk3288.dtsi: Adding missing VOPB registers
+
+Imported from @wzyy2 patches... I think...
+
+Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
+---
+ arch/arm/boot/dts/rk3288.dtsi | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
+index 455446f6..125f8835 100644
+--- a/arch/arm/boot/dts/rk3288.dtsi
++++ b/arch/arm/boot/dts/rk3288.dtsi
+@@ -987,7 +987,7 @@
+ 
+ 	vopb: vop@ff930000 {
+ 		compatible = "rockchip,rk3288-vop";
+-		reg = <0x0 0xff930000 0x0 0x19c>;
++		reg = <0x0 0xff930000 0x0 0x19c>, <0x0 0xff931000 0x0 0x1000>;
+ 		interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
+ 		clocks = <&cru ACLK_VOP0>, <&cru DCLK_VOP0>, <&cru HCLK_VOP0>;
+ 		clock-names = "aclk_vop", "dclk_vop", "hclk_vop";
+-- 
+2.11.0
+

buildroot-external/board/tinker/patches/linux/2014-ARM-DTSI-rk3288-Fixed-the-SPDIF-node-address.patch

@@ -0,0 +1,31 @@
+From a0602b2724893de7ac9b4190a7a6bb66458da2d5 Mon Sep 17 00:00:00 2001
+From: Myy Miouyouyou <myy@miouyouyou.fr>
+Date: Thu, 19 Oct 2017 21:54:37 +0200
+Subject: [PATCH 17/28] ARM: DTSI: rk3288.dtsi: Fixed the SPDIF node address
+
+Now, the typo is only in the name of the node itself, not in the
+actual registers addresses definition.
+
+Still, this ought to be fixed one day !
+
+Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
+---
+ arch/arm/boot/dts/rk3288.dtsi | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
+index 125f8835..e5d3d3c9 100644
+--- a/arch/arm/boot/dts/rk3288.dtsi
++++ b/arch/arm/boot/dts/rk3288.dtsi
+@@ -922,7 +922,7 @@
+ 		status = "disabled";
+ 	};
+ 
+-	spdif: sound@ff88b0000 {
++	spdif: sound@ff8b0000 {
+ 		compatible = "rockchip,rk3288-spdif", "rockchip,rk3066-spdif";
+ 		reg = <0x0 0xff8b0000 0x0 0x10000>;
+ 		#sound-dai-cells = <0>;
+-- 
+2.11.0
+

buildroot-external/board/tinker/patches/linux/2015-ARM-DTS-rk3288-tinker-Enabling-SDIO-Wireless-and.patch

@@ -0,0 +1,165 @@
+From 2715f4a9ab5c169c546029a61eebb0bde6619b0e Mon Sep 17 00:00:00 2001
+From: Myy Miouyouyou <myy@miouyouyou.fr>
+Date: Thu, 19 Oct 2017 22:12:48 +0200
+Subject: [PATCH 18/28] ARM: DTS: rk3288-tinker.dts: Enabling SDIO, Wireless
+ and Bluetooth
+
+Adding the appropriate nodes in order to exploit the WiFi capabilities
+of the board.
+Since these capabilities are provided through SDIO, and the SDIO
+nodes were not defined, these were added too.
+
+These seems to depend on each other so they are added in one big
+patch.
+
+Split if necessary.
+
+Bluetooth and uart0 (AKA Bluetooth UART) definitions were also added
+in order to deal with all the wireless techs in one patch.
+
+Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
+---
+ arch/arm/boot/dts/rk3288-tinker.dts | 82 ++++++++++++++++++++++++++++++++++++-
+ 1 file changed, 81 insertions(+), 1 deletion(-)
+
+diff --git a/arch/arm/boot/dts/rk3288-tinker.dts b/arch/arm/boot/dts/rk3288-tinker.dts
+index 346b0d8b..c552fd95 100644
+--- a/arch/arm/boot/dts/rk3288-tinker.dts
++++ b/arch/arm/boot/dts/rk3288-tinker.dts
+@@ -44,6 +44,7 @@
+ 
+ #include "rk3288.dtsi"
+ #include <dt-bindings/input/input.h>
++#include <dt-bindings/clock/rockchip,rk808.h>
+ 
+ / {
+ 	model = "Rockchip RK3288 Tinker Board";
+@@ -114,6 +115,24 @@
+ 		};
+ 	};
+ 
++	/* This is essential to get SDIO devices working.
++	   The Wifi depends on SDIO ! */
++	sdio_pwrseq: sdio-pwrseq {
++		compatible = "mmc-pwrseq-simple";
++		clocks = <&rk808 RK808_CLKOUT1>;
++		clock-names = "ext_clock";
++		pinctrl-names = "default";
++		pinctrl-0 = <&chip_enable_h>, <&wifi_enable_h>;
++
++		/*
++		 * On the module itself this is one of these (depending
++		 * on the actual card populated):
++		 * - SDIO_RESET_L_WL_REG_ON
++		 * - PDN (power down when low)
++		 */
++		reset-gpios = <&gpio4 RK_PD4 GPIO_ACTIVE_LOW>, <&gpio4 RK_PD3 GPIO_ACTIVE_LOW>;
++	};
++
+ 	vcc_sys: vsys-regulator {
+ 		compatible = "regulator-fixed";
+ 		regulator-name = "vcc_sys";
+@@ -134,6 +153,28 @@
+ 		startup-delay-us = <100000>;
+ 		vin-supply = <&vcc_io>;
+ 	};
++
++	wireless-wlan {
++		compatible = "wlan-platdata";
++		rockchip,grf = <&grf>;
++		wifi_chip_type = "8723bs";
++		sdio_vref = <1800>;
++		WIFI,host_wake_irq = <&gpio4 30 GPIO_ACTIVE_HIGH>;
++		status = "okay";
++	};
++
++	wireless-bluetooth {
++		compatible = "bluetooth-platdata";
++		uart_rts_gpios = <&gpio4 19 GPIO_ACTIVE_LOW>;
++		pinctrl-names = "default","rts_gpio";
++		pinctrl-0 = <&uart0_rts>;
++		pinctrl-1 = <&uart0_gpios>;
++		BT,reset_gpio    = <&gpio4 29 GPIO_ACTIVE_HIGH>;
++		BT,wake_gpio     = <&gpio4 26 GPIO_ACTIVE_HIGH>;
++		BT,wake_host_irq = <&gpio4 31 GPIO_ACTIVE_HIGH>;
++		status = "okay";
++	};
++
+ };
+ 
+ &cpu0 {
+@@ -373,10 +414,30 @@
+ 
+ &io_domains {
+ 	status = "okay";
+-
++	rockchip,grf = <&grf>;
++	wifi-supply = <&vcc_18>;
+ 	sdcard-supply = <&vccio_sd>;
+ };
+ 
++&sdio0 {
++	status = "okay";
++	clock-frequency = <50000000>;
++	clock-freq-min-max = <200000 50000000>;
++	bus-width = <4>;
++	cap-sd-highspeed;
++	cap-sdio-irq;
++	disable-wp;
++	keep-power-in-suspend;
++	mmc-pwrseq = <&sdio_pwrseq>;
++	non-removable;
++	num-slots = <1>;
++	pinctrl-names = "default";
++	pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
++	sd-uhs-sdr104;
++	supports-sdio;
++
++};
++
+ &pinctrl {
+ 	pcfg_pull_none_drv_8ma: pcfg-pull-none-drv-8ma {
+ 		drive-strength = <8>;
+@@ -422,6 +483,16 @@
+ 		};
+ 	};
+ 
++	sdio-pwrseq {
++		wifi_enable_h: wifienable-h {
++			rockchip,pins = <4 28 RK_FUNC_GPIO &pcfg_pull_none>;
++		};
++
++		chip_enable_h: chip-enable-h {
++			rockchip,pins = <4 27 RK_FUNC_GPIO &pcfg_pull_none>;
++		};
++	};
++
+ 	sdmmc {
+ 		sdmmc_bus4: sdmmc-bus4 {
+ 			rockchip,pins = <6 16 RK_FUNC_1 &pcfg_pull_up_drv_8ma>,
+@@ -453,6 +524,13 @@
+ 			rockchip,pins = <7 8 RK_FUNC_GPIO &pcfg_pull_none>;
+ 		};
+ 	};
++
++	wireless-bluetooth {
++		uart0_gpios: uart0-gpios {
++			rockchip,pins = <4 19 RK_FUNC_GPIO &pcfg_pull_none>;
++		};
++	};
++
+ };
+ 
+ &pwm0 {
+@@ -485,6 +563,8 @@
+ 
+ &uart0 {
+ 	status = "okay";
++	pinctrl-names = "default";
++	pinctrl-0 = <&uart0_xfer>, <&uart0_cts>;
+ };
+ 
+ &uart1 {
+-- 
+2.11.0
+

buildroot-external/board/tinker/patches/linux/2017-ARM-DTS-rk3288-tinker-Setting-up-the-SD-regulato.patch

@@ -0,0 +1,40 @@
+From 39e50ab508d8104a733771a8681908a66a300edd Mon Sep 17 00:00:00 2001
+From: Myy Miouyouyou <myy@miouyouyou.fr>
+Date: Thu, 19 Oct 2017 22:25:03 +0200
+Subject: [PATCH 20/28] ARM: DTS: rk3288-tinker.dts: Setting up the SD
+ regulators
+
+Some are needed and some are not. Playing with these parameters is
+required to get reboot working on these boards.
+
+I still can't believe that these boards can't soft reset correctly.
+
+Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
+---
+ arch/arm/boot/dts/rk3288-tinker.dts | 3 ++-
+ 1 file changed, 2 insertions(+), 1 deletion(-)
+
+diff --git a/arch/arm/boot/dts/rk3288-tinker.dts b/arch/arm/boot/dts/rk3288-tinker.dts
+index 4ce94698..90c1a251 100644
+--- a/arch/arm/boot/dts/rk3288-tinker.dts
++++ b/arch/arm/boot/dts/rk3288-tinker.dts
+@@ -333,6 +333,8 @@
+ 			};
+ 
+ 			vccio_sd: LDO_REG5 {
++				regulator-always-on;
++				regulator-boot-on;
+ 				regulator-min-microvolt = <1800000>;
+ 				regulator-max-microvolt = <3300000>;
+ 				regulator-name = "vccio_sd";
+@@ -379,7 +381,6 @@
+ 			};
+ 
+ 			vcc33_sd: SWITCH_REG1 {
+-				regulator-always-on;
+ 				regulator-boot-on;
+ 				regulator-name = "vcc33_sd";
+ 				regulator-state-mem {
+-- 
+2.11.0
+

buildroot-external/board/tinker/patches/linux/2018-ARM-DTS-rk3288-tinker-Defined-the-I2C-interfaces.patch

@@ -0,0 +1,53 @@
+From b0a552add28bf4590b979abb3530b14b6811eec1 Mon Sep 17 00:00:00 2001
+From: Myy Miouyouyou <myy@miouyouyou.fr>
+Date: Thu, 19 Oct 2017 22:33:39 +0200
+Subject: [PATCH 21/28] ARM: DTS: rk3288-tinker.dts: Defined the I2C interfaces
+
+And all the hardware behind.
+
+Taken from, and tested by @TonyMac32 .
+
+Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
+---
+ arch/arm/boot/dts/rk3288-tinker.dts | 23 +++++++++++++++++++++++
+ 1 file changed, 23 insertions(+)
+
+diff --git a/arch/arm/boot/dts/rk3288-tinker.dts b/arch/arm/boot/dts/rk3288-tinker.dts
+index 90c1a251..67a3ce6f 100644
+--- a/arch/arm/boot/dts/rk3288-tinker.dts
++++ b/arch/arm/boot/dts/rk3288-tinker.dts
+@@ -400,8 +400,31 @@
+ 	};
+ };
+ 
++&i2c1 {
++	status = "okay";
++};
++
+ &i2c2 {
+ 	status = "okay";
++
++	afc0:af-controller@0 {
++		status = "okay";
++		compatible = "silicon touch,vm149C-v4l2-i2c-subdev";
++		reg = <0x0 0x0c>;
++	};
++
++	eeprom:m24c08@50 {
++		compatible = "at,24c08";
++		reg = <0x0 0x50>;
++	};
++};
++
++&i2c3 {
++	status = "okay";
++};
++
++&i2c4 {
++	status = "okay";
+ };
+ 
+ &i2c5 {
+-- 
+2.11.0
+

buildroot-external/board/tinker/patches/linux/2019-ARM-DTS-rk3288-tinker-Add-the-MIPI-DSI-node.patch

@@ -0,0 +1,35 @@
+From 8ca607f3fe77c80a3367d8363703d5dc1d6781d4 Mon Sep 17 00:00:00 2001
+From: Myy Miouyouyou <myy@miouyouyou.fr>
+Date: Thu, 19 Oct 2017 22:36:02 +0200
+Subject: [PATCH 22/28] ARM: DTS: rk3288-tinker.dts: Add the MIPI DSI node
+
+Taken from, and tested by @TonyMac32 .
+
+Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
+---
+ arch/arm/boot/dts/rk3288-tinker.dts | 9 +++++++++
+ 1 file changed, 9 insertions(+)
+
+diff --git a/arch/arm/boot/dts/rk3288-tinker.dts b/arch/arm/boot/dts/rk3288-tinker.dts
+index 67a3ce6f..6f4c0843 100644
+--- a/arch/arm/boot/dts/rk3288-tinker.dts
++++ b/arch/arm/boot/dts/rk3288-tinker.dts
+@@ -443,6 +443,15 @@
+ 	sdcard-supply = <&vccio_sd>;
+ };
+ 
++&mipi_dsi {
++	status = "okay";
++	mipi_panel: mipi-panel {
++		compatible ="asus,tc358762";
++		reg = <0x0 0>;
++		status = "okay";
++	};
++};
++
+ &sdio0 {
+ 	status = "okay";
+ 	clock-frequency = <50000000>;
+-- 
+2.11.0
+

buildroot-external/board/tinker/patches/linux/2020-ARM-DTS-rk3288-tinker-Defining-the-SPI-interface.patch

@@ -0,0 +1,49 @@
+From 14f951ca2d354ad8fd068d0f3d8648d5c0d1e60e Mon Sep 17 00:00:00 2001
+From: Myy Miouyouyou <myy@miouyouyou.fr>
+Date: Thu, 19 Oct 2017 22:40:26 +0200
+Subject: [PATCH 23/28] ARM: DTS: rk3288-tinker.dts: Defining the SPI interface
+
+Taken from, and tested by @TonyMac32 .
+
+Well, the original one was tested by him but I had to adapt the
+registers definitions to the new 64-bits LPAE-compliant syntax.
+
+Therefore that *might* break, along with a few other patches.
+
+Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
+---
+ arch/arm/boot/dts/rk3288-tinker.dts | 18 ++++++++++++++++++
+ 1 file changed, 18 insertions(+)
+
+diff --git a/arch/arm/boot/dts/rk3288-tinker.dts b/arch/arm/boot/dts/rk3288-tinker.dts
+index 6f4c0843..f4b4525c 100644
+--- a/arch/arm/boot/dts/rk3288-tinker.dts
++++ b/arch/arm/boot/dts/rk3288-tinker.dts
+@@ -471,6 +471,24 @@
+ 
+ };
+ 
++&spi2 {
++	status = "okay";
++	max-freq = <50000000>;
++	spidev@0 {
++		compatible = "rockchip,spi_tinker";
++		reg = <0x0 0>;
++		spi-max-frequency = <50000000>;
++		spi-cpha = <1>;
++	};
++	spidev@1 {
++		compatible = "rockchip,spi_tinker";
++		reg = <0x0 1>;
++		spi-max-frequency = <50000000>;
++		spi-cpha = <1>;
++	};
++};
++
++
+ &pinctrl {
+ 	pcfg_pull_none_drv_8ma: pcfg-pull-none-drv-8ma {
+ 		drive-strength = <8>;
+-- 
+2.11.0
+

buildroot-external/board/tinker/patches/linux/2021-ARM-DTS-rk3288-tinker-Defining-SDMMC-properties.patch

@@ -0,0 +1,33 @@
+From 58d72a1cc693c4c08391487476d0cd6d167a57cf Mon Sep 17 00:00:00 2001
+From: Myy Miouyouyou <myy@miouyouyou.fr>
+Date: Thu, 19 Oct 2017 22:48:36 +0200
+Subject: [PATCH 24/28] ARM: DTS: rk3288-tinker.dts: Defining SDMMC properties
+
+I never knew if these properties were required to fix the dreaded
+reboot issue...
+
+Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
+---
+ arch/arm/boot/dts/rk3288-tinker.dts | 5 +++++
+ 1 file changed, 5 insertions(+)
+
+diff --git a/arch/arm/boot/dts/rk3288-tinker.dts b/arch/arm/boot/dts/rk3288-tinker.dts
+index f4b4525c..a0663425 100644
+--- a/arch/arm/boot/dts/rk3288-tinker.dts
++++ b/arch/arm/boot/dts/rk3288-tinker.dts
+@@ -601,7 +601,12 @@
+ 	disable-wp;			/* wp not hooked up */
+ 	pinctrl-names = "default";
+ 	pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
++	sd-uhs-sdr12;
++	sd-uhs-sdr25;
++	sd-uhs-sdr50;
++	sd-uhs-sdr104;
+ 	status = "okay";
++	supports-sd;
+ 	vmmc-supply = <&vcc33_sd>;
+ 	vqmmc-supply = <&vccio_sd>;
+ };
+-- 
+2.11.0
+

buildroot-external/board/tinker/patches/linux/2022-ARM-DTSI-rk3288-Define-the-VPU-services.patch

@@ -0,0 +1,107 @@
+From f4480cb8198085607c15e523b49aa21bc38cf62c Mon Sep 17 00:00:00 2001
+From: Myy Miouyouyou <myy@miouyouyou.fr>
+Date: Tue, 21 Nov 2017 21:47:33 +0100
+Subject: [PATCH 1/5] ARM: DTSI: rk3288.dtsi: Define the VPU services
+
+Still, you will need appropriate drivers to use them.
+
+Contrary to the previous versions of this patch, these services are :
+* NOT enabled by default;
+* MUST be activated in each individual DTS;
+
+I currently do not own enough RK3288 boards to ensure that the
+VPU and HEVC MMU + services can be activated without issues.
+
+Still this patch does not generate issues like the previous one AND
+still enable these services on boot, when activated properly in
+individual DTS files.
+
+Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
+---
+ arch/arm/boot/dts/rk3288.dtsi | 63 +++++++++++++++++++++++++++++++++++++++++++
+ 1 file changed, 63 insertions(+)
+
+diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
+index 30b04257..bc3601ac 100644
+--- a/arch/arm/boot/dts/rk3288.dtsi
++++ b/arch/arm/boot/dts/rk3288.dtsi
+@@ -1182,6 +1182,27 @@
+ 		status = "disabled";
+ 	};
+ 
++	vpu_service: vpu-service@ff9a0000 {
++		compatible = "rockchip,vpu_service";
++		reg = <0x0 0xff9a0000 0x0 0x800>;
++		interrupts = 
++			<GIC_SPI  9 IRQ_TYPE_LEVEL_HIGH>,
++			<GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
++		interrupt-names = "irq_enc", "irq_dec";
++		clocks = <&cru ACLK_VCODEC>, <&cru HCLK_VCODEC>;
++		clock-names = "aclk_vcodec", "hclk_vcodec";
++		power-domains = <&power RK3288_PD_VIDEO>;
++		rockchip,grf = <&grf>;
++		resets = <&cru SRST_VCODEC_AXI>, <&cru SRST_VCODEC_AHB>;
++		reset-names = "video_a", "video_h";
++		iommus = <&vpu_mmu>;
++		iommu_enabled = <1>;
++		dev_mode = <0>;
++		status = "disabled";
++		/* 0 means ion, 1 means drm */
++		allocator = <1>;
++	};
++
+ 	hevc_mmu: iommu@ff9c0440 {
+ 		compatible = "rockchip,iommu";
+ 		reg = <0x0 0xff9c0440 0x0 0x40>, <0x0 0xff9c0480 0x0 0x40>;
+@@ -1191,6 +1212,48 @@
+ 		status = "disabled";
+ 	};
+ 
++	hevc_service: hevc-service@ff9c0000 {
++		compatible = "rockchip,hevc_service";
++		reg = <0x0 0xff9c0000 0x0 0x400>;
++		interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
++		interrupt-names = "irq_dec";
++		clocks =
++			<&cru ACLK_HEVC>,
++			<&cru HCLK_HEVC>,
++			<&cru SCLK_HEVC_CORE>,
++			<&cru SCLK_HEVC_CABAC>;
++		clock-names =
++			"aclk_vcodec",
++			"hclk_vcodec",
++			"clk_core",
++			"clk_cabac";
++		/*
++		* The 4K hevc would also work well with 500/125/300/300,
++		* no more err irq and reset request.
++		*/
++		assigned-clocks = 
++			<&cru ACLK_HEVC>,
++			<&cru HCLK_HEVC>,
++			<&cru SCLK_HEVC_CORE>,
++			<&cru SCLK_HEVC_CABAC>;
++		assigned-clock-rates =
++			<400000000>,
++			<100000000>,
++			<300000000>,
++			<300000000>;
++
++		resets = <&cru SRST_HEVC>;
++		reset-names = "video";
++		power-domains = <&power RK3288_PD_HEVC>;
++		rockchip,grf = <&grf>;
++		dev_mode = <1>;
++		iommus = <&hevc_mmu>;
++		iommu_enabled = <1>;
++		status = "disabled";
++		/* 0 means ion, 1 means drm */
++		allocator = <1>;
++	};
++
+ 	gpu: gpu@ffa30000 {
+ 		compatible = "rockchip,rk3288-mali", "arm,mali-t760";
+ 		reg = <0x0 0xffa30000 0x0 0x10000>;
+-- 
+2.14.1
+

buildroot-external/board/tinker/patches/linux/2023-ARM-DTS-rk3288-miqi-Enable-the-Video-encoding-MM.patch

@@ -0,0 +1,57 @@
+From 647d6012849191e9909a8acb0fc9ae5df1afc747 Mon Sep 17 00:00:00 2001
+From: Myy Miouyouyou <myy@miouyouyou.fr>
+Date: Tue, 21 Nov 2017 21:51:31 +0100
+Subject: [PATCH 2/5] ARM: DTS: rk3288-miqi.dts: Enable the Video encoding MMU
+ and services
+
+Enable the :
+* VPU MMU;
+* VPU service;
+* HEVC MMU;
+* HEVC service;
+on MiQi devices.
+
+Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
+---
+ arch/arm/boot/dts/rk3288-miqi.dts | 18 +++++++++++++++++-
+ 1 file changed, 17 insertions(+), 1 deletion(-)
+
+diff --git a/arch/arm/boot/dts/rk3288-miqi.dts b/arch/arm/boot/dts/rk3288-miqi.dts
+index d7fde483..dd785c70 100644
+--- a/arch/arm/boot/dts/rk3288-miqi.dts
++++ b/arch/arm/boot/dts/rk3288-miqi.dts
+@@ -124,7 +124,7 @@
+ 	};
+ 
+ 
+-	cpu0_opp_table: opp_table0 {
++	cpu0_opp_table: opp_table {
+ 		compatible = "operating-points-v2";
+ 		opp-shared;
+ 
+@@ -575,6 +575,22 @@
+ 	status = "okay";
+ };
+ 
++&vpu_mmu {
++	status = "okay";
++};
++
++&vpu_service {
++	status = "okay";
++};
++
++&hevc_mmu {
++	status = "okay";
++};
++
++&hevc_service {
++	status = "okay";
++};
++
+ &wdt {
+ 	status = "okay";
+ };
+-- 
+2.14.1
+

buildroot-external/board/tinker/patches/linux/2024-ARM-DTS-rk3288-tinker-Enable-the-Video-encoding-MMU-.patch

@@ -0,0 +1,48 @@
+From 092c26ead2eb4035a57217f8705c9deed3bfb927 Mon Sep 17 00:00:00 2001
+From: Myy Miouyouyou <myy@miouyouyou.fr>
+Date: Tue, 21 Nov 2017 21:54:22 +0100
+Subject: [PATCH 3/5] ARM: DTS: rk3288-tinker: Enable the Video encoding MMU
+ and services
+
+Enable the :
+* VPU MMU;
+* VPU Service;
+* HEVC MMU;
+* HEVC Service;
+for ASUS Tinkerboard devices.
+
+Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
+---
+ arch/arm/boot/dts/rk3288-tinker.dts | 16 ++++++++++++++++
+ 1 file changed, 16 insertions(+)
+
+diff --git a/arch/arm/boot/dts/rk3288-tinker.dts b/arch/arm/boot/dts/rk3288-tinker.dts
+index a0663425..07b4af4f 100644
+--- a/arch/arm/boot/dts/rk3288-tinker.dts
++++ b/arch/arm/boot/dts/rk3288-tinker.dts
+@@ -671,6 +671,22 @@
+ 	status = "okay";
+ };
+ 
++&vpu_mmu {
++	status = "okay";
++};
++
++&vpu_service {
++	status = "okay";
++};
++
++&hevc_mmu {
++	status = "okay";
++};
++
++&hevc_service {
++	status = "okay";
++};
++
+ &wdt {
+ 	status = "okay";
+ };
+-- 
+2.14.1
+

buildroot-external/board/tinker/patches/linux/2025-ARM-DTSI-rk3288-firefly-Enable-the-Video-encoding-MM.patch

@@ -0,0 +1,49 @@
+From 2769b0e656d849c5d652c75db71ce0faff1c0551 Mon Sep 17 00:00:00 2001
+From: Myy Miouyouyou <myy@miouyouyou.fr>
+Date: Tue, 21 Nov 2017 21:56:45 +0100
+Subject: [PATCH 4/5] ARM: DTSI: rk3288-firefly: Enable the Video encoding MMU
+ and services
+
+Enable the :
+* VPU MMU;
+* VPU Service;
+* HEVC MMU;
+* HEVC Service;
+for RK3288 Firefly devices.
+
+Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
+---
+ arch/arm/boot/dts/rk3288-firefly.dtsi | 17 +++++++++++++++++
+ 1 file changed, 17 insertions(+)
+
+diff --git a/arch/arm/boot/dts/rk3288-firefly.dtsi b/arch/arm/boot/dts/rk3288-firefly.dtsi
+index b9e6f3a9..9961acce 100644
+--- a/arch/arm/boot/dts/rk3288-firefly.dtsi
++++ b/arch/arm/boot/dts/rk3288-firefly.dtsi
+@@ -606,6 +606,23 @@
+ 	status = "okay";
+ };
+ 
++&vpu_mmu {
++	status = "okay";
++};
++
++&vpu_service {
++	status = "okay";
++};
++
++&hevc_mmu {
++	status = "okay";
++};
++
++&hevc_service {
++	status = "okay";
++};
++
+ &wdt {
+ 	status = "okay";
+ };
++
+-- 
+2.14.1
+

buildroot-external/board/tinker/patches/linux/2026-ARM-DTSI-rk3288-veyron-Enable-the-Video-encoding-MMU.patch

@@ -0,0 +1,48 @@
+From 4766516bcbf023813ad883c2d61c422316770d12 Mon Sep 17 00:00:00 2001
+From: Myy Miouyouyou <myy@miouyouyou.fr>
+Date: Tue, 21 Nov 2017 21:58:22 +0100
+Subject: [PATCH 5/5] ARM: DTSI: rk3288-veyron: Enable the Video encoding MMU
+ and services
+
+Enable the :
+* VPU MMU;
+* VPU Service;
+* HEVC MMU;
+* HEVC Service;
+for RK3288 Chromebook laptops.
+
+Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
+---
+ arch/arm/boot/dts/rk3288-veyron.dtsi | 16 ++++++++++++++++
+ 1 file changed, 16 insertions(+)
+
+diff --git a/arch/arm/boot/dts/rk3288-veyron.dtsi b/arch/arm/boot/dts/rk3288-veyron.dtsi
+index 6e5bd897..517b9242 100644
+--- a/arch/arm/boot/dts/rk3288-veyron.dtsi
++++ b/arch/arm/boot/dts/rk3288-veyron.dtsi
+@@ -450,6 +450,22 @@
+ 	status = "okay";
+ };
+ 
++&vpu_mmu {
++	status = "okay";
++};
++
++&vpu_service {
++	status = "okay";
++};
++
++&hevc_mmu {
++	status = "okay";
++};
++
++&hevc_service {
++	status = "okay";
++};
++
+ &wdt {
+ 	status = "okay";
+ };
+-- 
+2.14.1
+

buildroot-external/board/tinker/patches/linux/2027_Tinkerboard-Next-audio.patch

@@ -0,0 +1,19 @@
+diff --git a/sound/usb/card.c b/sound/usb/card.c
+index 23d1d23..98610ae 100644
+--- a/sound/usb/card.c
++++ b/sound/usb/card.c
+@@ -434,6 +434,14 @@ static int snd_usb_audio_create(struct usb_interface *intf,
+ 	}
+ 	strim(card->shortname);
+ 
++	/* Tinker Board ALC4040 CODEC	*/
++
++	if(USB_ID_VENDOR(chip->usb_id) == 0x0bda &&
++		USB_ID_PRODUCT(chip->usb_id) == 0x481a) {
++			strlcat(card->shortname, " OnBoard", sizeof(card->shortname));
++	} 
++
++
+ 	/* retrieve the vendor and device strings as longname */
+ 	if (quirk && quirk->vendor_name && *quirk->vendor_name) {
+ 		len = strlcpy(card->longname, quirk->vendor_name, sizeof(card->longname));

buildroot-external/board/tinker/patches/linux/2028-Tinker-Bluetooth.patch

@@ -0,0 +1,30 @@
+diff --git a/arch/arm/boot/dts/rk3288-tinker.dts b/arch/arm/boot/dts/rk3288-tinker.dts
+index 07b4af4..7755426 100644
+--- a/arch/arm/boot/dts/rk3288-tinker.dts
++++ b/arch/arm/boot/dts/rk3288-tinker.dts
+@@ -162,7 +162,7 @@
+ 		WIFI,host_wake_irq = <&gpio4 30 GPIO_ACTIVE_HIGH>;
+ 		status = "okay";
+ 	};
+-
++/*
+ 	wireless-bluetooth {
+ 		compatible = "bluetooth-platdata";
+ 		uart_rts_gpios = <&gpio4 19 GPIO_ACTIVE_LOW>;
+@@ -174,6 +174,7 @@
+ 		BT,wake_host_irq = <&gpio4 31 GPIO_ACTIVE_HIGH>;
+ 		status = "okay";
+ 	};
++*/
+ 
+ };
+ 
+@@ -620,7 +621,7 @@
+ &uart0 {
+ 	status = "okay";
+ 	pinctrl-names = "default";
+-	pinctrl-0 = <&uart0_xfer>, <&uart0_cts>;
++	pinctrl-0 = <&uart0_xfer>, <&uart0_cts>,  <&uart0_rts>;
+ };
+ 
+ &uart1 {

buildroot-external/board/tinker/patches/linux/260_DTS_gpiomem_node.patch

@@ -0,0 +1,17 @@
+diff --git a/arch/arm/boot/dts/rk3288-tinker.dts b/arch/arm/boot/dts/rk3288-tinker.dts
+index 925b277..33b198e 100644
+--- a/arch/arm/boot/dts/rk3288-tinker.dts
++++ b/arch/arm/boot/dts/rk3288-tinker.dts
+@@ -100,6 +100,12 @@
+ 		};
+ 	};
+ 
++	rk3288-gpiomem {
++		compatible = "rockchip,rk3288-gpiomem";
++		reg = <0x0 0xff750000 0x0 0x1000>;
++		status = "okay";
++	};
++
+ 	sound {
+ 		compatible = "simple-audio-card";
+ 		simple-audio-card,format = "i2s";

buildroot-external/board/tinker/patches/linux/261_gpiomem_driver.patch

@@ -0,0 +1,364 @@
+diff --git a/drivers/char/Kconfig b/drivers/char/Kconfig
+index c28dca0..d9df49d 100644
+--- a/drivers/char/Kconfig
++++ b/drivers/char/Kconfig
+@@ -6,6 +6,7 @@
+ menu "Character devices"
+ 
+ source "drivers/tty/Kconfig"
++source "drivers/char/rockchip/Kconfig"
+ 
+ config DEVMEM
+ 	bool "/dev/mem virtual device support"
+diff --git a/drivers/char/Makefile b/drivers/char/Makefile
+index 7dc3abe..5d43b1d 100644
+--- a/drivers/char/Makefile
++++ b/drivers/char/Makefile
+@@ -60,3 +60,5 @@ js-rtc-y = rtc.o
+ obj-$(CONFIG_TILE_SROM)		+= tile-srom.o
+ obj-$(CONFIG_XILLYBUS)		+= xillybus/
+ obj-$(CONFIG_POWERNV_OP_PANEL)	+= powernv-op-panel.o
++
++obj-$(CONFIG_RK_CHAR_DRIVERS)	+= rockchip/
+diff --git a/drivers/char/rockchip/Kconfig b/drivers/char/rockchip/Kconfig
+new file mode 100644
+index 0000000..867d51e
+--- /dev/null
++++ b/drivers/char/rockchip/Kconfig
+@@ -0,0 +1,16 @@
++#
++# Broadcom char driver config
++#
++
++menuconfig RK_CHAR_DRIVERS
++	bool "Rockchip Char Drivers"
++	help
++	  Rockchip's char drivers
++
++config RK3288_DEVGPIOMEM
++	tristate "/dev/gpiomem rootless GPIO access via mmap() on the RK3288"
++	default y
++	help
++		Provides users with root-free access to the GPIO registers
++		on the 3288. Calling mmap(/dev/gpiomem) will map the GPIO
++		register page to the user's pointer.
+diff --git a/drivers/char/rockchip/Makefile b/drivers/char/rockchip/Makefile
+new file mode 100644
+index 0000000..e7df7f2
+--- /dev/null
++++ b/drivers/char/rockchip/Makefile
+@@ -0,0 +1 @@
++obj-$(CONFIG_RK3288_DEVGPIOMEM)+= rk3288-gpiomem.o
+diff --git a/drivers/char/rockchip/rk3288-gpiomem.c b/drivers/char/rockchip/rk3288-gpiomem.c
+new file mode 100644
+index 0000000..c289041
+--- /dev/null
++++ b/drivers/char/rockchip/rk3288-gpiomem.c
+@@ -0,0 +1,307 @@
++/**
++ * GPIO memory device driver
++ *
++ * Creates a chardev /dev/gpiomem which will provide user access to
++ * the rk3288's GPIO registers when it is mmap()'d.
++ * No longer need root for user GPIO access, but without relaxing permissions
++ * on /dev/mem.
++ *
++ * Written by Luke Wren <luke@raspberrypi.org>
++ * Copyright (c) 2015, Raspberry Pi (Trading) Ltd.
++ *
++ * Redistribution and use in source and binary forms, with or without
++ * modification, are permitted provided that the following conditions
++ * are met:
++ * 1. Redistributions of source code must retain the above copyright
++ *    notice, this list of conditions, and the following disclaimer,
++ *    without modification.
++ * 2. Redistributions in binary form must reproduce the above copyright
++ *    notice, this list of conditions and the following disclaimer in the
++ *    documentation and/or other materials provided with the distribution.
++ * 3. The names of the above-listed copyright holders may not be used
++ *    to endorse or promote products derived from this software without
++ *    specific prior written permission.
++ *
++ * ALTERNATIVELY, this software may be distributed under the terms of the
++ * GNU General Public License ("GPL") version 2, as published by the Free
++ * Software Foundation.
++ *
++ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
++ * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
++ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
++ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
++ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
++ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
++ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
++ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
++ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
++ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
++ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
++ */
++
++/*
++ * Ported to rk3288 from Jörg Wolff, 2017
++ */
++
++#include <linux/kernel.h>
++#include <linux/module.h>
++#include <linux/of.h>
++#include <linux/platform_device.h>
++#include <linux/mm.h>
++#include <linux/slab.h>
++#include <linux/cdev.h>
++#include <linux/pagemap.h>
++#include <linux/io.h>
++
++#define DEVICE_NAME "rk3288-gpiomem"
++#define DRIVER_NAME "gpiomem-rk3288"
++#define DEVICE_MINOR 0
++
++struct rk3288_gpiomem_instance {
++	unsigned long gpio_regs_phys;
++	struct device *dev;
++};
++
++static struct cdev rk3288_gpiomem_cdev;
++static dev_t rk3288_gpiomem_devid;
++static struct class *rk3288_gpiomem_class;
++static struct device *rk3288_gpiomem_dev;
++static struct rk3288_gpiomem_instance *inst;
++
++
++/****************************************************************************
++*
++*   GPIO mem chardev file ops
++*
++***************************************************************************/
++
++static int rk3288_gpiomem_open(struct inode *inode, struct file *file)
++{
++	int dev = iminor(inode);
++	int ret = 0;
++
++	if (dev != DEVICE_MINOR) {
++		dev_err(inst->dev, "Unknown minor device: %d", dev);
++		ret = -ENXIO;
++	}
++	return ret;
++}
++
++static int rk3288_gpiomem_release(struct inode *inode, struct file *file)
++{
++	int dev = iminor(inode);
++	int ret = 0;
++
++	if (dev != DEVICE_MINOR) {
++		dev_err(inst->dev, "Unknown minor device %d", dev);
++		ret = -ENXIO;
++	}
++	return ret;
++}
++
++static const struct vm_operations_struct rk3288_gpiomem_vm_ops = {
++#ifdef CONFIG_HAVE_IOREMAP_PROT
++	.access = generic_access_phys
++#endif
++};
++static int address_is_allowed(unsigned long pfn, unsigned long size)
++{
++    unsigned long address = pfn << PAGE_SHIFT;
++
++    dev_info(inst->dev, "address_is_allowed.pfn: 0x%08lx", address);
++
++    switch(address) {
++
++        case 0xff750000:
++        case 0xff760000:
++        case 0xff780000:
++        case 0xff790000:
++        case 0xff7a0000:
++        case 0xff7b0000:
++        case 0xff7c0000:
++        case 0xff7d0000:
++        case 0xff7e0000:
++        case 0xff7f0000:
++        case 0xff7f2000:
++        case 0xff770000:
++        case 0xff730000:
++        case 0xff680000:
++            dev_info(inst->dev, "address_is_allowed.return 1");
++            return 1;
++            break; 
++        default :
++            dev_info(inst->dev, "address_is_allowed.return 0");
++	        return 0;
++    }
++}
++
++static int rk3288_gpiomem_mmap(struct file *file, struct vm_area_struct *vma)
++{
++
++    size_t size;
++
++	size = vma->vm_end - vma->vm_start;
++
++
++	if (!address_is_allowed(vma->vm_pgoff, size))
++		return -EPERM;
++
++	vma->vm_page_prot = phys_mem_access_prot(file, vma->vm_pgoff,
++						 size,
++						 vma->vm_page_prot);
++
++	vma->vm_ops =  &rk3288_gpiomem_vm_ops;
++
++	/* Remap-pfn-range will mark the range VM_IO */
++	if (remap_pfn_range(vma,
++			    vma->vm_start,
++			    vma->vm_pgoff,
++			    size,
++			    vma->vm_page_prot)) {
++		return -EAGAIN;
++	}
++
++	return 0;
++}
++
++static const struct file_operations
++rk3288_gpiomem_fops = {
++	.owner = THIS_MODULE,
++	.open = rk3288_gpiomem_open,
++	.release = rk3288_gpiomem_release,
++	.mmap = rk3288_gpiomem_mmap,
++};
++
++static int rk3288_gpiomem_dev_uevent(struct device *dev, struct kobj_uevent_env *env)
++{
++    add_uevent_var(env, "DEVMODE=%#o", 0660);
++    return 0;
++}
++
++ /****************************************************************************
++*
++*   Probe and remove functions
++*
++***************************************************************************/
++
++
++static int rk3288_gpiomem_probe(struct platform_device *pdev)
++{
++	int err;
++	void *ptr_err;
++	struct device *dev = &pdev->dev;
++	struct resource *ioresource;
++
++	/* Allocate buffers and instance data */
++
++	inst = kzalloc(sizeof(struct rk3288_gpiomem_instance), GFP_KERNEL);
++
++	if (!inst) {
++		err = -ENOMEM;
++		goto failed_inst_alloc;
++	}
++
++	inst->dev = dev;
++
++	ioresource = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++	if (ioresource) {
++		inst->gpio_regs_phys = ioresource->start;
++	} else {
++		dev_err(inst->dev, "failed to get IO resource");
++		err = -ENOENT;
++		goto failed_get_resource;
++	}
++
++	/* Create character device entries */
++
++	err = alloc_chrdev_region(&rk3288_gpiomem_devid,
++				  DEVICE_MINOR, 1, DEVICE_NAME);
++	if (err != 0) {
++		dev_err(inst->dev, "unable to allocate device number");
++		goto failed_alloc_chrdev;
++	}
++	cdev_init(&rk3288_gpiomem_cdev, &rk3288_gpiomem_fops);
++	rk3288_gpiomem_cdev.owner = THIS_MODULE;
++	err = cdev_add(&rk3288_gpiomem_cdev, rk3288_gpiomem_devid, 1);
++	if (err != 0) {
++		dev_err(inst->dev, "unable to register device");
++		goto failed_cdev_add;
++	}
++
++	/* Create sysfs entries */
++
++	rk3288_gpiomem_class = class_create(THIS_MODULE, DEVICE_NAME);
++	ptr_err = rk3288_gpiomem_class;
++	if (IS_ERR(ptr_err))
++		goto failed_class_create;
++	rk3288_gpiomem_class->dev_uevent = rk3288_gpiomem_dev_uevent;
++	rk3288_gpiomem_dev = device_create(rk3288_gpiomem_class, NULL,
++					rk3288_gpiomem_devid, NULL,
++					"gpiomem");
++	ptr_err = rk3288_gpiomem_dev;
++	if (IS_ERR(ptr_err))
++		goto failed_device_create;
++
++	dev_info(inst->dev, "Initialised: Registers at 0x%08lx",
++		inst->gpio_regs_phys);
++
++	return 0;
++
++failed_device_create:
++	class_destroy(rk3288_gpiomem_class);
++failed_class_create:
++	cdev_del(&rk3288_gpiomem_cdev);
++	err = PTR_ERR(ptr_err);
++failed_cdev_add:
++	unregister_chrdev_region(rk3288_gpiomem_devid, 1);
++failed_alloc_chrdev:
++failed_get_resource:
++	kfree(inst);
++failed_inst_alloc:
++	dev_err(inst->dev, "could not load rk3288_gpiomem");
++	return err;
++}
++
++static int rk3288_gpiomem_remove(struct platform_device *pdev)
++{
++	struct device *dev = inst->dev;
++
++	kfree(inst);
++	device_destroy(rk3288_gpiomem_class, rk3288_gpiomem_devid);
++	class_destroy(rk3288_gpiomem_class);
++	cdev_del(&rk3288_gpiomem_cdev);
++	unregister_chrdev_region(rk3288_gpiomem_devid, 1);
++
++	dev_info(dev, "GPIO mem driver removed - OK");
++	return 0;
++}
++
++ /****************************************************************************
++*
++*   Register the driver with device tree
++*
++***************************************************************************/
++
++static const struct of_device_id rk3288_gpiomem_of_match[] = {
++	{.compatible = "rockchip,rk3288-gpiomem",},
++	{ /* sentinel */ },
++};
++
++MODULE_DEVICE_TABLE(of, rk3288_gpiomem_of_match);
++
++static struct platform_driver rk3288_gpiomem_driver = {
++	.probe = rk3288_gpiomem_probe,
++	.remove = rk3288_gpiomem_remove,
++	.driver = {
++		   .name = DRIVER_NAME,
++		   .owner = THIS_MODULE,
++		   .of_match_table = rk3288_gpiomem_of_match,
++		   },
++};
++
++module_platform_driver(rk3288_gpiomem_driver);
++
++MODULE_ALIAS("platform:gpiomem-rk3288");
++MODULE_LICENSE("GPL");
++MODULE_DESCRIPTION("gpiomem driver for accessing GPIO from userspace");
++MODULE_AUTHOR("Luke Wren <luke@raspberrypi.org>");