Fix ethernet PHY reset timing to make sure the link comes up when reconfiguring the link. Also drop 0006-clk-meson-g12a-mark-fclk_div2-as-critical.patch which has been applied in v5.9.2 stable release.
41 lines
2.0 KiB
Diff
41 lines
2.0 KiB
Diff
From 01467c329a3aa70f92ac3cc6d1ab25252889cc34 Mon Sep 17 00:00:00 2001
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Message-Id: <01467c329a3aa70f92ac3cc6d1ab25252889cc34.1606779815.git.stefan@agner.ch>
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In-Reply-To: <9d2a2b44e67b0ef49e534c097e8b5e3e1173b033.1606779815.git.stefan@agner.ch>
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References: <9d2a2b44e67b0ef49e534c097e8b5e3e1173b033.1606779815.git.stefan@agner.ch>
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From: Stefan Agner <stefan@agner.ch>
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Date: Tue, 1 Dec 2020 00:32:23 +0100
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Subject: [PATCH 6/6] arm64: dts: meson: fix PHY deassert timing requirements
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According to the datasheet (Rev. 1.4, page 30) the RTL8211F requires
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at least 50ms "for internal circuits settling time" before accessing
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the PHY registers. This fixes an issue where the Ethernet link doesn't
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come up when using ip link set down/up:
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[ 29.360965] meson8b-dwmac ff3f0000.ethernet eth0: Link is Down
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[ 34.569012] meson8b-dwmac ff3f0000.ethernet eth0: PHY [0.0:00] driver [RTL8211F Gigabit Ethernet] (irq=31)
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[ 34.676732] meson8b-dwmac ff3f0000.ethernet: Failed to reset the dma
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[ 34.678874] meson8b-dwmac ff3f0000.ethernet eth0: stmmac_hw_setup: DMA engine initialization failed
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[ 34.687850] meson8b-dwmac ff3f0000.ethernet eth0: stmmac_open: Hw setup failed
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Fixes: 658e4129bb81 ("arm64: dts: meson: g12b: odroid-n2: add the Ethernet PHY reset line")
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Signed-off-by: Stefan Agner <stefan@agner.ch>
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---
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arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi | 2 +-
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1 file changed, 1 insertion(+), 1 deletion(-)
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diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi
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index 40390feba053..08c44fb0ccd0 100644
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--- a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi
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+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi
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@@ -415,7 +415,7 @@ external_phy: ethernet-phy@0 {
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max-speed = <1000>;
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reset-assert-us = <10000>;
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- reset-deassert-us = <30000>;
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+ reset-deassert-us = <50000>;
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reset-gpios = <&gpio GPIOZ_15 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>;
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interrupt-parent = <&gpio_intc>;
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--
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2.29.2
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