45 lines
1.5 KiB
Diff
45 lines
1.5 KiB
Diff
From 0cecf963b9d815699fe50b7a7ee4a93ece3ed834 Mon Sep 17 00:00:00 2001
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From: Jerome Brunet <jbrunet@baylibre.com>
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Date: Tue, 19 Jun 2018 18:14:49 +0200
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Subject: [PATCH] clk: meson: switch gxbb cts-amclk div to the generic divider
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clk-audio-divider was a (poor) attempt to use CCF rate propagation
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while making sure the PLL rate would be high enough to work with
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audio use cases. The result is far from optimal. We can do better
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by carefully choosing the PLL rates for the audio use cases.
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Doing so, we don't need to use clk-audio-divider anymore. The
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generic will do
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Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
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---
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drivers/clk/meson/gxbb.c | 12 +++++-------
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1 file changed, 5 insertions(+), 7 deletions(-)
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diff --git a/drivers/clk/meson/gxbb.c b/drivers/clk/meson/gxbb.c
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index 177fffb..69a58cb 100644
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--- a/drivers/clk/meson/gxbb.c
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+++ b/drivers/clk/meson/gxbb.c
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@@ -982,17 +982,15 @@ static struct clk_regmap gxbb_cts_amclk_sel = {
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};
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static struct clk_regmap gxbb_cts_amclk_div = {
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- .data = &(struct meson_clk_audio_div_data){
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- .div = {
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- .reg_off = HHI_AUD_CLK_CNTL,
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- .shift = 0,
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- .width = 8,
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- },
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+ .data = &(struct clk_regmap_div_data) {
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+ .offset = HHI_AUD_CLK_CNTL,
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+ .shift = 0,
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+ .width = 8,
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.flags = CLK_DIVIDER_ROUND_CLOSEST,
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},
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.hw.init = &(struct clk_init_data){
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.name = "cts_amclk_div",
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- .ops = &meson_clk_audio_divider_ops,
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+ .ops = &clk_regmap_divider_ops,
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.parent_names = (const char *[]){ "cts_amclk_sel" },
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.num_parents = 1,
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.flags = CLK_SET_RATE_PARENT,
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