25c672a27f
* Linux: Update kernel 6.1.12 * Update generic_raw_uart to build with Linux 6.1 * Update Realtek rtl8821cu/rtl88x2bu to build with Linux 6.1 * Bump buildroot * buildroot 43f82f01b9...90aa1a6daa (1): > rtl8812au-aircrack-ng: bump to latest rev d98018 * Fix eq3_char_loop to build with Linux 6.1 * rtl8821cu: make sure -Werror is disabled for the kernel build * generic_raw_uart: make sure -Werror is disabled for the kernel build
56 lines
1.7 KiB
Diff
56 lines
1.7 KiB
Diff
From 695638c05c0bb6f7bcc65e172dd132b3aa280b47 Mon Sep 17 00:00:00 2001
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Message-Id: <695638c05c0bb6f7bcc65e172dd132b3aa280b47.1676488094.git.stefan@agner.ch>
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In-Reply-To: <3553f8a938dbb498aa1846a37ea343b7f53739da.1676488094.git.stefan@agner.ch>
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References: <3553f8a938dbb498aa1846a37ea343b7f53739da.1676488094.git.stefan@agner.ch>
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From: "Miouyouyou (Myy)" <myy@miouyouyou.fr>
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Date: Mon, 5 Nov 2018 22:15:14 +0100
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Subject: [PATCH] ARM: DTS: rk3288-tinker: Defining the SPI interface
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Taken from, and tested by @TonyMac32 .
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Well, the original one was tested by him but I had to adapt the
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registers definitions to the new 64-bits LPAE-compliant syntax.
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Therefore that *might* break, along with a few other patches.
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Signed-off-by: Miouyouyou (Myy) <myy@miouyouyou.fr>
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[move change to rk3288-tinker.dtsi]
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Signed-off-by: Stefan Agner <stefan@agner.ch>
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---
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arch/arm/boot/dts/rk3288-tinker.dtsi | 19 +++++++++++++++++++
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1 file changed, 19 insertions(+)
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diff --git a/arch/arm/boot/dts/rk3288-tinker.dtsi b/arch/arm/boot/dts/rk3288-tinker.dtsi
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index 09618bb7d872..30430d2e64b9 100644
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--- a/arch/arm/boot/dts/rk3288-tinker.dtsi
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+++ b/arch/arm/boot/dts/rk3288-tinker.dtsi
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@@ -483,6 +483,25 @@ &sdio0 {
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status = "okay";
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};
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+&spi2 {
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+ max-freq = <50000000>;
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+ status = "okay";
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+
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+ spidev@0 {
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+ compatible = "rockchip,spi_tinker";
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+ reg = <0x0 0>;
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+ spi-max-frequency = <50000000>;
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+ spi-cpha = <1>;
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+ };
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+
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+ spidev@1 {
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+ compatible = "rockchip,spi_tinker";
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+ reg = <0x1>;
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+ spi-max-frequency = <50000000>;
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+ spi-cpha = <1>;
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+ };
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+};
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+
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&tsadc {
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rockchip,hw-tshut-mode = <1>; /* tshut mode 0:CRU 1:GPIO */
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rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */
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--
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2.39.1
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