116 lines
3.4 KiB
Diff
116 lines
3.4 KiB
Diff
diff -u a/drivers/gpu/drm/meson/meson_vclk.c b/drivers/gpu/drm/meson/meson_vclk.c
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--- a/drivers/gpu/drm/meson/meson_vclk.c 2018-06-10 06:10:59.071504595 +0200
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+++ b/drivers/gpu/drm/meson/meson_vclk.c 2018-06-10 05:33:51.347202114 +0200
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@@ -842,7 +842,7 @@
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if (frac >= range)
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frac = range-1;
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- pr_info("%s: base=%d, m=0x%.2x, frac=0x%.3x", __func__, base, m, frac);
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+ dev_info(priv->dev, "%s: base=%d, m=0x%.2x, frac=0x%.3x\n", __func__, base, m, frac);
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switch (base) {
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case 2700000:
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@@ -1065,25 +1065,36 @@
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{
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unsigned int vclk_freq = freq;
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unsigned int base_freq, od1_od2, od3_vpll_vclk;
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- int p, jit;
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+ int od1, od2, od3, p, jit;
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bool found = false;
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- if ((vclk_freq < 13500) || (vclk_freq > 594000))
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+ if ((vclk_freq < 12000) || (vclk_freq > 594000))
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return false;
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if (vclk_freq % 25 > 12)
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vclk_freq += 25;
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vclk_freq -= vclk_freq % 25;
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- for (p = 1; p < sizeof(params) / sizeof(struct meson_vclk_params); p++) {
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- if (params[p].vid_pll_div != VID_PLL_DIV_5)
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+ for (p = 0; p < 6; p++) {
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+ od1 = (1 << p);
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+ od2 = 1;
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+ od3 = 1;
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+
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+ if ((vclk_freq > 18550) && (od1 > 16))
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continue;
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- od1_od2 = params[p].pll_od1 * params[p].pll_od2;
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- od3_vpll_vclk = params[p].pll_od3 * 5 * params[p].vclk_div;
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+ if (od1 > 16) {
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+ od3 = od1 / 16;
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+ od1 = 16;
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+ }
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- if ((od3_vpll_vclk != 10) && (vclk_freq > 54000 + 175))
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- continue;
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+ if (od1 > 4) {
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+ od2 = od1 / 4;
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+ od1 = 4;
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+ }
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+
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+ od1_od2 = od1 * od2;
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+ od3_vpll_vclk = od3 * 5 * 2;
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base_freq = vclk_freq * od1_od2 * od3_vpll_vclk;
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@@ -1091,21 +1102,32 @@
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continue;
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vclk_params->pll_base_freq = base_freq;
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- vclk_params->pll_od1 = params[p].pll_od1;
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- vclk_params->pll_od2 = params[p].pll_od2;
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- vclk_params->pll_od3 = params[p].pll_od3;
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- vclk_params->vid_pll_div = params[p].vid_pll_div;
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- vclk_params->vclk_div = params[p].vclk_div;
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+ vclk_params->pll_od1 = od1;
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+ vclk_params->pll_od2 = od2;
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+ vclk_params->pll_od3 = od3;
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+ vclk_params->vid_pll_div = VID_PLL_DIV_5;
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+ vclk_params->vclk_div = 2;
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found = true;
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- if (params[p].pll_base_freq > vclk_params->pll_base_freq)
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- jit = params[p].pll_base_freq - vclk_params->pll_base_freq;
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+ jit = od1_od2 * od3_vpll_vclk * 125;
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+ if (p < 3)
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+ jit <<= (3-p);
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+
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+ if ((base_freq % 24000) < (base_freq % jit))
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+ jit = 24000;
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+
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+ if ((base_freq % jit) > (jit / 2))
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+ base_freq = base_freq+jit;
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+ base_freq -= base_freq % jit;
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+
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+ if (base_freq > vclk_params->pll_base_freq)
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+ jit = base_freq - vclk_params->pll_base_freq;
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else
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- jit = vclk_params->pll_base_freq - params[p].pll_base_freq;
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+ jit = vclk_params->pll_base_freq - base_freq;
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if (jit < 175 * od1_od2 * od3_vpll_vclk) {
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- vclk_params->pll_base_freq = params[p].pll_base_freq;
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+ vclk_params->pll_base_freq = base_freq;
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vclk_freq = vclk_params->pll_base_freq / od1_od2 / od3_vpll_vclk;
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}
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diff -u a/drivers/gpu/drm/meson/meson_venc.c b/drivers/gpu/drm/meson/meson_venc.c
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--- a/drivers/gpu/drm/meson/meson_venc.c 2018-06-10 06:10:59.071504595 +0200
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+++ b/drivers/gpu/drm/meson/meson_venc.c 2018-06-10 05:26:59.995203463 +0200
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@@ -816,10 +816,10 @@
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DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_NVSYNC))
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return MODE_BAD;
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- if (mode->hdisplay < 640 || mode->hdisplay > 1920)
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+ if (mode->hdisplay < 416 || mode->hdisplay > 1920)
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return MODE_BAD_HVALUE;
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- if (mode->vdisplay < 480 || mode->vdisplay > 1200)
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+ if (mode->vdisplay < 360 || mode->vdisplay > 1200)
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return MODE_BAD_VVALUE;
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return MODE_OK;
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