78152db78f
* Backport USB PCIe/XHCI patches to U-Boot 2020.07 Backport relevant patches required to make PCIe/USB XHCI work. * Backport/integrate PCIe device tree changes from upstream Linux U-Boot uses the device tree provided by upstream Linux. Make sure the device tree has the relevant chanages to make VL805 USB controller reset work. * Document RPi 4 USB mass storage support (#746)
77 lines
2.5 KiB
Diff
77 lines
2.5 KiB
Diff
From a326f58940f16b2dc3740fd9e87eb485da939ae5 Mon Sep 17 00:00:00 2001
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Message-Id: <a326f58940f16b2dc3740fd9e87eb485da939ae5.1595101389.git.stefan@agner.ch>
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In-Reply-To: <040a141f84f2f84bf8be18f85b4cdb34bf066df0.1595101389.git.stefan@agner.ch>
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References: <040a141f84f2f84bf8be18f85b4cdb34bf066df0.1595101389.git.stefan@agner.ch>
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From: Marek Szyprowski <m.szyprowski@samsung.com>
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Date: Mon, 25 May 2020 13:39:55 +0200
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Subject: [PATCH 06/20] rpi4: add a mapping for the PCIe XHCI controller MMIO
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registers (ARM 64bit)
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Create a non-cacheable mapping for the 0x600000000 physical memory region,
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where MMIO registers for the PCIe XHCI controller are instantiated by the
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PCIe bridge.
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Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
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Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
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Reviewed-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
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---
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arch/arm/mach-bcm283x/init.c | 18 +++++++++++++++---
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1 file changed, 15 insertions(+), 3 deletions(-)
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diff --git a/arch/arm/mach-bcm283x/init.c b/arch/arm/mach-bcm283x/init.c
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index f9a5209480..cf4c5b245d 100644
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--- a/arch/arm/mach-bcm283x/init.c
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+++ b/arch/arm/mach-bcm283x/init.c
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@@ -12,10 +12,15 @@
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#include <dm/device.h>
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#include <fdt_support.h>
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+#define BCM2711_RPI4_PCIE_XHCI_MMIO_PHYS 0x600000000UL
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+#define BCM2711_RPI4_PCIE_XHCI_MMIO_SIZE 0x800000UL
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+
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#ifdef CONFIG_ARM64
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#include <asm/armv8/mmu.h>
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-static struct mm_region bcm283x_mem_map[] = {
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+#define MEM_MAP_MAX_ENTRIES (4)
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+
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+static struct mm_region bcm283x_mem_map[MEM_MAP_MAX_ENTRIES] = {
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{
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.virt = 0x00000000UL,
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.phys = 0x00000000UL,
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@@ -35,7 +40,7 @@ static struct mm_region bcm283x_mem_map[] = {
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}
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};
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-static struct mm_region bcm2711_mem_map[] = {
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+static struct mm_region bcm2711_mem_map[MEM_MAP_MAX_ENTRIES] = {
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{
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.virt = 0x00000000UL,
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.phys = 0x00000000UL,
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@@ -49,6 +54,13 @@ static struct mm_region bcm2711_mem_map[] = {
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.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
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PTE_BLOCK_NON_SHARE |
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PTE_BLOCK_PXN | PTE_BLOCK_UXN
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+ }, {
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+ .virt = BCM2711_RPI4_PCIE_XHCI_MMIO_PHYS,
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+ .phys = BCM2711_RPI4_PCIE_XHCI_MMIO_PHYS,
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+ .size = BCM2711_RPI4_PCIE_XHCI_MMIO_SIZE,
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+ .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
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+ PTE_BLOCK_NON_SHARE |
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+ PTE_BLOCK_PXN | PTE_BLOCK_UXN
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}, {
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/* List terminator */
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0,
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@@ -72,7 +84,7 @@ static void _rpi_update_mem_map(struct mm_region *pd)
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{
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int i;
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- for (i = 0; i < 2; i++) {
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+ for (i = 0; i < MEM_MAP_MAX_ENTRIES; i++) {
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mem_map[i].virt = pd[i].virt;
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mem_map[i].phys = pd[i].phys;
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mem_map[i].size = pd[i].size;
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--
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2.27.0
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