Bump buildroot to 2020.11-rc1 (#985)
* Update buildroot-patches for 2020.11-rc1 buildroot * Update buildroot to 2020.11-rc1 Signed-off-by: Stefan Agner <stefan@agner.ch> * Don't rely on sfdisk --list-free output The --list-free (-F) argument does not allow machine readable mode. And it seems that the output format changes over time (different spacing, using size postfixes instead of raw blocks). Use sfdisk json output and calculate free partition space ourselfs. This works for 2.35 and 2.36 and is more robust since we rely on output which is meant for scripts to parse. * Migrate defconfigs for Buildroot 2020.11-rc1 In particular, rename BR2_TARGET_UBOOT_BOOT_SCRIPT(_SOURCE) to BR2_PACKAGE_HOST_UBOOT_TOOLS_BOOT_SCRIPT(_SOURCE). * Rebase/remove systemd patches for systemd 246 * Drop apparmor/libapparmor from buildroot-external * hassos-persists: use /run as directory for lockfiles The U-Boot tools use /var/lock by default which is not created any more by systemd by default (it is under tmpfiles legacy.conf, which we no longer install). * Disable systemd-update-done.service The service is not suited for pure read-only systems. In particular the service needs to be able to write a file in /etc and /var. Remove the service. Note: This is a static service and cannot be removed using systemd-preset. * Disable apparmor.service for now The service loads all default profiles. Some might actually cause problems. E.g. the profile for ping seems not to match our setup for /etc/resolv.conf: [85503.634653] audit: type=1400 audit(1605286002.684:236): apparmor="DENIED" operation="open" profile="ping" name="/run/resolv.conf" pid=27585 comm="ping" requested_mask="r" denied_mask="r" fsuid=0 ouid=0
This commit is contained in:
Stefan Agner
@@ -0,0 +1,418 @@
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From 22d955122ac0f7ac74ab74aadebf6b8edaf0bbbd Mon Sep 17 00:00:00 2001
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From: Julien Olivain <juju@cotds.org>
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Date: Sun, 15 Dec 2019 18:45:40 +0100
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Subject: [PATCH] DTS for QMTech Zynq starter kit
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Signed-off-by: Martin Chabot <martin.chabot@gmail.com>
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Signed-off-by: Julien Olivain <juju@cotds.org>
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---
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arch/arm/boot/dts/zynq-qmtech.dts | 397 ++++++++++++++++++++++++++++++
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1 file changed, 397 insertions(+)
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create mode 100644 arch/arm/boot/dts/zynq-qmtech.dts
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diff --git a/arch/arm/boot/dts/zynq-qmtech.dts b/arch/arm/boot/dts/zynq-qmtech.dts
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new file mode 100644
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index 000000000000..c6081dc0080e
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--- /dev/null
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+++ b/arch/arm/boot/dts/zynq-qmtech.dts
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@@ -0,0 +1,397 @@
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+// SPDX-License-Identifier: GPL-2.0+
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+/*
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+ * Copyright (C) 2011 - 2015 Xilinx
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+ * Copyright (C) 2012 National Instruments Corp.
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+ * Copyright (C) 2019 Martin Chabot <martin.chabot@gmail.com>
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+ */
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+
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+/* Derived from:
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+ * https://github.com/Xilinx/linux-xlnx/blob/xilinx-v2019.2.01/arch/arm/boot/dts/zynq-zc702.dts
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+ */
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+
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+/dts-v1/;
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+#include "zynq-7000.dtsi"
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+
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+/ {
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+ model = "QMTECH XC7Z010 Starter Kit";
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+ compatible = "xlnx,zynq-qmtech", "xlnx,zynq-zc702", "xlnx,zynq-7000";
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+
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+ aliases {
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+ ethernet0 = &gem0;
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+ i2c0 = &i2c0;
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+ serial0 = &uart1;
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+ spi0 = &qspi;
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+ mmc0 = &sdhci0;
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+ };
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+
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+ memory@0 {
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+ device_type = "memory";
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+ reg = <0x0 0x20000000>;
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+ };
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+
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+ chosen {
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+ bootargs = "";
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+ stdout-path = "serial0:115200n8";
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+ };
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+
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+ leds {
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+ compatible = "gpio-leds";
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+
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+ ds23 {
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+ label = "ds23";
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+ gpios = <&gpio0 10 0>;
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+ linux,default-trigger = "heartbeat";
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+ };
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+ };
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+
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+};
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+
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+&amba {
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+ ocm: sram@fffc0000 {
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+ compatible = "mmio-sram";
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+ reg = <0xfffc0000 0x10000>;
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+ };
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+};
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+
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+&clkc {
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+ ps-clk-frequency = <33333333>;
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+};
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+
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+&gem0 {
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+ status = "okay";
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+ phy-mode = "rgmii-id";
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+ phy-handle = <ðernet_phy>;
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+
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+ ethernet_phy: ethernet-phy@0 {
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+ reg = <0>;
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+ device_type = "ethernet-phy";
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+ };
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+};
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+
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+&gpio0 {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pinctrl_gpio0_default>;
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+};
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+
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+&i2c0 {
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+ status = "disabled";
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+ clock-frequency = <400000>;
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+ pinctrl-names = "default", "gpio";
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+ pinctrl-0 = <&pinctrl_i2c0_default>;
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+ pinctrl-1 = <&pinctrl_i2c0_gpio>;
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+ scl-gpios = <&gpio0 50 0>;
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+ sda-gpios = <&gpio0 51 0>;
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+
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+ i2c-mux@74 {
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+ compatible = "nxp,pca9548";
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ reg = <0x74>;
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+
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+ i2c@0 {
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ reg = <0>;
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+ si570: clock-generator@5d {
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+ #clock-cells = <0>;
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+ compatible = "silabs,si570";
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+ temperature-stability = <50>;
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+ reg = <0x5d>;
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+ factory-fout = <156250000>;
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+ clock-frequency = <148500000>;
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+ };
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+ };
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+
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+ i2c@1 {
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ reg = <1>;
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+ adv7511: hdmi-tx@39 {
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+ compatible = "adi,adv7511";
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+ reg = <0x39>;
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+ adi,input-depth = <8>;
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+ adi,input-colorspace = "yuv422";
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+ adi,input-clock = "1x";
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+ adi,input-style = <3>;
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+ adi,input-justification = "right";
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+ };
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+ };
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+
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+ i2c@2 {
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ reg = <2>;
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+ eeprom@54 {
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+ compatible = "atmel,24c08";
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+ reg = <0x54>;
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+ };
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+ };
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+
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+ i2c@3 {
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ reg = <3>;
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+ gpio@21 {
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+ compatible = "ti,tca6416";
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+ reg = <0x21>;
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+ gpio-controller;
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+ #gpio-cells = <2>;
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+ };
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+ };
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+
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+ i2c@4 {
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ reg = <4>;
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+ rtc@51 {
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+ compatible = "nxp,pcf8563";
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+ reg = <0x51>;
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+ };
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+ };
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+
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+ i2c@7 {
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ reg = <7>;
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+ hwmon@52 {
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+ compatible = "ti,ucd9248";
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+ reg = <52>;
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+ };
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+ hwmon@53 {
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+ compatible = "ti,ucd9248";
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+ reg = <53>;
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+ };
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+ hwmon@54 {
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+ compatible = "ti,ucd9248";
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+ reg = <54>;
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+ };
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+ };
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+ };
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+};
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+
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+&pinctrl0 {
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+ pinctrl_can0_default: can0-default {
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+ mux {
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+ function = "can0";
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+ groups = "can0_9_grp";
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+ };
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+
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+ conf {
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+ groups = "can0_9_grp";
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+ slew-rate = <0>;
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+ io-standard = <1>;
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+ };
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+
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+ conf-rx {
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+ pins = "MIO46";
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+ bias-high-impedance;
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+ };
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+
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+ conf-tx {
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+ pins = "MIO47";
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+ bias-disable;
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+ };
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+ };
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+
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+ pinctrl_gem0_default: gem0-default {
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+ mux {
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+ function = "ethernet0";
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+ groups = "ethernet0_0_grp";
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+ };
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+
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+ conf {
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+ groups = "ethernet0_0_grp";
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+ slew-rate = <0>;
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+ io-standard = <4>;
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+ };
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+
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+ conf-rx {
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+ pins = "MIO22", "MIO23", "MIO24", "MIO25", "MIO26", "MIO27";
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+ bias-high-impedance;
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+ low-power-disable;
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+ };
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+
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+ conf-tx {
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+ pins = "MIO16", "MIO17", "MIO18", "MIO19", "MIO20", "MIO21";
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+ bias-disable;
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+ low-power-enable;
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+ };
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+
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+ mux-mdio {
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+ function = "mdio0";
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+ groups = "mdio0_0_grp";
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+ };
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+
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+ conf-mdio {
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+ groups = "mdio0_0_grp";
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+ slew-rate = <0>;
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+ io-standard = <1>;
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+ bias-disable;
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+ };
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+ };
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+
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+ pinctrl_gpio0_default: gpio0-default {
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+ mux {
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+ function = "gpio0";
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+ groups = "gpio0_7_grp", "gpio0_8_grp", "gpio0_9_grp",
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+ "gpio0_10_grp", "gpio0_11_grp", "gpio0_12_grp",
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+ "gpio0_13_grp", "gpio0_14_grp";
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+ };
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+
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+ conf {
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+ groups = "gpio0_7_grp", "gpio0_8_grp", "gpio0_9_grp",
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+ "gpio0_10_grp", "gpio0_11_grp", "gpio0_12_grp",
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+ "gpio0_13_grp", "gpio0_14_grp";
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+ slew-rate = <0>;
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+ io-standard = <1>;
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+ };
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+
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+ conf-pull-up {
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+ pins = "MIO9", "MIO10", "MIO11", "MIO12", "MIO13", "MIO14";
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+ bias-pull-up;
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+ };
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+
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+ conf-pull-none {
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+ pins = "MIO7", "MIO8";
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+ bias-disable;
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+ };
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+ };
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+
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+ pinctrl_i2c0_default: i2c0-default {
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+ mux {
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+ groups = "i2c0_10_grp";
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+ function = "i2c0";
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+ };
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+
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+ conf {
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+ groups = "i2c0_10_grp";
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+ bias-pull-up;
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+ slew-rate = <0>;
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+ io-standard = <1>;
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+ };
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+ };
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+
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+ pinctrl_i2c0_gpio: i2c0-gpio {
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+ mux {
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+ groups = "gpio0_50_grp", "gpio0_51_grp";
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+ function = "gpio0";
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+ };
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+
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+ conf {
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+ groups = "gpio0_50_grp", "gpio0_51_grp";
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+ slew-rate = <0>;
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+ io-standard = <1>;
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+ };
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+ };
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+
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+ pinctrl_sdhci0_default: sdhci0-default {
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+ mux {
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+ groups = "sdio0_2_grp";
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+ function = "sdio0";
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+ };
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+
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+ conf {
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+ groups = "sdio0_2_grp";
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+ slew-rate = <0>;
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+ io-standard = <1>;
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+ bias-disable;
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+ };
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+
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+ mux-cd {
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+ groups = "gpio0_0_grp";
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+ function = "sdio0_cd";
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+ };
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+
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+ conf-cd {
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+ groups = "gpio0_0_grp";
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+ bias-high-impedance;
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+ bias-pull-up;
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+ slew-rate = <0>;
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+ io-standard = <1>;
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+ };
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+
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+ mux-wp {
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+ groups = "gpio0_15_grp";
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+ function = "sdio0_wp";
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+ };
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+
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+ conf-wp {
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+ groups = "gpio0_15_grp";
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+ bias-high-impedance;
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+ bias-pull-up;
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+ slew-rate = <0>;
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+ io-standard = <1>;
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+ };
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+ };
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+
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+ pinctrl_uart1_default: uart1-default {
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+ mux {
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+ groups = "uart1_10_grp";
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+ function = "uart1";
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+ };
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+
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+ conf {
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+ groups = "uart1_10_grp";
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+ slew-rate = <0>;
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+ io-standard = <1>;
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+ };
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+
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+ conf-rx {
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+ pins = "MIO25";
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+ bias-high-impedance;
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+ };
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+
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+ conf-tx {
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+ pins = "MIO24";
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+ bias-disable;
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+ };
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+ };
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+};
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+
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+&qspi {
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+ u-boot,dm-pre-reloc;
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+ status = "disabled";
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+ is-dual = <0>;
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+ num-cs = <1>;
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+ flash@0 {
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+ compatible = "n25q128a11";
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+ reg = <0x0>;
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+ spi-tx-bus-width = <1>;
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+ spi-rx-bus-width = <4>;
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+ spi-max-frequency = <50000000>;
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+ partition@qspi-fsbl-uboot {
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+ label = "qspi-fsbl-uboot";
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+ reg = <0x0 0x100000>;
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+ };
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+ partition@qspi-linux {
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+ label = "qspi-linux";
|
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+ reg = <0x100000 0x500000>;
|
||||
+ };
|
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+ partition@qspi-device-tree {
|
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+ label = "qspi-device-tree";
|
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+ reg = <0x600000 0x20000>;
|
||||
+ };
|
||||
+ partition@qspi-rootfs {
|
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+ label = "qspi-rootfs";
|
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+ reg = <0x620000 0x5E0000>;
|
||||
+ };
|
||||
+ partition@qspi-bitstream {
|
||||
+ label = "qspi-bitstream";
|
||||
+ reg = <0xC00000 0x400000>;
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&sdhci0 {
|
||||
+ u-boot,dm-pre-reloc;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&uart1 {
|
||||
+ u-boot,dm-pre-reloc;
|
||||
+ status = "okay";
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pinctrl_uart1_default>;
|
||||
+};
|
||||
--
|
||||
2.23.0
|
||||
|
||||
Reference in New Issue
Block a user