* Backport USB PCIe/XHCI patches to U-Boot 2020.07 Backport relevant patches required to make PCIe/USB XHCI work. * Backport/integrate PCIe device tree changes from upstream Linux U-Boot uses the device tree provided by upstream Linux. Make sure the device tree has the relevant chanages to make VL805 USB controller reset work. * Document RPi 4 USB mass storage support (#746)
This commit is contained in:
@@ -0,0 +1,41 @@
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From a9f92163e6c07e5c6f57f00f4931098e0e1ee826 Mon Sep 17 00:00:00 2001
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Message-Id: <a9f92163e6c07e5c6f57f00f4931098e0e1ee826.1595152741.git.stefan@agner.ch>
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From: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
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Date: Mon, 29 Jun 2020 18:18:37 +0200
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Subject: [PATCH 1/4] dt-bindings: reset: Add a binding for the RPi Firmware
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reset controller
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The firmware running on the RPi VideoCore can be used to reset and
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initialize HW controlled by the firmware.
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Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
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Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
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[backport for RPi 4.19 kernel]
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Signed-off-by: Stefan Agner <stefan@agner.ch>
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---
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.../dt-bindings/reset/raspberrypi,firmware-reset.h | 13 +++++++++++++
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1 file changed, 13 insertions(+)
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create mode 100644 include/dt-bindings/reset/raspberrypi,firmware-reset.h
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diff --git a/include/dt-bindings/reset/raspberrypi,firmware-reset.h b/include/dt-bindings/reset/raspberrypi,firmware-reset.h
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new file mode 100644
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index 000000000000..1a4f4c792723
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--- /dev/null
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+++ b/include/dt-bindings/reset/raspberrypi,firmware-reset.h
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@@ -0,0 +1,13 @@
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+/* SPDX-License-Identifier: GPL-2.0 */
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+/*
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+ * Copyright (c) 2020 Nicolas Saenz Julienne
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+ * Author: Nicolas Saenz Julienne <nsaenzjulienne@suse.com>
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+ */
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+
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+#ifndef _DT_BINDINGS_RASPBERRYPI_FIRMWARE_RESET_H
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+#define _DT_BINDINGS_RASPBERRYPI_FIRMWARE_RESET_H
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+
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+#define RASPBERRYPI_FIRMWARE_RESET_ID_USB 0
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+#define RASPBERRYPI_FIRMWARE_RESET_NUM_IDS 1
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+
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+#endif
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--
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2.27.0
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@@ -0,0 +1,38 @@
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From b15414057bc9a023fc865242f499807d82933e58 Mon Sep 17 00:00:00 2001
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Message-Id: <b15414057bc9a023fc865242f499807d82933e58.1595152741.git.stefan@agner.ch>
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In-Reply-To: <a9f92163e6c07e5c6f57f00f4931098e0e1ee826.1595152741.git.stefan@agner.ch>
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References: <a9f92163e6c07e5c6f57f00f4931098e0e1ee826.1595152741.git.stefan@agner.ch>
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From: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
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Date: Mon, 29 Jun 2020 18:18:39 +0200
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Subject: [PATCH 2/4] ARM: dts: bcm2711: Add firmware usb reset node
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Now that the reset driver exposing Raspberry Pi 4's firmware based USB
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reset routine is available, let's add the device tree node exposing it.
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Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
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Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
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[backport for RPi 4.19 kernel]
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Signed-off-by: Stefan Agner <stefan@agner.ch>
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---
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arch/arm/boot/dts/bcm2711-rpi-4-b.dts | 5 +++++
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1 file changed, 5 insertions(+)
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diff --git a/arch/arm/boot/dts/bcm2711-rpi-4-b.dts b/arch/arm/boot/dts/bcm2711-rpi-4-b.dts
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index 42259dbf3919..ec0b3bb64de8 100644
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--- a/arch/arm/boot/dts/bcm2711-rpi-4-b.dts
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+++ b/arch/arm/boot/dts/bcm2711-rpi-4-b.dts
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@@ -80,6 +80,11 @@
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"";
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status = "okay";
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};
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+
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+ reset: reset {
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+ compatible = "raspberrypi,firmware-reset";
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+ #reset-cells = <1>;
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+ };
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};
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&uart0 {
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--
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2.27.0
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@@ -0,0 +1,58 @@
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From 08558575c0f3d1437994590ad418d6c2cf18d96b Mon Sep 17 00:00:00 2001
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Message-Id: <08558575c0f3d1437994590ad418d6c2cf18d96b.1595152741.git.stefan@agner.ch>
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In-Reply-To: <a9f92163e6c07e5c6f57f00f4931098e0e1ee826.1595152741.git.stefan@agner.ch>
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References: <a9f92163e6c07e5c6f57f00f4931098e0e1ee826.1595152741.git.stefan@agner.ch>
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From: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
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Date: Mon, 29 Jun 2020 18:18:40 +0200
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Subject: [PATCH 3/4] ARM: dts: bcm2711: Add reset controller to xHCI node
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The chip is hardwired to the board's PCIe bus and needs to be properly
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setup trough a firmware routine after a PCI fundamental reset. Pass the
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reset controller phandle that takes care of triggering the
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initialization to the relevant PCI device.
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Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
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[backport for RPi 4.19 kernel]
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Signed-off-by: Stefan Agner <stefan@agner.ch>
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---
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arch/arm/boot/dts/bcm2711-rpi-4-b.dts | 17 +++++++++++++++++
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1 file changed, 17 insertions(+)
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diff --git a/arch/arm/boot/dts/bcm2711-rpi-4-b.dts b/arch/arm/boot/dts/bcm2711-rpi-4-b.dts
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index ec0b3bb64de8..2c6aa1933600 100644
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--- a/arch/arm/boot/dts/bcm2711-rpi-4-b.dts
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+++ b/arch/arm/boot/dts/bcm2711-rpi-4-b.dts
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@@ -4,6 +4,8 @@
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#include "bcm2711-rpi.dtsi"
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#include "bcm283x-rpi-csi1-2lane.dtsi"
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+#include <dt-bindings/reset/raspberrypi,firmware-reset.h>
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+
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/ {
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compatible = "raspberrypi,4-model-b", "brcm,bcm2711";
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model = "Raspberry Pi 4 Model B";
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@@ -87,6 +89,21 @@
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};
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};
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+&pcie_0 {
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+ pci@1,0 {
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+ #address-cells = <3>;
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+ #size-cells = <2>;
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+ ranges;
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+
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+ reg = <0 0 0 0 0>;
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+
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+ usb@1,0 {
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+ reg = <0x10000 0 0 0 0>;
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+ resets = <&reset RASPBERRYPI_FIRMWARE_RESET_ID_USB>;
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+ };
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+ };
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+};
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+
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&uart0 {
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pinctrl-names = "default";
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pinctrl-0 = <&uart0_pins &bt_pins>;
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--
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2.27.0
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@@ -0,0 +1,44 @@
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From dcfb930f9c271ad303a888ce94227d2d78974e39 Mon Sep 17 00:00:00 2001
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Message-Id: <dcfb930f9c271ad303a888ce94227d2d78974e39.1595152741.git.stefan@agner.ch>
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In-Reply-To: <a9f92163e6c07e5c6f57f00f4931098e0e1ee826.1595152741.git.stefan@agner.ch>
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References: <a9f92163e6c07e5c6f57f00f4931098e0e1ee826.1595152741.git.stefan@agner.ch>
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From: Stefan Agner <stefan@agner.ch>
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Date: Sun, 19 Jul 2020 11:49:45 +0200
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Subject: [PATCH 4/4] ARM: dts: bcm2838: add upstream property to enable PCIe
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spread-spectrum
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Add the upstream device tree property brcm,enable-ssc to enable
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spread-spectrum for PCIe. This is used by the upstream U-Boot.
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Signed-off-by: Stefan Agner <stefan@agner.ch>
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---
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arch/arm/boot/dts/bcm2838.dtsi | 13 ++++++++-----
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1 file changed, 8 insertions(+), 5 deletions(-)
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diff --git a/arch/arm/boot/dts/bcm2838.dtsi b/arch/arm/boot/dts/bcm2838.dtsi
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index 36d250d7053b..d6cc876bc720 100644
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--- a/arch/arm/boot/dts/bcm2838.dtsi
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+++ b/arch/arm/boot/dts/bcm2838.dtsi
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@@ -353,11 +353,14 @@
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*/
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ranges = <0x02000000 0x0 0xf8000000 0x6 0x00000000
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0x0 0x04000000>;
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- /* Map inbound accesses from pci:0x0_00000000..ffffffff
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- * to scb:0x0_00000000-ffffffff
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- */
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- dma-ranges = <0x02000000 0x0 0x00000000 0x0 0x00000000
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- 0x1 0x00000000>;
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+ /*
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+ * The wrapper around the PCIe block has a bug
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+ * preventing it from accessing beyond the first 3GB of
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+ * memory.
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+ */
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+ dma-ranges = <0x02000000 0x0 0x00000000 0x0 0x00000000
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+ 0x0 0xc0000000>;
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+ brcm,enable-ssc;
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status = "okay";
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};
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--
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2.27.0
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